| /* SPDX-License-Identifier: GPL-2.0+ */ | |
| /* | |
| * Copyright 2018 NXP | |
| */ | |
| #ifndef __ASM_ARCH_IMX8_CLOCK_H__ | |
| #define __ASM_ARCH_IMX8_CLOCK_H__ | |
| /* Mainly for compatible to imx common code. */ | |
| enum mxc_clock { | |
| MXC_ARM_CLK = 0, | |
| MXC_AHB_CLK, | |
| MXC_IPG_CLK, | |
| MXC_UART_CLK, | |
| MXC_CSPI_CLK, | |
| MXC_AXI_CLK, | |
| MXC_DDR_CLK, | |
| MXC_ESDHC_CLK, | |
| MXC_ESDHC2_CLK, | |
| MXC_ESDHC3_CLK, | |
| MXC_I2C_CLK, | |
| MXC_FEC_CLK, | |
| }; | |
| u32 mxc_get_clock(enum mxc_clock clk); | |
| #endif /* __ASM_ARCH_IMX8_CLOCK_H__ */ |