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nest-open-source / manifest_repos / u-boot / 25e92cfac7f2fb1bd58122777283f02b5d66f4e0 / . / arch / arm / mach-meson / a1 / power_cal.c
blob: e4f9c5333f82deee30a1b533f4533e8ac1cd0794 [file] [log] [blame]
Googler25e92cf2023-12-13 10:05:01 +0000[diff] [blame^]1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2019 Amlogic, Inc. All rights reserved.
4 */
5
6#include <common.h>
7#include <asm/arch/secure_apb.h>
8#include <asm/arch/io.h>
9#include <amlogic/saradc.h>
10#include <asm/arch/mailbox.h>
11
12#define P_EE_TIMER_E (*((volatile unsigned *)(0xffd00000 + (0x3c62 << 2))))
13#define vcck_adc_channel 0x4
14#define ee_adc_channel 0x5
15#define default_ref_val 1800
16
17extern const int pwm_cal_voltage_table[][2];
18extern const int pwm_cal_voltage_table_ee[][2];
19extern int pwm_cal_voltage_table_size;
20extern int pwm_cal_voltage_table_ee_size;
21
22
23enum pwm_id {
24 pwm_vcck = 0,
25 pwm_ee,
26};
27
28unsigned int _get_time(void)
29{
30 return P_EE_TIMER_E;
31}
32
33void _udelay_(unsigned int us)
34{
35 unsigned int t0 = _get_time();
36
37 while (_get_time() - t0 <= us)
38 ;
39}
40
41int32_t aml_delt_get(int adc_val, unsigned int voltage)
42{
43 unsigned int adc_volt;
44 int32_t delt;
45 int32_t div = 10; /*10mv is min step*/
46
47 if (adc_val != -1) {
48 adc_volt = default_ref_val*adc_val/1024;
49 printf("aml pwm cal adc_val = %x, adc_voltage = %d, def_voltage = %d\n",
50 adc_val, adc_volt, voltage);
51 } else {
52 adc_volt = voltage;
53 printf("warning:aml pwm cal adc get voltage error\n");
54 return 0;
55 }
56 delt = voltage - adc_volt;
57 delt = delt / div;
58 return delt;
59}
60
61void aml_set_voltage(unsigned int id, unsigned int voltage, int delt)
62{
63 int to;
64
65 switch (id) {
66 case pwm_vcck:
67 for (to = 0; to < pwm_cal_voltage_table_size; to++) {
68 if (pwm_cal_voltage_table[to][1] >= voltage) {
69 break;
70 }
71 }
72 to +=delt;
73 if (to >= pwm_cal_voltage_table_size) {
74 to = pwm_cal_voltage_table_size - 1;
75 }
76 /*vcck volt set by dvfs and avs*/
77 //writel(pwm_voltage_table[to][0], PWM_PWM_A_ADRESS);
78 _udelay_(200);
79 break;
80
81 case pwm_ee:
82 for (to = 0; to < pwm_cal_voltage_table_ee_size; to++) {
83 if (pwm_cal_voltage_table_ee[to][1] >= voltage) {
84 break;
85 }
86 }
87 to +=delt;
88 if (to >= pwm_cal_voltage_table_ee_size) {
89 to = pwm_cal_voltage_table_ee_size - 1;
90 }
91 printf("aml pwm cal before ee_address: %x, ee_voltage: %x\n",
92 AO_PWM_PWM_B, readl(AO_PWM_PWM_B));
93 writel(pwm_cal_voltage_table_ee[to][0],AO_PWM_PWM_B);
94 _udelay_(1000);
95 printf("aml pwm cal after ee_address: %x, ee_voltage: %x\n",
96 AO_PWM_PWM_B, readl(AO_PWM_PWM_B));
97 break;
98 default:
99 break;
100 }
101 _udelay_(200);
102}
103
104int aml_cal_pwm(unsigned int ee_voltage, unsigned int vcck_voltage)
105{
106 int32_t ee_delt, vcck_delt;
107 unsigned int ee_val, vcck_val;
108 int ret;
109
110 /*txlx vcck ch4,vddee ch5*/
111 ret = adc_channel_single_shot_mode("adc", ADC_MODE_HIGH_PRECISION,
112 vcck_adc_channel, &vcck_val);
113 if (ret)
114 return ret;
115
116 ret = adc_channel_single_shot_mode("adc", ADC_MODE_HIGH_PRECISION,
117 ee_adc_channel, &ee_val);
118 if (ret)
119 return ret;
120
121 vcck_delt = aml_delt_get(vcck_val, vcck_voltage);
122 ee_delt = aml_delt_get(ee_val, ee_voltage);
123 send_pwm_delt(vcck_delt, ee_delt);
124 aml_set_voltage(pwm_ee, AML_VDDEE_INIT_VOLTAGE, ee_delt);
125 //aml_set_voltage(pwm_vcck, CONFIG_VCCK_INIT_VOLTAGE, vcck_delt);
126 printf("aml board pwm vcck: %x, ee: %x\n", vcck_delt, ee_delt);
127
128 return 0;
129}
130
131void aml_pwm_cal_init(int mode)
132{
133 printf("aml pwm cal init\n");
134 aml_cal_pwm(AML_VDDEE_INIT_VOLTAGE, AML_VCCK_INIT_VOLTAGE);
135}