Googler | e00b8eb | 2019-07-08 16:37:07 -0700 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2009 |
| 3 | * Stefano Babic, DENX Software Engineering, sbabic@denx.de. |
Googler | e00b8eb | 2019-07-08 16:37:07 -0700 | [diff] [blame] | 4 | * |
Googler | 40bc9d0 | 2023-12-15 16:42:49 +0800 | [diff] [blame^] | 5 | * SPDX-License-Identifier: GPL-2.0+ |
Googler | e00b8eb | 2019-07-08 16:37:07 -0700 | [diff] [blame] | 6 | */ |
Googler | e00b8eb | 2019-07-08 16:37:07 -0700 | [diff] [blame] | 7 | |
Googler | 40bc9d0 | 2023-12-15 16:42:49 +0800 | [diff] [blame^] | 8 | #ifndef _SYS_PROTO_H_ |
| 9 | #define _SYS_PROTO_H_ |
| 10 | |
| 11 | #include <asm/imx-common/regs-common.h> |
| 12 | #include "../arch-imx/cpu.h" |
| 13 | |
| 14 | #define soc_rev() (get_cpu_rev() & 0xFF) |
| 15 | #define is_soc_rev(rev) (soc_rev() - rev) |
| 16 | |
| 17 | u32 get_nr_cpus(void); |
| 18 | u32 get_cpu_rev(void); |
| 19 | |
| 20 | /* returns MXC_CPU_ value */ |
| 21 | #define cpu_type(rev) (((rev) >> 12)&0xff) |
| 22 | |
| 23 | /* both macros return/take MXC_CPU_ constants */ |
| 24 | #define get_cpu_type() (cpu_type(get_cpu_rev())) |
| 25 | #define is_cpu_type(cpu) (get_cpu_type() == cpu) |
| 26 | |
| 27 | const char *get_imx_type(u32 imxtype); |
| 28 | unsigned imx_ddr_size(void); |
| 29 | void set_chipselect_size(int const); |
| 30 | |
| 31 | /* |
| 32 | * Initializes on-chip ethernet controllers. |
| 33 | * to override, implement board_eth_init() |
| 34 | */ |
| 35 | |
| 36 | int fecmxc_initialize(bd_t *bis); |
| 37 | u32 get_ahb_clk(void); |
| 38 | u32 get_periph_clk(void); |
| 39 | |
| 40 | int mxs_reset_block(struct mxs_register_32 *reg); |
| 41 | int mxs_wait_mask_set(struct mxs_register_32 *reg, |
| 42 | uint32_t mask, |
| 43 | unsigned int timeout); |
| 44 | int mxs_wait_mask_clr(struct mxs_register_32 *reg, |
| 45 | uint32_t mask, |
| 46 | unsigned int timeout); |
| 47 | #endif |