blob: 28ba84415f05b667d24dd329f1a1953189e67a53 [file] [log] [blame]
Googlere00b8eb2019-07-08 16:37:07 -07001/*
2 * (C) Copyright 2009
3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
Googlere00b8eb2019-07-08 16:37:07 -07004 *
Googler40bc9d02023-12-15 16:42:49 +08005 * SPDX-License-Identifier: GPL-2.0+
Googlere00b8eb2019-07-08 16:37:07 -07006 */
Googlere00b8eb2019-07-08 16:37:07 -07007
Googler40bc9d02023-12-15 16:42:49 +08008#ifndef _SYS_PROTO_H_
9#define _SYS_PROTO_H_
10
11#include <asm/imx-common/regs-common.h>
12#include "../arch-imx/cpu.h"
13
14#define soc_rev() (get_cpu_rev() & 0xFF)
15#define is_soc_rev(rev) (soc_rev() - rev)
16
17u32 get_nr_cpus(void);
18u32 get_cpu_rev(void);
19
20/* returns MXC_CPU_ value */
21#define cpu_type(rev) (((rev) >> 12)&0xff)
22
23/* both macros return/take MXC_CPU_ constants */
24#define get_cpu_type() (cpu_type(get_cpu_rev()))
25#define is_cpu_type(cpu) (get_cpu_type() == cpu)
26
27const char *get_imx_type(u32 imxtype);
28unsigned imx_ddr_size(void);
29void set_chipselect_size(int const);
30
31/*
32 * Initializes on-chip ethernet controllers.
33 * to override, implement board_eth_init()
34 */
35
36int fecmxc_initialize(bd_t *bis);
37u32 get_ahb_clk(void);
38u32 get_periph_clk(void);
39
40int mxs_reset_block(struct mxs_register_32 *reg);
41int mxs_wait_mask_set(struct mxs_register_32 *reg,
42 uint32_t mask,
43 unsigned int timeout);
44int mxs_wait_mask_clr(struct mxs_register_32 *reg,
45 uint32_t mask,
46 unsigned int timeout);
47#endif