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Googler695f9d92023-09-11 15:38:29 +08001/*
2 * (C) Copyright 2012
3 * NVIDIA Inc, <www.nvidia.com>
4 *
5 * Allen Martin <amartin@nvidia.com>
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */
9#include <common.h>
10#include <spl.h>
11
12#include <asm/io.h>
13#include <asm/arch/clock.h>
14#include <asm/arch/pinmux.h>
15#include <asm/arch/tegra.h>
16#include <asm/arch-tegra/apb_misc.h>
17#include <asm/arch-tegra/board.h>
18#include <asm/spl.h>
19#include "cpu.h"
20
21void spl_board_init(void)
22{
23 struct apb_misc_pp_ctlr *apb_misc =
24 (struct apb_misc_pp_ctlr *)NV_PA_APB_MISC_BASE;
25
26 /* enable JTAG */
27 writel(0xC0, &apb_misc->cfg_ctl);
28
29 board_init_uart_f();
30
31 /* Initialize periph GPIOs */
32 gpio_early_init_uart();
33
34 clock_early_init();
35 preloader_console_init();
36}
37
38u32 spl_boot_device(void)
39{
40 return BOOT_DEVICE_RAM;
41}
42
43void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
44{
45 debug("image entry point: 0x%X\n", spl_image->entry_point);
46
47 start_cpu((u32)spl_image->entry_point);
48 halt_avp();
49}