Googler | 695f9d9 | 2023-09-11 15:38:29 +0800 | [diff] [blame^] | 1 | /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ |
| 2 | /* |
| 3 | * board/amlogic/tm2_t962e2_ab311_v1/lcd.c |
| 4 | * |
| 5 | * Copyright (C) 2020 Amlogic, Inc. All rights reserved. |
| 6 | * |
| 7 | */ |
| 8 | |
| 9 | #include <common.h> |
| 10 | #include <amlogic/aml_lcd.h> |
| 11 | #ifdef CONFIG_AML_LOCAL_DIMMING |
| 12 | #include <amlogic/aml_ldim.h> |
| 13 | #endif |
| 14 | |
| 15 | static char lcd_cpu_gpio[LCD_CPU_GPIO_NUM_MAX][LCD_CPU_GPIO_NAME_MAX] = { |
| 16 | "GPIOAO_4", |
| 17 | "invalid", /* ending flag */ |
| 18 | }; |
| 19 | |
| 20 | static struct lcd_power_step_s lcd_power_on_step[] = { |
| 21 | {LCD_POWER_TYPE_CPU, 0,1,20,}, /* panel vcc */ |
| 22 | {LCD_POWER_TYPE_SIGNAL,0,0,0,}, |
| 23 | {LCD_POWER_TYPE_MAX, 0,0,0,}, /* ending flag */ |
| 24 | }; |
| 25 | static struct lcd_power_step_s lcd_power_off_step[] = { |
| 26 | {LCD_POWER_TYPE_SIGNAL,0,0,0,}, |
| 27 | {LCD_POWER_TYPE_CPU, 0,0,200,}, /* panel vcc */ |
| 28 | {LCD_POWER_TYPE_MAX, 0,0,0,}, /* ending flag */ |
| 29 | }; |
| 30 | |
| 31 | static struct lcd_power_step_s lcd_power_on_step_p2p[] = { |
| 32 | {LCD_POWER_TYPE_CPU, 0,1,20,}, /* panel vcc */ |
| 33 | {LCD_POWER_TYPE_EXTERN,0,0,100,}, /* init external voltage */ |
| 34 | {LCD_POWER_TYPE_SIGNAL,0,0,0,}, |
| 35 | {LCD_POWER_TYPE_MAX, 0,0,0,}, /* ending flag */ |
| 36 | }; |
| 37 | static struct lcd_power_step_s lcd_power_off_step_p2p[] = { |
| 38 | {LCD_POWER_TYPE_SIGNAL,0,0,0,}, |
| 39 | {LCD_POWER_TYPE_CPU, 0,0,200,}, /* panel vcc */ |
| 40 | {LCD_POWER_TYPE_MAX, 0,0,0,}, /* ending flag */ |
| 41 | }; |
| 42 | |
| 43 | static char lcd_bl_gpio[BL_GPIO_NUM_MAX][LCD_CPU_GPIO_NAME_MAX] = { |
| 44 | "GPIOAO_11", |
| 45 | "GPIOZ_5", |
| 46 | "GPIOZ_6", |
| 47 | "invalid", /* ending flag */ |
| 48 | }; |
| 49 | |
| 50 | #ifdef CONFIG_AML_LOCAL_DIMMING |
| 51 | static char lcd_bl_ldim_gpio[BL_GPIO_NUM_MAX][LCD_CPU_GPIO_NAME_MAX] = { |
| 52 | "GPIOH_10", /* LD_EN */ |
| 53 | "GPIOZ_5", /* DIMMING_PWM */ |
| 54 | "GPIOZ_6", /* LD_EN2 */ |
| 55 | "invalid", /* ending flag */ |
| 56 | }; |
| 57 | #endif |
| 58 | |
| 59 | struct ext_lcd_config_s ext_lcd_config[LCD_NUM_MAX] = { |
| 60 | {/* normal*/ |
| 61 | "lvds_0",LCD_LVDS,8, |
| 62 | /* basic timing */ |
| 63 | 1920,1080,2200,1125,44,148,0,5,36,0, |
| 64 | /* clk_attr */ |
| 65 | 0,0,1,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val, |
| 66 | /* lvds_attr */ |
| 67 | 1,1,0,0,0,0xf,0x0,Rsv_val,Rsv_val,Rsv_val, |
| 68 | /* power step */ |
| 69 | lcd_power_on_step, lcd_power_off_step, |
| 70 | /* backlight */ |
| 71 | 60,255,10,128,128, |
| 72 | BL_CTRL_PWM,0,1,0,200,200, |
| 73 | BL_PWM_POSITIVE,BL_PWM_C,180,100,25,1,0, |
| 74 | Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val, |
| 75 | Rsv_val,Rsv_val,Rsv_val,Rsv_val, |
| 76 | 10,10,Rsv_val}, |
| 77 | |
| 78 | {/* for HDMI convert*/ |
| 79 | "lvds_1",LCD_LVDS,8, |
| 80 | /* basic timing */ |
| 81 | 1920,1080,2200,1125,44,148,0,5,36,0, |
| 82 | /* clk_attr */ |
| 83 | 1,0,1,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val, |
| 84 | /* lvds_attr */ |
| 85 | 1,1,0,0,0,0xf,0x0,Rsv_val,Rsv_val,Rsv_val, |
| 86 | /* power step */ |
| 87 | lcd_power_on_step, lcd_power_off_step, |
| 88 | /* backlight */ |
| 89 | 60,255,10,128,128, |
| 90 | BL_CTRL_MAX,0,1,0,200,200, |
| 91 | BL_PWM_POSITIVE,BL_PWM_C,180,100,25,1,0, |
| 92 | Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val, |
| 93 | Rsv_val,Rsv_val,Rsv_val,Rsv_val, |
| 94 | 10,10,Rsv_val}, |
| 95 | |
| 96 | {/*public 2-region vx1 : 3840x2160@60hz 8lane */ |
| 97 | "vbyone_0",LCD_VBYONE,10, |
| 98 | /* basic timing */ |
| 99 | 3840,2160,4400,2250,33,477,0,6,81,0, |
| 100 | /* clk_attr */ |
| 101 | 2,0,1,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val, |
| 102 | /* vbyone_attr */ |
| 103 | 8,2,4,4,0xf,0x1,Rsv_val,Rsv_val,Rsv_val,Rsv_val, |
| 104 | /* power step */ |
| 105 | lcd_power_on_step, lcd_power_off_step, |
| 106 | /* backlight */ |
| 107 | 60,255,10,128,128, |
| 108 | BL_CTRL_PWM,0,1,0,200,200, |
| 109 | BL_PWM_POSITIVE,BL_PWM_C,180,100,25,1,0, |
| 110 | Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val, |
| 111 | Rsv_val,Rsv_val,Rsv_val,Rsv_val, |
| 112 | 10,10,Rsv_val}, |
| 113 | |
| 114 | {/*public 1-region vx1 : 3840x2160@60hz 8lane */ |
| 115 | "vbyone_1",LCD_VBYONE,10, |
| 116 | /* basic timing */ |
| 117 | 3840,2160,4400,2250,33,477,0,6,81,0, |
| 118 | /* clk_attr */ |
| 119 | 2,0,1,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val, |
| 120 | /* vbyone_attr */ |
| 121 | 8,1,4,4,0xf,0x1,Rsv_val,Rsv_val,Rsv_val,Rsv_val, |
| 122 | /* power step */ |
| 123 | lcd_power_on_step, lcd_power_off_step, |
| 124 | /* backlight */ |
| 125 | 60,255,10,128,128, |
| 126 | BL_CTRL_PWM,0,1,0,200,200, |
| 127 | BL_PWM_POSITIVE,BL_PWM_C,180,100,25,1,0, |
| 128 | Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val, |
| 129 | Rsv_val,Rsv_val,Rsv_val,Rsv_val, |
| 130 | 10,10,Rsv_val}, |
| 131 | |
| 132 | {/*public p2p ceds : 3840x2160@60hz 12lane */ |
| 133 | "p2p_0",LCD_P2P,8, |
| 134 | /* basic timing */ |
| 135 | 3840,2160,5000,2250,16,29,0,6,81,0, |
| 136 | /* clk_attr */ |
| 137 | 2,0,1,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val, |
| 138 | /* p2p attr */ |
| 139 | 0x0,12,0x76543210,0xba98,0,0,0xf,0x1,Rsv_val,Rsv_val, |
| 140 | /* power step */ |
| 141 | lcd_power_on_step_p2p, lcd_power_off_step_p2p, |
| 142 | /* backlight */ |
| 143 | 60,255,10,128,128, |
| 144 | BL_CTRL_MAX,0,1,0,200,200, |
| 145 | BL_PWM_POSITIVE,BL_PWM_C,180,100,25,1,0, |
| 146 | Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val, |
| 147 | Rsv_val,Rsv_val,Rsv_val,Rsv_val, |
| 148 | 10,10,Rsv_val}, |
| 149 | |
| 150 | {/*public p2p ceds : 3840x2160@60hz 6lane */ |
| 151 | "p2p_1",LCD_P2P,8, |
| 152 | /* basic timing */ |
| 153 | 3840,2160,5000,2250,16,29,0,6,81,0, |
| 154 | /* clk_attr */ |
| 155 | 2,0,1,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val, |
| 156 | /* p2p attr */ |
| 157 | 0x0,6,0x76543210,0xba98,0,0,0xf,0x1,Rsv_val,Rsv_val, |
| 158 | /* power step */ |
| 159 | lcd_power_on_step_p2p, lcd_power_off_step_p2p, |
| 160 | /* backlight */ |
| 161 | 60,255,10,128,128, |
| 162 | BL_CTRL_MAX,0,1,0,200,200, |
| 163 | BL_PWM_POSITIVE,BL_PWM_C,180,100,25,1,0, |
| 164 | Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val, |
| 165 | Rsv_val,Rsv_val,Rsv_val,Rsv_val, |
| 166 | 10,10,Rsv_val}, |
| 167 | |
| 168 | {/*public p2p chpi : 3840x2160@60hz 6lane */ |
| 169 | "p2p_2",LCD_P2P,8, |
| 170 | /* basic timing */ |
| 171 | 3840,2160,4400,2250,16,29,0,6,81,0, |
| 172 | /* clk_attr */ |
| 173 | 2,0,1,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val, |
| 174 | /* p2p attr */ |
| 175 | 0x10,6,0x76543210,0xba98,0,0,0xf,0x1,Rsv_val,Rsv_val, |
| 176 | /* power step */ |
| 177 | lcd_power_on_step_p2p, lcd_power_off_step_p2p, |
| 178 | /* backlight */ |
| 179 | 60,255,10,128,128, |
| 180 | BL_CTRL_MAX,0,1,0,200,200, |
| 181 | BL_PWM_POSITIVE,BL_PWM_C,180,100,25,1,0, |
| 182 | Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val, |
| 183 | Rsv_val,Rsv_val,Rsv_val,Rsv_val, |
| 184 | 10,10,Rsv_val}, |
| 185 | |
| 186 | {/*public p2p chpi : 3840x2160@60hz 12lane */ |
| 187 | "p2p_3",LCD_P2P,8, |
| 188 | /* basic timing */ |
| 189 | 3840,2160,4400,2250,16,29,0,6,81,0, |
| 190 | /* clk_attr */ |
| 191 | 2,0,1,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val, |
| 192 | /* p2p attr */ |
| 193 | 0x10,12,0x76543210,0xba98,0,0,0xf,0x1,Rsv_val,Rsv_val, |
| 194 | /* power step */ |
| 195 | lcd_power_on_step_p2p, lcd_power_off_step_p2p, |
| 196 | /* backlight */ |
| 197 | 60,255,10,128,128, |
| 198 | BL_CTRL_MAX,0,1,0,200,200, |
| 199 | BL_PWM_POSITIVE,BL_PWM_C,180,100,25,1,0, |
| 200 | Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val, |
| 201 | Rsv_val,Rsv_val,Rsv_val,Rsv_val, |
| 202 | 10,10,Rsv_val}, |
| 203 | |
| 204 | {/* 1920*1080*/ |
| 205 | "mlvds_0",LCD_MLVDS,8, |
| 206 | /* basic timing */ |
| 207 | 1920,1080,2200,1125,44,148,0,5,36,0, |
| 208 | /* clk_attr */ |
| 209 | 2,0,1,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val, |
| 210 | /* minilvds_attr */ |
| 211 | 6,0x76543210,0xba98,0x660,0,0,0xf,0x0,Rsv_val,Rsv_val, |
| 212 | /* power step */ |
| 213 | lcd_power_on_step, lcd_power_off_step, |
| 214 | /* backlight */ |
| 215 | 60,255,10,128,128, |
| 216 | BL_CTRL_MAX,0,1,0,200,200, |
| 217 | BL_PWM_POSITIVE,BL_PWM_C,180,100,25,1,0, |
| 218 | Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val, |
| 219 | Rsv_val,Rsv_val,Rsv_val,Rsv_val, |
| 220 | 10,10,Rsv_val}, |
| 221 | |
| 222 | {/* 1366*768*/ |
| 223 | "mlvds_1",LCD_MLVDS,8, |
| 224 | /* basic timing */ |
| 225 | 1366,768,1560,806,56,64,0,3,28,0, |
| 226 | /* clk_attr */ |
| 227 | 2,0,1,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val, |
| 228 | /* minilvds_attr */ |
| 229 | 6,0x76543210,0xba98,0x660,0,0,0xf,0x0,Rsv_val,Rsv_val, |
| 230 | /* power step */ |
| 231 | lcd_power_on_step, lcd_power_off_step, |
| 232 | /* backlight */ |
| 233 | 60,255,10,128,128, |
| 234 | BL_CTRL_MAX,0,1,0,200,200, |
| 235 | BL_PWM_POSITIVE,BL_PWM_C,180,100,25,1,0, |
| 236 | Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val, |
| 237 | Rsv_val,Rsv_val,Rsv_val,Rsv_val, |
| 238 | 10,10,Rsv_val}, |
| 239 | |
| 240 | {.panel_type = "invalid"}, |
| 241 | }; |
| 242 | |
| 243 | static struct lcd_pinmux_ctrl_s lcd_pinmux_ctrl[LCD_PINMX_MAX] = { |
| 244 | { |
| 245 | .name = "lcd_vbyone_pin", //GPIOH_15/16 |
| 246 | .pinmux_set = {{8, 0x30000000}, {9, 0x00000003}, {LCD_PINMUX_END, 0x0}}, |
| 247 | .pinmux_clr = {{8, 0xf0000000}, {9, 0x0000000f}, {LCD_PINMUX_END, 0x0}}, |
| 248 | }, |
| 249 | { |
| 250 | .name = "lcd_minilvds_pin", //GPIOH_0~15 |
| 251 | .pinmux_set = {{7, 0x11111111}, {8, 0x11111111}, {LCD_PINMUX_END, 0x0}}, |
| 252 | .pinmux_clr = {{7, 0xffffffff}, {8, 0xffffffff}, {LCD_PINMUX_END, 0x0}}, |
| 253 | }, |
| 254 | { |
| 255 | .name = "lcd_p2p_pin", //GPIOH_0~19 |
| 256 | .pinmux_set = {{7, 0x11111111}, {8, 0x11111111}, {9, 0x11111}, {LCD_PINMUX_END, 0x0}}, |
| 257 | .pinmux_clr = {{7, 0xffffffff}, {8, 0xffffffff}, {9, 0xfffff}, {LCD_PINMUX_END, 0x0}}, |
| 258 | }, |
| 259 | { |
| 260 | .name = "invalid", |
| 261 | }, |
| 262 | }; |
| 263 | |
| 264 | static struct lcd_pinmux_ctrl_s bl_pinmux_ctrl[BL_PINMUX_MAX] = { |
| 265 | { |
| 266 | .name = "bl_pwm_on_pin", //GPIOZ_5 |
| 267 | .pinmux_set = {{2, 0x00400000}, {LCD_PINMUX_END, 0x0}}, |
| 268 | .pinmux_clr = {{2, 0x00f00000}, {LCD_PINMUX_END, 0x0}}, |
| 269 | }, |
| 270 | { |
| 271 | .name = "bl_pwm_vs_on_pin", //GPIOZ_5 |
| 272 | .pinmux_set = {{2, 0x00300000}, {LCD_PINMUX_END, 0x0}}, |
| 273 | .pinmux_clr = {{2, 0x00f00000}, {LCD_PINMUX_END, 0x0}}, |
| 274 | }, |
| 275 | { |
| 276 | .name = "bl_pwm_combo_0_on_pin", //GPIOZ_5 |
| 277 | .pinmux_set = {{2, 0x00400000}, {LCD_PINMUX_END, 0x0}}, |
| 278 | .pinmux_clr = {{2, 0x00f00000}, {LCD_PINMUX_END, 0x0}}, |
| 279 | }, |
| 280 | { |
| 281 | .name = "bl_pwm_combo_1_on_pin", //GPIOZ_6 |
| 282 | .pinmux_set = {{2, 0x04000000}, {LCD_PINMUX_END, 0x0}}, |
| 283 | .pinmux_clr = {{2, 0x0f000000}, {LCD_PINMUX_END, 0x0}}, |
| 284 | }, |
| 285 | { |
| 286 | .name = "bl_pwm_combo_0_vs_on_pin", //GPIOZ_5 |
| 287 | .pinmux_set = {{2, 0x00300000}, {LCD_PINMUX_END, 0x0}}, |
| 288 | .pinmux_clr = {{2, 0x00f00000}, {LCD_PINMUX_END, 0x0}}, |
| 289 | }, |
| 290 | { |
| 291 | .name = "bl_pwm_combo_1_vs_on_pin", //GPIOZ_6 |
| 292 | .pinmux_set = {{2, 0x03000000}, {LCD_PINMUX_END, 0x0}}, |
| 293 | .pinmux_clr = {{2, 0x0f000000}, {LCD_PINMUX_END, 0x0}}, |
| 294 | }, |
| 295 | { |
| 296 | .name = "invalid", |
| 297 | }, |
| 298 | }; |
| 299 | |
| 300 | #ifdef CONFIG_AML_LOCAL_DIMMING |
| 301 | static struct lcd_pinmux_ctrl_s ldim_pinmux_ctrl[] = { |
| 302 | { |
| 303 | .name = "ldim_pwm_pin", //GPIOZ_5 |
| 304 | .pinmux_set = {{2, 0x00400000}, {LCD_PINMUX_END, 0x0}}, |
| 305 | .pinmux_clr = {{2, 0x00f00000}, {LCD_PINMUX_END, 0x0}}, |
| 306 | }, |
| 307 | { |
| 308 | .name = "ldim_pwm_vs_pin", //GPIOZ_5 |
| 309 | .pinmux_set = {{2, 0x00300000}, {LCD_PINMUX_END, 0x0}}, |
| 310 | .pinmux_clr = {{2, 0x00f00000}, {LCD_PINMUX_END, 0x0}}, |
| 311 | }, |
| 312 | { |
| 313 | .name = "analog_pwm_pin", //GPIOZ_6 |
| 314 | .pinmux_set = {{2, 0x04000000}, {LCD_PINMUX_END, 0x0}}, |
| 315 | .pinmux_clr = {{2, 0x0f000000}, {LCD_PINMUX_END, 0x0}}, |
| 316 | }, |
| 317 | { |
| 318 | .name = "invalid", |
| 319 | .pinmux_set = {{LCD_PINMUX_END, 0x0}}, |
| 320 | .pinmux_clr = {{LCD_PINMUX_END, 0x0}}, |
| 321 | }, |
| 322 | }; |
| 323 | #endif |
| 324 | |
| 325 | static struct vbyone_config_s lcd_vbyone_config = { |
| 326 | .lane_count = 8, |
| 327 | .byte_mode = 4, |
| 328 | .region_num = 2, |
| 329 | .color_fmt = 4, |
| 330 | }; |
| 331 | |
| 332 | static struct lvds_config_s lcd_lvds_config = { |
| 333 | .lvds_repack = 1, //0=JEDIA mode, 1=VESA mode |
| 334 | .dual_port = 1, //0=single port, 1=double port |
| 335 | .pn_swap = 0, //0=normal, 1=swap |
| 336 | .port_swap = 0, //0=normal, 1=swap |
| 337 | .lane_reverse = 0, //0=normal, 1=swap |
| 338 | }; |
| 339 | |
| 340 | static struct mlvds_config_s lcd_mlvds_config = { |
| 341 | .channel_num = 6, |
| 342 | .channel_sel0 = 0x45603012, |
| 343 | .channel_sel1 = 0x0, |
| 344 | .clk_phase = 0x0, |
| 345 | .pn_swap = 0, //0=normal, 1=swap |
| 346 | .bit_swap = 0, //0=normal, 1=swap |
| 347 | }; |
| 348 | |
| 349 | static struct p2p_config_s lcd_p2p_config = { |
| 350 | .p2p_type = 0, |
| 351 | .lane_num = 12, |
| 352 | .channel_sel0 = 0x76543210, |
| 353 | .channel_sel1 = 0xba98, |
| 354 | .pn_swap = 0, //0=normal, 1=swap |
| 355 | .bit_swap = 0, //0=normal, 1=swap |
| 356 | }; |
| 357 | |
| 358 | static struct lcd_power_ctrl_s lcd_power_ctrl = { |
| 359 | .power_on_step = { |
| 360 | { |
| 361 | .type = LCD_POWER_TYPE_MAX, /* ending flag */ |
| 362 | }, |
| 363 | }, |
| 364 | .power_off_step = { |
| 365 | { |
| 366 | .type = LCD_POWER_TYPE_MAX, /* ending flag */ |
| 367 | }, |
| 368 | }, |
| 369 | }; |
| 370 | |
| 371 | struct lcd_config_s lcd_config_dft = { |
| 372 | .lcd_mode = LCD_MODE_TV, |
| 373 | .lcd_key_valid = 0, |
| 374 | .lcd_basic = { |
| 375 | .model_name = "default", |
| 376 | .lcd_type = LCD_TYPE_MAX, |
| 377 | .lcd_bits = 8, |
| 378 | .h_active = 1920, |
| 379 | .v_active = 1080, |
| 380 | .h_period = 2200, |
| 381 | .v_period = 1125, |
| 382 | |
| 383 | .screen_width = 16, |
| 384 | .screen_height = 9, |
| 385 | }, |
| 386 | |
| 387 | .lcd_timing = { |
| 388 | .clk_auto = 1, |
| 389 | .lcd_clk = 60, |
| 390 | .ss_level = 0, |
| 391 | .fr_adjust_type = 0, |
| 392 | |
| 393 | .hsync_width = 44, |
| 394 | .hsync_bp = 148, |
| 395 | .hsync_pol = 0, |
| 396 | .vsync_width = 5, |
| 397 | .vsync_bp = 36, |
| 398 | .vsync_pol = 0, |
| 399 | }, |
| 400 | |
| 401 | .lcd_control = { |
| 402 | .lvds_config = &lcd_lvds_config, |
| 403 | .vbyone_config = &lcd_vbyone_config, |
| 404 | .mlvds_config = &lcd_mlvds_config, |
| 405 | .p2p_config = &lcd_p2p_config, |
| 406 | }, |
| 407 | .lcd_power = &lcd_power_ctrl, |
| 408 | |
| 409 | .pinctrl_ver = 2, |
| 410 | .lcd_pinmux = lcd_pinmux_ctrl, |
| 411 | .pinmux_set = {{LCD_PINMUX_END, 0x0}}, |
| 412 | .pinmux_clr = {{LCD_PINMUX_END, 0x0}}, |
| 413 | }; |
| 414 | |
| 415 | #ifdef CONFIG_AML_LCD_EXTERN |
| 416 | static char lcd_ext_gpio[LCD_EXTERN_GPIO_NUM_MAX][LCD_EXTERN_GPIO_LEN_MAX] = { |
| 417 | "invalid", /* ending flag */ |
| 418 | }; |
| 419 | |
| 420 | static unsigned char init_on_table[LCD_EXTERN_INIT_ON_MAX] = { |
| 421 | 0xc0, 2, 0x01, 0x2b, |
| 422 | 0xc0, 2, 0x02, 0x05, |
| 423 | 0xc0, 2, 0x03, 0x00, |
| 424 | 0xc0, 2, 0x04, 0x00, |
| 425 | 0xc0, 2, 0x05, 0x0c, |
| 426 | 0xc0, 2, 0x06, 0x04, |
| 427 | 0xc0, 2, 0x07, 0x21, |
| 428 | 0xc0, 2, 0x08, 0x0f, |
| 429 | 0xc0, 2, 0x09, 0x04, |
| 430 | 0xc0, 2, 0x0a, 0x00, |
| 431 | 0xc0, 2, 0x0b, 0x04, |
| 432 | 0xc0, 2, 0xff, 0x00, |
| 433 | 0xfd, 1, 100, /* delay 100ms */ |
| 434 | |
| 435 | 0xc1, 2, 0x01, 0xca, |
| 436 | 0xc1, 2, 0x02, 0x3b, |
| 437 | 0xc1, 2, 0x03, 0x33, |
| 438 | 0xc1, 2, 0x04, 0x05, |
| 439 | 0xc1, 2, 0x05, 0x2c, |
| 440 | 0xc1, 2, 0x06, 0xf2, |
| 441 | 0xc1, 2, 0x07, 0x9c, |
| 442 | 0xc1, 2, 0x08, 0x1b, |
| 443 | 0xc1, 2, 0x09, 0x82, |
| 444 | 0xc1, 2, 0x0a, 0x3d, |
| 445 | 0xc1, 2, 0x0b, 0x20, |
| 446 | 0xc1, 2, 0x0c, 0x11, |
| 447 | 0xc1, 2, 0x0d, 0xc4, |
| 448 | 0xc1, 2, 0x0e, 0x1a, |
| 449 | 0xc1, 2, 0x0f, 0x31, |
| 450 | 0xc1, 2, 0x10, 0x4c, |
| 451 | 0xc1, 2, 0x11, 0x12, |
| 452 | 0xc1, 2, 0x12, 0x90, |
| 453 | 0xc1, 2, 0x13, 0xf7, |
| 454 | 0xc1, 2, 0x14, 0x0c, |
| 455 | 0xc1, 2, 0x15, 0x20, |
| 456 | 0xc1, 2, 0x16, 0x13, |
| 457 | 0xff, 0, /* ending */ |
| 458 | }; |
| 459 | |
| 460 | static unsigned char init_off_table[LCD_EXTERN_INIT_OFF_MAX] = { |
| 461 | 0xff, 0, /* ending */ |
| 462 | }; |
| 463 | |
| 464 | struct lcd_extern_common_s ext_common_dft = { |
| 465 | .lcd_ext_key_valid = 0, |
| 466 | .lcd_ext_num = 1, |
| 467 | .pinmux_set = {{LCD_PINMUX_END, 0x0}}, |
| 468 | .pinmux_clr = {{LCD_PINMUX_END, 0x0}}, |
| 469 | }; |
| 470 | struct lcd_extern_config_s ext_config_dtf[LCD_EXTERN_NUM_MAX] = { |
| 471 | { |
| 472 | .index = 0, |
| 473 | .name = "i2c_ANX6862_7911", |
| 474 | .type = LCD_EXTERN_I2C, /* LCD_EXTERN_I2C, LCD_EXTERN_SPI, LCD_EXTERN_MAX */ |
| 475 | .status = 1, /* 0=disable, 1=enable */ |
| 476 | .i2c_addr = 0x20, /* 7bit i2c address */ |
| 477 | .i2c_addr2 = 0x74, /* 7bit i2c address, 0xff for none */ |
| 478 | .i2c_bus = LCD_EXTERN_I2C_BUS_1, /* LCD_EXTERN_I2C_BUS_0/1/2/3/4 */ |
| 479 | .cmd_size = 0xff, |
| 480 | .table_init_on = init_on_table, |
| 481 | .table_init_off = init_off_table, |
| 482 | }, |
| 483 | { |
| 484 | .index = LCD_EXTERN_INDEX_INVALID, |
| 485 | }, |
| 486 | }; |
| 487 | #endif |
| 488 | |
| 489 | struct bl_config_s bl_config_dft = { |
| 490 | .name = "default", |
| 491 | .bl_key_valid = 0, |
| 492 | |
| 493 | .level_default = 100, |
| 494 | .level_min = 10, |
| 495 | .level_max = 255, |
| 496 | .level_mid = 128, |
| 497 | .level_mid_mapping = 128, |
| 498 | .level = 0, |
| 499 | |
| 500 | .method = BL_CTRL_MAX, |
| 501 | .power_on_delay = 200, |
| 502 | .power_off_delay = 200, |
| 503 | |
| 504 | .en_gpio = 0xff, |
| 505 | .en_gpio_on = 1, |
| 506 | .en_gpio_off = 0, |
| 507 | |
| 508 | .bl_pwm = NULL, |
| 509 | .bl_pwm_combo0 = NULL, |
| 510 | .bl_pwm_combo1 = NULL, |
| 511 | .pwm_on_delay = 10, |
| 512 | .pwm_off_delay = 10, |
| 513 | |
| 514 | .bl_extern_index = 0xff, |
| 515 | |
| 516 | .pinctrl_ver = 2, |
| 517 | .bl_pinmux = bl_pinmux_ctrl, |
| 518 | .pinmux_set = {{LCD_PINMUX_END, 0x0}}, |
| 519 | .pinmux_clr = {{LCD_PINMUX_END, 0x0}}, |
| 520 | }; |
| 521 | |
| 522 | #ifdef CONFIG_AML_LOCAL_DIMMING |
| 523 | static unsigned char ldim_init_on[LDIM_INIT_ON_MAX]; |
| 524 | static unsigned char ldim_init_off[LDIM_INIT_OFF_MAX]; |
| 525 | struct ldim_dev_config_s ldim_config_dft = { |
| 526 | .type = LDIM_DEV_TYPE_NORMAL, |
| 527 | .cs_hold_delay = 0, |
| 528 | .cs_clk_delay = 0, |
| 529 | .en_gpio = 0xff, |
| 530 | .en_gpio_on = 1, |
| 531 | .en_gpio_off = 0, |
| 532 | .lamp_err_gpio = 0xff, |
| 533 | .fault_check = 0, |
| 534 | .write_check = 0, |
| 535 | .dim_min = 0x7f, /* min 3% duty */ |
| 536 | .dim_max = 0xfff, |
| 537 | .init_loaded = 0, |
| 538 | .cmd_size = 0xff, |
| 539 | .init_on = ldim_init_on, |
| 540 | .init_off = ldim_init_off, |
| 541 | .init_on_cnt = sizeof(ldim_init_on), |
| 542 | .init_off_cnt = sizeof(ldim_init_off), |
| 543 | .ldim_pwm_config = { |
| 544 | .index = 0, |
| 545 | .pwm_method = BL_PWM_POSITIVE, |
| 546 | .pwm_port = BL_PWM_MAX, |
| 547 | .pwm_duty_max = 100, |
| 548 | .pwm_duty_min = 0, |
| 549 | }, |
| 550 | .analog_pwm_config = { |
| 551 | .index = 1, |
| 552 | .pwm_method = BL_PWM_POSITIVE, |
| 553 | .pwm_port = BL_PWM_MAX, |
| 554 | .pwm_duty_max = 100, |
| 555 | .pwm_duty_min = 20, |
| 556 | }, |
| 557 | .pinctrl_ver = 1, |
| 558 | .ldim_pinmux = ldim_pinmux_ctrl, |
| 559 | }; |
| 560 | #endif |
| 561 | |
| 562 | void lcd_config_bsp_init(void) |
| 563 | { |
| 564 | int i, j; |
| 565 | |
| 566 | for (i = 0; i < LCD_CPU_GPIO_NUM_MAX; i++) { |
| 567 | if (strcmp(lcd_cpu_gpio[i], "invalid") == 0) |
| 568 | break; |
| 569 | strcpy(lcd_power_ctrl.cpu_gpio[i], lcd_cpu_gpio[i]); |
| 570 | } |
| 571 | for (j = i; j < LCD_CPU_GPIO_NUM_MAX; j++) |
| 572 | strcpy(lcd_power_ctrl.cpu_gpio[j], "invalid"); |
| 573 | for (i = 0; i < BL_GPIO_NUM_MAX; i++) { |
| 574 | if (strcmp(lcd_bl_gpio[i], "invalid") == 0) |
| 575 | break; |
| 576 | strcpy(bl_config_dft.gpio_name[i], lcd_bl_gpio[i]); |
| 577 | } |
| 578 | for (j = i; j < BL_GPIO_NUM_MAX; j++) |
| 579 | strcpy(bl_config_dft.gpio_name[j], "invalid"); |
| 580 | |
| 581 | #ifdef CONFIG_AML_LCD_EXTERN |
| 582 | for (i = 0; i < LCD_EXTERN_NUM_MAX; i++) { |
| 583 | if (ext_config_dtf[i].index == LCD_EXTERN_INDEX_INVALID) |
| 584 | break; |
| 585 | } |
| 586 | ext_common_dft.lcd_ext_num = i; |
| 587 | |
| 588 | for (i = 0; i < LCD_EXTERN_GPIO_NUM_MAX; i++) { |
| 589 | if (strcmp(lcd_ext_gpio[i], "invalid") == 0) |
| 590 | break; |
| 591 | strcpy(ext_common_dft.gpio_name[i], lcd_ext_gpio[i]); |
| 592 | } |
| 593 | for (j = i; j < LCD_EXTERN_GPIO_NUM_MAX; j++) |
| 594 | strcpy(ext_common_dft.gpio_name[j], "invalid"); |
| 595 | |
| 596 | #endif |
| 597 | #ifdef CONFIG_AML_LOCAL_DIMMING |
| 598 | strcpy(ldim_config_dft.name, "invalid"); |
| 599 | strcpy(ldim_config_dft.pinmux_name, "invalid"); |
| 600 | for (i = 0; i < BL_GPIO_NUM_MAX; i++) { |
| 601 | if (strcmp(lcd_bl_ldim_gpio[i], "invalid") == 0) |
| 602 | break; |
| 603 | strcpy(ldim_config_dft.gpio_name[i], lcd_bl_ldim_gpio[i]); |
| 604 | } |
| 605 | for (j = i; j < BL_GPIO_NUM_MAX; j++) |
| 606 | strcpy(ldim_config_dft.gpio_name[j], "invalid"); |
| 607 | #endif |
| 608 | } |