blob: f0ea1bbb57168e962725ca8422f58ab073876c11 [file] [log] [blame]
Googler695f9d92023-09-11 15:38:29 +08001/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
2/*
3 * board/amlogic/tm2_t962x3_ab309_v1/lcd.c
4 *
5 * Copyright (C) 2020 Amlogic, Inc. All rights reserved.
6 *
7 */
8
9#include <common.h>
10#include <amlogic/aml_lcd.h>
11
12static char lcd_cpu_gpio[LCD_CPU_GPIO_NUM_MAX][LCD_CPU_GPIO_NAME_MAX] = {
13 "invalid", /* ending flag */
14};
15
16static struct lcd_power_step_s lcd_power_on_step[] = {
17 {LCD_POWER_TYPE_SIGNAL,0,0,0,},
18 {LCD_POWER_TYPE_MAX, 0,0,0,}, /* ending flag */
19};
20static struct lcd_power_step_s lcd_power_off_step[] = {
21 {LCD_POWER_TYPE_SIGNAL,0,0,0,},
22 {LCD_POWER_TYPE_MAX, 0,0,0,}, /* ending flag */
23};
24
25static struct lcd_power_step_s lcd_power_on_step_p2p[] = {
26 {LCD_POWER_TYPE_EXTERN,0,0,100,}, /* init external voltage */
27 {LCD_POWER_TYPE_SIGNAL,0,0,0,},
28 {LCD_POWER_TYPE_MAX, 0,0,0,}, /* ending flag */
29};
30static struct lcd_power_step_s lcd_power_off_step_p2p[] = {
31 {LCD_POWER_TYPE_SIGNAL,0,0,0,},
32 {LCD_POWER_TYPE_MAX, 0,0,0,}, /* ending flag */
33};
34
35static char lcd_bl_gpio[BL_GPIO_NUM_MAX][LCD_CPU_GPIO_NAME_MAX] = {
36 "invalid", /* ending flag */
37};
38
39struct ext_lcd_config_s ext_lcd_config[LCD_NUM_MAX] = {
40 {/* normal*/
41 "lvds_0",LCD_LVDS,8,
42 /* basic timing */
43 1920,1080,2200,1125,44,148,0,5,36,0,
44 /* clk_attr */
45 0,0,1,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,
46 /* lvds_attr */
47 1,1,0,0,0,0xf,0x0,Rsv_val,Rsv_val,Rsv_val,
48 /* power step */
49 lcd_power_on_step, lcd_power_off_step,
50 /* backlight */
51 60,255,10,128,128,
52 BL_CTRL_MAX,0,1,0,200,200,
53 BL_PWM_POSITIVE,BL_PWM_C,180,100,25,1,0,
54 Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,
55 Rsv_val,Rsv_val,Rsv_val,Rsv_val,
56 10,10,Rsv_val},
57
58 {/* for HDMI convert*/
59 "lvds_1",LCD_LVDS,8,
60 /* basic timing */
61 1920,1080,2200,1125,44,148,0,5,36,0,
62 /* clk_attr */
63 1,0,1,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,
64 /* lvds_attr */
65 1,1,0,0,0,0xf,0x0,Rsv_val,Rsv_val,Rsv_val,
66 /* power step */
67 lcd_power_on_step, lcd_power_off_step,
68 /* backlight */
69 60,255,10,128,128,
70 BL_CTRL_MAX,0,1,0,200,200,
71 BL_PWM_POSITIVE,BL_PWM_C,180,100,25,1,0,
72 Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,
73 Rsv_val,Rsv_val,Rsv_val,Rsv_val,
74 10,10,Rsv_val},
75
76 {/*public 2-region vx1 : 3840x2160@60hz 8lane */
77 "vbyone_0",LCD_VBYONE,10,
78 /* basic timing */
79 3840,2160,4400,2250,33,477,0,6,81,0,
80 /* clk_attr */
81 2,0,1,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,
82 /* vbyone_attr */
83 8,2,4,4,0xf,0x1,Rsv_val,Rsv_val,Rsv_val,Rsv_val,
84 /* power step */
85 lcd_power_on_step, lcd_power_off_step,
86 /* backlight */
87 60,255,10,128,128,
88 BL_CTRL_MAX,0,1,0,200,200,
89 BL_PWM_POSITIVE,BL_PWM_C,180,100,25,1,0,
90 Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,
91 Rsv_val,Rsv_val,Rsv_val,Rsv_val,
92 10,10,Rsv_val},
93
94 {/*public 1-region vx1 : 3840x2160@60hz 8lane */
95 "vbyone_1",LCD_VBYONE,10,
96 /* basic timing */
97 3840,2160,4400,2250,33,477,0,6,81,0,
98 /* clk_attr */
99 2,0,1,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,
100 /* vbyone_attr */
101 8,1,4,4,0xf,0x1,Rsv_val,Rsv_val,Rsv_val,Rsv_val,
102 /* power step */
103 lcd_power_on_step, lcd_power_off_step,
104 /* backlight */
105 60,255,10,128,128,
106 BL_CTRL_MAX,0,1,0,200,200,
107 BL_PWM_POSITIVE,BL_PWM_C,180,100,25,1,0,
108 Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,
109 Rsv_val,Rsv_val,Rsv_val,Rsv_val,
110 10,10,Rsv_val},
111
112 {/*public p2p ceds : 3840x2160@60hz 12lane */
113 "p2p_0",LCD_P2P,8,
114 /* basic timing */
115 3840,2160,5000,2250,16,29,0,6,81,0,
116 /* clk_attr */
117 2,0,1,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,
118 /* p2p attr */
119 0x0,12,0x76543210,0xba98,0,0,0xf,0x1,Rsv_val,Rsv_val,
120 /* power step */
121 lcd_power_on_step_p2p, lcd_power_off_step_p2p,
122 /* backlight */
123 60,255,10,128,128,
124 BL_CTRL_MAX,0,1,0,200,200,
125 BL_PWM_POSITIVE,BL_PWM_C,180,100,25,1,0,
126 Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,
127 Rsv_val,Rsv_val,Rsv_val,Rsv_val,
128 10,10,Rsv_val},
129
130 {/*public p2p ceds : 3840x2160@60hz 6lane */
131 "p2p_1",LCD_P2P,8,
132 /* basic timing */
133 3840,2160,5000,2250,16,29,0,6,81,0,
134 /* clk_attr */
135 2,0,1,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,
136 /* p2p attr */
137 0x0,6,0x76543210,0xba98,0,0,0xf,0x1,Rsv_val,Rsv_val,
138 /* power step */
139 lcd_power_on_step_p2p, lcd_power_off_step_p2p,
140 /* backlight */
141 60,255,10,128,128,
142 BL_CTRL_MAX,0,1,0,200,200,
143 BL_PWM_POSITIVE,BL_PWM_C,180,100,25,1,0,
144 Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,
145 Rsv_val,Rsv_val,Rsv_val,Rsv_val,
146 10,10,Rsv_val},
147
148 {/*public p2p chpi : 3840x2160@60hz 6lane */
149 "p2p_2",LCD_P2P,8,
150 /* basic timing */
151 3840,2160,4400,2250,16,29,0,6,81,0,
152 /* clk_attr */
153 2,0,1,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,
154 /* p2p attr */
155 0x10,6,0x76543210,0xba98,0,0,0xf,0x1,Rsv_val,Rsv_val,
156 /* power step */
157 lcd_power_on_step_p2p, lcd_power_off_step_p2p,
158 /* backlight */
159 60,255,10,128,128,
160 BL_CTRL_MAX,0,1,0,200,200,
161 BL_PWM_POSITIVE,BL_PWM_C,180,100,25,1,0,
162 Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,
163 Rsv_val,Rsv_val,Rsv_val,Rsv_val,
164 10,10,Rsv_val},
165
166 {/*public p2p chpi : 3840x2160@60hz 12lane */
167 "p2p_3",LCD_P2P,8,
168 /* basic timing */
169 3840,2160,4400,2250,16,29,0,6,81,0,
170 /* clk_attr */
171 2,0,1,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,
172 /* p2p attr */
173 0x10,12,0x76543210,0xba98,0,0,0xf,0x1,Rsv_val,Rsv_val,
174 /* power step */
175 lcd_power_on_step_p2p, lcd_power_off_step_p2p,
176 /* backlight */
177 60,255,10,128,128,
178 BL_CTRL_MAX,0,1,0,200,200,
179 BL_PWM_POSITIVE,BL_PWM_C,180,100,25,1,0,
180 Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,
181 Rsv_val,Rsv_val,Rsv_val,Rsv_val,
182 10,10,Rsv_val},
183
184 {/* 1920*1080*/
185 "mlvds_0",LCD_MLVDS,8,
186 /* basic timing */
187 1920,1080,2200,1125,44,148,0,5,36,0,
188 /* clk_attr */
189 2,0,1,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,
190 /* minilvds_attr */
191 6,0x76543210,0xba98,0x660,0,0,0xf,0x0,Rsv_val,Rsv_val,
192 /* power step */
193 lcd_power_on_step, lcd_power_off_step,
194 /* backlight */
195 60,255,10,128,128,
196 BL_CTRL_MAX,0,1,0,200,200,
197 BL_PWM_POSITIVE,BL_PWM_C,180,100,25,1,0,
198 Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,
199 Rsv_val,Rsv_val,Rsv_val,Rsv_val,
200 10,10,Rsv_val},
201
202 {/* 1366*768*/
203 "mlvds_1",LCD_MLVDS,8,
204 /* basic timing */
205 1366,768,1560,806,56,64,0,3,28,0,
206 /* clk_attr */
207 2,0,1,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,
208 /* minilvds_attr */
209 6,0x76543210,0xba98,0x660,0,0,0xf,0x0,Rsv_val,Rsv_val,
210 /* power step */
211 lcd_power_on_step, lcd_power_off_step,
212 /* backlight */
213 60,255,10,128,128,
214 BL_CTRL_MAX,0,1,0,200,200,
215 BL_PWM_POSITIVE,BL_PWM_C,180,100,25,1,0,
216 Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,Rsv_val,
217 Rsv_val,Rsv_val,Rsv_val,Rsv_val,
218 10,10,Rsv_val},
219
220 {.panel_type = "invalid"},
221};
222
223static struct lcd_pinmux_ctrl_s lcd_pinmux_ctrl[LCD_PINMX_MAX] = {
224 {
225 .name = "lcd_vbyone_pin", //GPIOH_15/16
226 .pinmux_set = {{8, 0x30000000}, {9, 0x00000003}, {LCD_PINMUX_END, 0x0}},
227 .pinmux_clr = {{8, 0xf0000000}, {9, 0x0000000f}, {LCD_PINMUX_END, 0x0}},
228 },
229 {
230 .name = "lcd_minilvds_pin", //GPIOH_0~15
231 .pinmux_set = {{7, 0x11111111}, {8, 0x11111111}, {LCD_PINMUX_END, 0x0}},
232 .pinmux_clr = {{7, 0xffffffff}, {8, 0xffffffff}, {LCD_PINMUX_END, 0x0}},
233 },
234 {
235 .name = "lcd_p2p_pin", //GPIOH_0~19
236 .pinmux_set = {{7, 0x11111111}, {8, 0x11111111}, {9, 0x1}, {LCD_PINMUX_END, 0x0}},
237 .pinmux_clr = {{7, 0xffffffff}, {8, 0xffffffff}, {9, 0xfffff}, {LCD_PINMUX_END, 0x0}},
238 },
239 {
240 .name = "invalid",
241 },
242};
243
244static struct lcd_pinmux_ctrl_s bl_pinmux_ctrl[BL_PINMUX_MAX] = {
245 {
246 .name = "invalid",
247 },
248};
249
250static struct vbyone_config_s lcd_vbyone_config = {
251 .lane_count = 8,
252 .byte_mode = 4,
253 .region_num = 2,
254 .color_fmt = 4,
255};
256
257static struct lvds_config_s lcd_lvds_config = {
258 .lvds_repack = 1, //0=JEDIA mode, 1=VESA mode
259 .dual_port = 1, //0=single port, 1=double port
260 .pn_swap = 0, //0=normal, 1=swap
261 .port_swap = 0, //0=normal, 1=swap
262 .lane_reverse = 0, //0=normal, 1=swap
263};
264
265static struct mlvds_config_s lcd_mlvds_config = {
266 .channel_num = 6,
267 .channel_sel0 = 0x45603012,
268 .channel_sel1 = 0x0,
269 .clk_phase = 0x0,
270 .pn_swap = 0, //0=normal, 1=swap
271 .bit_swap = 0, //0=normal, 1=swap
272};
273
274static struct p2p_config_s lcd_p2p_config = {
275 .p2p_type = 0,
276 .lane_num = 12,
277 .channel_sel0 = 0x76543210,
278 .channel_sel1 = 0xba98,
279 .pn_swap = 0, //0=normal, 1=swap
280 .bit_swap = 0, //0=normal, 1=swap
281};
282
283static struct lcd_power_ctrl_s lcd_power_ctrl = {
284 .power_on_step = {
285 {
286 .type = LCD_POWER_TYPE_MAX, /* ending flag */
287 },
288 },
289 .power_off_step = {
290 {
291 .type = LCD_POWER_TYPE_MAX, /* ending flag */
292 },
293 },
294};
295
296struct lcd_config_s lcd_config_dft = {
297 .lcd_mode = LCD_MODE_TV,
298 .lcd_key_valid = 0,
299 .lcd_basic = {
300 .model_name = "default",
301 .lcd_type = LCD_TYPE_MAX,
302 .lcd_bits = 8,
303 .h_active = 1920,
304 .v_active = 1080,
305 .h_period = 2200,
306 .v_period = 1125,
307
308 .screen_width = 16,
309 .screen_height = 9,
310 },
311
312 .lcd_timing = {
313 .clk_auto = 1,
314 .lcd_clk = 60,
315 .ss_level = 0,
316 .fr_adjust_type = 0,
317
318 .hsync_width = 44,
319 .hsync_bp = 148,
320 .hsync_pol = 0,
321 .vsync_width = 5,
322 .vsync_bp = 36,
323 .vsync_pol = 0,
324 },
325
326 .lcd_control = {
327 .lvds_config = &lcd_lvds_config,
328 .vbyone_config = &lcd_vbyone_config,
329 .mlvds_config = &lcd_mlvds_config,
330 .p2p_config = &lcd_p2p_config,
331 },
332 .lcd_power = &lcd_power_ctrl,
333
334 .pinctrl_ver = 2,
335 .lcd_pinmux = lcd_pinmux_ctrl,
336 .pinmux_set = {{LCD_PINMUX_END, 0x0}},
337 .pinmux_clr = {{LCD_PINMUX_END, 0x0}},
338};
339
340#ifdef CONFIG_AML_LCD_EXTERN
341static char lcd_ext_gpio[LCD_EXTERN_GPIO_NUM_MAX][LCD_EXTERN_GPIO_LEN_MAX] = {
342 "invalid", /* ending flag */
343};
344
345static unsigned char init_on_table[LCD_EXTERN_INIT_ON_MAX] = {
346 0xc0, 2, 0x01, 0x2b,
347 0xc0, 2, 0x02, 0x05,
348 0xc0, 2, 0x03, 0x00,
349 0xc0, 2, 0x04, 0x00,
350 0xc0, 2, 0x05, 0x0c,
351 0xc0, 2, 0x06, 0x04,
352 0xc0, 2, 0x07, 0x21,
353 0xc0, 2, 0x08, 0x0f,
354 0xc0, 2, 0x09, 0x04,
355 0xc0, 2, 0x0a, 0x00,
356 0xc0, 2, 0x0b, 0x04,
357 0xc0, 2, 0xff, 0x00,
358 0xfd, 1, 100, /* delay 100ms */
359
360 0xc1, 2, 0x01, 0xca,
361 0xc1, 2, 0x02, 0x3b,
362 0xc1, 2, 0x03, 0x33,
363 0xc1, 2, 0x04, 0x05,
364 0xc1, 2, 0x05, 0x2c,
365 0xc1, 2, 0x06, 0xf2,
366 0xc1, 2, 0x07, 0x9c,
367 0xc1, 2, 0x08, 0x1b,
368 0xc1, 2, 0x09, 0x82,
369 0xc1, 2, 0x0a, 0x3d,
370 0xc1, 2, 0x0b, 0x20,
371 0xc1, 2, 0x0c, 0x11,
372 0xc1, 2, 0x0d, 0xc4,
373 0xc1, 2, 0x0e, 0x1a,
374 0xc1, 2, 0x0f, 0x31,
375 0xc1, 2, 0x10, 0x4c,
376 0xc1, 2, 0x11, 0x12,
377 0xc1, 2, 0x12, 0x90,
378 0xc1, 2, 0x13, 0xf7,
379 0xc1, 2, 0x14, 0x0c,
380 0xc1, 2, 0x15, 0x20,
381 0xc1, 2, 0x16, 0x13,
382 0xff, 0, /* ending */
383};
384
385static unsigned char init_off_table[LCD_EXTERN_INIT_OFF_MAX] = {
386 0xff, 0, /* ending */
387};
388
389struct lcd_extern_common_s ext_common_dft = {
390 .lcd_ext_key_valid = 0,
391 .lcd_ext_num = 1,
392 .pinmux_set = {{LCD_PINMUX_END, 0x0}},
393 .pinmux_clr = {{LCD_PINMUX_END, 0x0}},
394};
395struct lcd_extern_config_s ext_config_dtf[LCD_EXTERN_NUM_MAX] = {
396 {
397 .index = 0,
398 .name = "i2c_ANX6862_7911",
399 .type = LCD_EXTERN_I2C, /* LCD_EXTERN_I2C, LCD_EXTERN_SPI, LCD_EXTERN_MAX */
400 .status = 1, /* 0=disable, 1=enable */
401 .i2c_addr = 0x20, /* 7bit i2c address */
402 .i2c_addr2 = 0x74, /* 7bit i2c address, 0xff for none */
403 .i2c_bus = LCD_EXTERN_I2C_BUS_1, /* LCD_EXTERN_I2C_BUS_0/1/2/3/4 */
404 .cmd_size = 0xff,
405 .table_init_on = init_on_table,
406 .table_init_off = init_off_table,
407 },
408 {
409 .index = LCD_EXTERN_INDEX_INVALID,
410 },
411};
412#endif
413
414struct bl_config_s bl_config_dft = {
415 .name = "default",
416 .bl_key_valid = 0,
417
418 .level_default = 100,
419 .level_min = 10,
420 .level_max = 255,
421 .level_mid = 128,
422 .level_mid_mapping = 128,
423 .level = 0,
424
425 .method = BL_CTRL_MAX,
426 .power_on_delay = 200,
427 .power_off_delay = 200,
428
429 .en_gpio = 0xff,
430 .en_gpio_on = 1,
431 .en_gpio_off = 0,
432
433 .bl_pwm = NULL,
434 .bl_pwm_combo0 = NULL,
435 .bl_pwm_combo1 = NULL,
436 .pwm_on_delay = 10,
437 .pwm_off_delay = 10,
438
439 .bl_extern_index = 0xff,
440
441 .pinctrl_ver = 2,
442 .bl_pinmux = bl_pinmux_ctrl,
443 .pinmux_set = {{LCD_PINMUX_END, 0x0}},
444 .pinmux_clr = {{LCD_PINMUX_END, 0x0}},
445};
446
447void lcd_config_bsp_init(void)
448{
449 int i, j;
450
451 for (i = 0; i < LCD_CPU_GPIO_NUM_MAX; i++) {
452 if (strcmp(lcd_cpu_gpio[i], "invalid") == 0)
453 break;
454 strcpy(lcd_power_ctrl.cpu_gpio[i], lcd_cpu_gpio[i]);
455 }
456 for (j = i; j < LCD_CPU_GPIO_NUM_MAX; j++)
457 strcpy(lcd_power_ctrl.cpu_gpio[j], "invalid");
458 for (i = 0; i < BL_GPIO_NUM_MAX; i++) {
459 if (strcmp(lcd_bl_gpio[i], "invalid") == 0)
460 break;
461 strcpy(bl_config_dft.gpio_name[i], lcd_bl_gpio[i]);
462 }
463 for (j = i; j < BL_GPIO_NUM_MAX; j++)
464 strcpy(bl_config_dft.gpio_name[j], "invalid");
465
466#ifdef CONFIG_AML_LCD_EXTERN
467 for (i = 0; i < LCD_EXTERN_NUM_MAX; i++) {
468 if (ext_config_dtf[i].index == LCD_EXTERN_INDEX_INVALID)
469 break;
470 }
471 ext_common_dft.lcd_ext_num = i;
472
473 for (i = 0; i < LCD_EXTERN_GPIO_NUM_MAX; i++) {
474 if (strcmp(lcd_ext_gpio[i], "invalid") == 0)
475 break;
476 strcpy(ext_common_dft.gpio_name[i], lcd_ext_gpio[i]);
477 }
478 for (j = i; j < LCD_EXTERN_GPIO_NUM_MAX; j++)
479 strcpy(ext_common_dft.gpio_name[j], "invalid");
480
481#endif
482}