Project import generated by Copybara. GitOrigin-RevId: 8b8d1c95e7d393e71fb63f3580ad3b79f9caca00

commit: f195aa6e0fc5ace54e419c4367fe304c26a00f07 [log] [tgz]
author: Googler <noreply@google.com> Fri Dec 02 10:54:13 2022 +0800
committer: Googler <noreply@google.com> Wed Apr 19 14:17:56 2023 -0700
tree: 50e2fcf61b0ce3378f6d2db6651ba44379e8910e
parent: 0bde759bc5682bba7de558e308410bbc6d08d2d8 [diff]
diff --git a/bifrost/Makefile b/bifrost/Makefile
index 0b9a600..1a63a98 100644
--- a/bifrost/Makefile
+++ b/bifrost/Makefile

@@ -23,19 +23,20 @@
                  -I$(KERNEL_SRC)/$(M)/../bifrost/$(GPU_DRV_VERSION)/kernel/drivers/gpu/arm/midgard/platform/devicetree \
                  -I$(KERNEL_SRC)/$(M)/../bifrost/$(GPU_DRV_VERSION)/kernel/drivers/gpu/arm/midgard/ipa \
                  -I$(KERNEL_SRC)/$(M)/../bifrost/$(GPU_DRV_VERSION)/kernel/drivers/gpu/arm/midgard \
-                 -I$(KERNEL_SRC)/$(M)/../dvalin/kernel/include
+                 -I$(KERNEL_SRC)/$(M)/../bifrost/$(GPU_DRV_VERSION)/kernel/include
 
 KBUILD_CFLAGS_MODULE += $(GKI_EXT_MODULE_PREDEFINE)
 $(warning "CC:"$(CC) )
 $(warning "HOSTCC:"$(HOSTCC) )
 $(warning "CROSS_COMPILE:"$(CROSS_COMPILE) )
+
 modules:
 	$(MAKE) -C $(KERNEL_SRC) M=$(M)/$(GPU_DRV_VERSION)/kernel/drivers/gpu/arm/midgard  \
-	EXTRA_CFLAGS="-DCONFIG_MALI_PLATFORM_DEVICETREE -DCONFIG_MALI_MIDGARD_DVFS -DCONFIG_MALI_BACKEND=gpu " \
+	EXTRA_CFLAGS="-DCONFIG_MALI_PLATFORM_DEVICETREE -DCONFIG_MALI_MIDGARD_DVFS -DCONFIG_MALI_BACKEND=gpu -DCONFIG_MALI_GATOR_SUPPORT " \
 	EXTRA_CFLAGS+="-DCONFIG_MALI_DMA_BUF_MAP_ON_DEMAND=1 -DCONFIG_MALI_DMA_BUF_LEGACY_COMPAT=0 " \
 	EXTRA_CFLAGS+="-Wno-error -Wno-pointer-sign -Wno-error=frame-larger-than= $(EXTRA_INCLUDE) $(KBUILD_CFLAGS_MODULE)" \
 	EXTRA_LDFLAGS+="--strip-debug" \
-	CONFIG_MALI_MIDGARD=m CONFIG_MALI_PLATFORM_DEVICETREE=y CONFIG_MALI_MIDGARD_DVFS=y CONFIG_MALI_BACKEND=gpu
+	CONFIG_MALI_MIDGARD=m CONFIG_MALI_PLATFORM_DEVICETREE=y CONFIG_MALI_MIDGARD_DVFS=y CONFIG_MALI_BACKEND=gpu CONFIG_MALI_GATOR_SUPPORT=y CONFIG_MALI_PLATFORM_NAME="devicetree"
 
 modules_install:
 	@$(MAKE) INSTALL_MOD_STRIP=1 M=$(M)/$(GPU_DRV_VERSION)/kernel/drivers/gpu/arm/midgard -C $(KERNEL_SRC) modules_install

diff --git a/bifrost/r32p1 b/bifrost/r32p1
deleted file mode 120000
index 5a1e08b..0000000
--- a/bifrost/r32p1
+++ /dev/null

@@ -1 +0,0 @@
-../dvalin
\ No newline at end of file

diff --git a/dvalin/kernel/Documentation/ABI/testing/sysfs-device-mali b/bifrost/r32p1/kernel/Documentation/ABI/testing/sysfs-device-mali
similarity index 100%
rename from dvalin/kernel/Documentation/ABI/testing/sysfs-device-mali
rename to bifrost/r32p1/kernel/Documentation/ABI/testing/sysfs-device-mali


diff --git a/dvalin/kernel/Documentation/devicetree/bindings/arm/mali-midgard.txt b/bifrost/r32p1/kernel/Documentation/devicetree/bindings/arm/mali-midgard.txt
similarity index 100%
rename from dvalin/kernel/Documentation/devicetree/bindings/arm/mali-midgard.txt
rename to bifrost/r32p1/kernel/Documentation/devicetree/bindings/arm/mali-midgard.txt


diff --git a/dvalin/kernel/Documentation/devicetree/bindings/arm/memory_group_manager.txt b/bifrost/r32p1/kernel/Documentation/devicetree/bindings/arm/memory_group_manager.txt
similarity index 100%
rename from dvalin/kernel/Documentation/devicetree/bindings/arm/memory_group_manager.txt
rename to bifrost/r32p1/kernel/Documentation/devicetree/bindings/arm/memory_group_manager.txt


diff --git a/dvalin/kernel/Documentation/devicetree/bindings/arm/priority_control_manager.txt b/bifrost/r32p1/kernel/Documentation/devicetree/bindings/arm/priority_control_manager.txt
similarity index 100%
rename from dvalin/kernel/Documentation/devicetree/bindings/arm/priority_control_manager.txt
rename to bifrost/r32p1/kernel/Documentation/devicetree/bindings/arm/priority_control_manager.txt


diff --git a/dvalin/kernel/Documentation/devicetree/bindings/arm/protected_memory_allocator.txt b/bifrost/r32p1/kernel/Documentation/devicetree/bindings/arm/protected_memory_allocator.txt
similarity index 100%
rename from dvalin/kernel/Documentation/devicetree/bindings/arm/protected_memory_allocator.txt
rename to bifrost/r32p1/kernel/Documentation/devicetree/bindings/arm/protected_memory_allocator.txt


diff --git a/dvalin/kernel/Documentation/devicetree/bindings/power/mali-opp.txt b/bifrost/r32p1/kernel/Documentation/devicetree/bindings/power/mali-opp.txt
similarity index 100%
rename from dvalin/kernel/Documentation/devicetree/bindings/power/mali-opp.txt
rename to bifrost/r32p1/kernel/Documentation/devicetree/bindings/power/mali-opp.txt


diff --git a/dvalin/kernel/Documentation/dma-buf-test-exporter.txt b/bifrost/r32p1/kernel/Documentation/dma-buf-test-exporter.txt
similarity index 100%
rename from dvalin/kernel/Documentation/dma-buf-test-exporter.txt
rename to bifrost/r32p1/kernel/Documentation/dma-buf-test-exporter.txt


diff --git a/dvalin/kernel/Mconfig b/bifrost/r32p1/kernel/Mconfig
similarity index 100%
rename from dvalin/kernel/Mconfig
rename to bifrost/r32p1/kernel/Mconfig


diff --git a/dvalin/kernel/build.bp b/bifrost/r32p1/kernel/build.bp
similarity index 100%
rename from dvalin/kernel/build.bp
rename to bifrost/r32p1/kernel/build.bp


diff --git a/dvalin/kernel/drivers/base/arm/Kbuild b/bifrost/r32p1/kernel/drivers/base/arm/Kbuild
similarity index 100%
rename from dvalin/kernel/drivers/base/arm/Kbuild
rename to bifrost/r32p1/kernel/drivers/base/arm/Kbuild


diff --git a/dvalin/kernel/drivers/base/arm/Kconfig b/bifrost/r32p1/kernel/drivers/base/arm/Kconfig
similarity index 100%
rename from dvalin/kernel/drivers/base/arm/Kconfig
rename to bifrost/r32p1/kernel/drivers/base/arm/Kconfig


diff --git a/dvalin/kernel/drivers/base/arm/Makefile b/bifrost/r32p1/kernel/drivers/base/arm/Makefile
similarity index 100%
rename from dvalin/kernel/drivers/base/arm/Makefile
rename to bifrost/r32p1/kernel/drivers/base/arm/Makefile


diff --git a/dvalin/kernel/drivers/base/arm/Mconfig b/bifrost/r32p1/kernel/drivers/base/arm/Mconfig
similarity index 100%
rename from dvalin/kernel/drivers/base/arm/Mconfig
rename to bifrost/r32p1/kernel/drivers/base/arm/Mconfig


diff --git a/dvalin/kernel/drivers/base/arm/dma_buf_lock/src/Kbuild b/bifrost/r32p1/kernel/drivers/base/arm/dma_buf_lock/src/Kbuild
similarity index 100%
rename from dvalin/kernel/drivers/base/arm/dma_buf_lock/src/Kbuild
rename to bifrost/r32p1/kernel/drivers/base/arm/dma_buf_lock/src/Kbuild


diff --git a/dvalin/kernel/drivers/base/arm/dma_buf_lock/src/Makefile b/bifrost/r32p1/kernel/drivers/base/arm/dma_buf_lock/src/Makefile
similarity index 100%
rename from dvalin/kernel/drivers/base/arm/dma_buf_lock/src/Makefile
rename to bifrost/r32p1/kernel/drivers/base/arm/dma_buf_lock/src/Makefile


diff --git a/dvalin/kernel/drivers/base/arm/dma_buf_lock/src/dma_buf_lock.c b/bifrost/r32p1/kernel/drivers/base/arm/dma_buf_lock/src/dma_buf_lock.c
similarity index 100%
rename from dvalin/kernel/drivers/base/arm/dma_buf_lock/src/dma_buf_lock.c
rename to bifrost/r32p1/kernel/drivers/base/arm/dma_buf_lock/src/dma_buf_lock.c


diff --git a/dvalin/kernel/drivers/base/arm/dma_buf_lock/src/dma_buf_lock.h b/bifrost/r32p1/kernel/drivers/base/arm/dma_buf_lock/src/dma_buf_lock.h
similarity index 100%
rename from dvalin/kernel/drivers/base/arm/dma_buf_lock/src/dma_buf_lock.h
rename to bifrost/r32p1/kernel/drivers/base/arm/dma_buf_lock/src/dma_buf_lock.h


diff --git a/dvalin/kernel/drivers/base/arm/dma_buf_test_exporter/Kbuild b/bifrost/r32p1/kernel/drivers/base/arm/dma_buf_test_exporter/Kbuild
similarity index 100%
rename from dvalin/kernel/drivers/base/arm/dma_buf_test_exporter/Kbuild
rename to bifrost/r32p1/kernel/drivers/base/arm/dma_buf_test_exporter/Kbuild


diff --git a/dvalin/kernel/drivers/base/arm/dma_buf_test_exporter/build.bp b/bifrost/r32p1/kernel/drivers/base/arm/dma_buf_test_exporter/build.bp
similarity index 100%
rename from dvalin/kernel/drivers/base/arm/dma_buf_test_exporter/build.bp
rename to bifrost/r32p1/kernel/drivers/base/arm/dma_buf_test_exporter/build.bp


diff --git a/dvalin/kernel/drivers/base/arm/dma_buf_test_exporter/dma-buf-test-exporter.c b/bifrost/r32p1/kernel/drivers/base/arm/dma_buf_test_exporter/dma-buf-test-exporter.c
similarity index 100%
rename from dvalin/kernel/drivers/base/arm/dma_buf_test_exporter/dma-buf-test-exporter.c
rename to bifrost/r32p1/kernel/drivers/base/arm/dma_buf_test_exporter/dma-buf-test-exporter.c


diff --git a/dvalin/kernel/drivers/base/arm/memory_group_manager/Kbuild b/bifrost/r32p1/kernel/drivers/base/arm/memory_group_manager/Kbuild
similarity index 100%
rename from dvalin/kernel/drivers/base/arm/memory_group_manager/Kbuild
rename to bifrost/r32p1/kernel/drivers/base/arm/memory_group_manager/Kbuild


diff --git a/dvalin/kernel/drivers/base/arm/memory_group_manager/build.bp b/bifrost/r32p1/kernel/drivers/base/arm/memory_group_manager/build.bp
similarity index 100%
rename from dvalin/kernel/drivers/base/arm/memory_group_manager/build.bp
rename to bifrost/r32p1/kernel/drivers/base/arm/memory_group_manager/build.bp


diff --git a/dvalin/kernel/drivers/base/arm/memory_group_manager/memory_group_manager.c b/bifrost/r32p1/kernel/drivers/base/arm/memory_group_manager/memory_group_manager.c
similarity index 100%
rename from dvalin/kernel/drivers/base/arm/memory_group_manager/memory_group_manager.c
rename to bifrost/r32p1/kernel/drivers/base/arm/memory_group_manager/memory_group_manager.c


diff --git a/dvalin/kernel/drivers/base/arm/protected_memory_allocator/Kbuild b/bifrost/r32p1/kernel/drivers/base/arm/protected_memory_allocator/Kbuild
similarity index 100%
rename from dvalin/kernel/drivers/base/arm/protected_memory_allocator/Kbuild
rename to bifrost/r32p1/kernel/drivers/base/arm/protected_memory_allocator/Kbuild


diff --git a/dvalin/kernel/drivers/base/arm/protected_memory_allocator/build.bp b/bifrost/r32p1/kernel/drivers/base/arm/protected_memory_allocator/build.bp
similarity index 100%
rename from dvalin/kernel/drivers/base/arm/protected_memory_allocator/build.bp
rename to bifrost/r32p1/kernel/drivers/base/arm/protected_memory_allocator/build.bp


diff --git a/dvalin/kernel/drivers/base/arm/protected_memory_allocator/protected_memory_allocator.c b/bifrost/r32p1/kernel/drivers/base/arm/protected_memory_allocator/protected_memory_allocator.c
similarity index 100%
rename from dvalin/kernel/drivers/base/arm/protected_memory_allocator/protected_memory_allocator.c
rename to bifrost/r32p1/kernel/drivers/base/arm/protected_memory_allocator/protected_memory_allocator.c


diff --git a/dvalin/kernel/drivers/gpu/arm/Kbuild b/bifrost/r32p1/kernel/drivers/gpu/arm/Kbuild
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/Kbuild
rename to bifrost/r32p1/kernel/drivers/gpu/arm/Kbuild


diff --git a/dvalin/kernel/drivers/gpu/arm/Kconfig b/bifrost/r32p1/kernel/drivers/gpu/arm/Kconfig
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/Kconfig
rename to bifrost/r32p1/kernel/drivers/gpu/arm/Kconfig


diff --git a/dvalin/kernel/drivers/gpu/arm/Makefile b/bifrost/r32p1/kernel/drivers/gpu/arm/Makefile
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/Makefile
rename to bifrost/r32p1/kernel/drivers/gpu/arm/Makefile


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/Kbuild b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/Kbuild
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/Kbuild
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/Kbuild


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/Kconfig b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/Kconfig
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/Kconfig
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/Kconfig


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/Makefile b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/Makefile
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/Makefile
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/Makefile


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/Mconfig b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/Mconfig
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/Mconfig
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/Mconfig


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/arbiter/Kbuild b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/arbiter/Kbuild
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/arbiter/Kbuild
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/arbiter/Kbuild


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbif.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbif.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbif.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbif.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbif.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbif.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbif.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbif.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbiter_defs.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbiter_defs.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbiter_defs.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbiter_defs.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbiter_interface.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbiter_interface.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbiter_interface.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbiter_interface.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbiter_pm.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbiter_pm.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbiter_pm.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbiter_pm.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbiter_pm.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbiter_pm.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbiter_pm.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbiter_pm.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/Kbuild b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/Kbuild
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/Kbuild
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/Kbuild


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_backend_config.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_backend_config.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_backend_config.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_backend_config.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_cache_policy_backend.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_cache_policy_backend.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_cache_policy_backend.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_cache_policy_backend.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_cache_policy_backend.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_cache_policy_backend.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_cache_policy_backend.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_cache_policy_backend.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_clk_rate_trace_mgr.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_clk_rate_trace_mgr.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_clk_rate_trace_mgr.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_clk_rate_trace_mgr.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_clk_rate_trace_mgr.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_clk_rate_trace_mgr.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_clk_rate_trace_mgr.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_clk_rate_trace_mgr.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_debug_job_fault_backend.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_debug_job_fault_backend.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_debug_job_fault_backend.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_debug_job_fault_backend.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_device_internal.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_device_internal.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_device_internal.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_device_internal.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_gpuprops_backend.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_gpuprops_backend.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_gpuprops_backend.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_gpuprops_backend.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_instr_backend.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_instr_backend.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_instr_backend.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_instr_backend.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_instr_defs.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_instr_defs.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_instr_defs.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_instr_defs.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_instr_internal.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_instr_internal.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_instr_internal.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_instr_internal.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_irq_internal.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_irq_internal.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_irq_internal.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_irq_internal.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_irq_linux.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_irq_linux.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_irq_linux.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_irq_linux.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_as.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_as.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_as.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_as.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_defs.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_defs.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_defs.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_defs.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_hw.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_hw.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_hw.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_hw.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_internal.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_internal.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_internal.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_internal.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_rb.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_rb.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_rb.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_rb.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_rb.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_rb.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_rb.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_rb.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_js_backend.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_js_backend.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_js_backend.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_js_backend.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_js_internal.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_js_internal.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_js_internal.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_js_internal.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_l2_mmu_config.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_l2_mmu_config.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_l2_mmu_config.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_l2_mmu_config.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_l2_mmu_config.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_l2_mmu_config.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_l2_mmu_config.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_l2_mmu_config.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_always_on.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_always_on.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_always_on.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_always_on.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_always_on.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_always_on.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_always_on.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_always_on.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_backend.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_backend.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_backend.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_backend.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_ca.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_ca.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_ca.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_ca.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_ca.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_ca.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_ca.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_ca.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_ca_devfreq.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_ca_devfreq.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_ca_devfreq.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_ca_devfreq.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_coarse_demand.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_coarse_demand.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_coarse_demand.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_coarse_demand.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_coarse_demand.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_coarse_demand.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_coarse_demand.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_coarse_demand.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_defs.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_defs.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_defs.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_defs.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_driver.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_driver.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_driver.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_driver.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_internal.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_internal.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_internal.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_internal.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_l2_states.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_l2_states.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_l2_states.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_l2_states.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_mcu_states.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_mcu_states.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_mcu_states.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_mcu_states.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_metrics.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_metrics.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_metrics.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_metrics.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_policy.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_policy.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_policy.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_policy.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_policy.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_policy.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_policy.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_policy.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_shader_states.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_shader_states.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_shader_states.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_pm_shader_states.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_time.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_time.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_time.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_time.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/build.bp b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/build.bp
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/build.bp
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/build.bp


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/context/Kbuild b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/context/Kbuild
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/context/Kbuild
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/context/Kbuild


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/context/backend/mali_kbase_context_csf.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/context/backend/mali_kbase_context_csf.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/context/backend/mali_kbase_context_csf.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/context/backend/mali_kbase_context_csf.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/context/backend/mali_kbase_context_jm.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/context/backend/mali_kbase_context_jm.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/context/backend/mali_kbase_context_jm.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/context/backend/mali_kbase_context_jm.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/context/mali_kbase_context.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/context/mali_kbase_context.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/context/mali_kbase_context.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/context/mali_kbase_context.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/context/mali_kbase_context.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/context/mali_kbase_context.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/context/mali_kbase_context.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/context/mali_kbase_context.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/context/mali_kbase_context_internal.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/context/mali_kbase_context_internal.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/context/mali_kbase_context_internal.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/context/mali_kbase_context_internal.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/Kbuild b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/Kbuild
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/Kbuild
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/Kbuild


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/ipa_control/Kbuild b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/ipa_control/Kbuild
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/ipa_control/Kbuild
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/ipa_control/Kbuild


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/ipa_control/mali_kbase_csf_ipa_control.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/ipa_control/mali_kbase_csf_ipa_control.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/ipa_control/mali_kbase_csf_ipa_control.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/ipa_control/mali_kbase_csf_ipa_control.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/ipa_control/mali_kbase_csf_ipa_control.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/ipa_control/mali_kbase_csf_ipa_control.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/ipa_control/mali_kbase_csf_ipa_control.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/ipa_control/mali_kbase_csf_ipa_control.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_cpu_queue_debugfs.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_cpu_queue_debugfs.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_cpu_queue_debugfs.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_cpu_queue_debugfs.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_cpu_queue_debugfs.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_cpu_queue_debugfs.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_cpu_queue_debugfs.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_cpu_queue_debugfs.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_csg_debugfs.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_csg_debugfs.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_csg_debugfs.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_csg_debugfs.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_csg_debugfs.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_csg_debugfs.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_csg_debugfs.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_csg_debugfs.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_defs.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_defs.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_defs.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_defs.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_firmware.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_firmware.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_firmware.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_firmware.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_firmware.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_firmware.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_firmware.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_firmware.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_firmware_cfg.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_firmware_cfg.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_firmware_cfg.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_firmware_cfg.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_firmware_cfg.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_firmware_cfg.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_firmware_cfg.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_firmware_cfg.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_firmware_no_mali.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_firmware_no_mali.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_firmware_no_mali.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_firmware_no_mali.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_heap_context_alloc.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_heap_context_alloc.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_heap_context_alloc.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_heap_context_alloc.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_heap_context_alloc.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_heap_context_alloc.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_heap_context_alloc.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_heap_context_alloc.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_kcpu.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_kcpu.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_kcpu.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_kcpu.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_kcpu.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_kcpu.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_kcpu.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_kcpu.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_kcpu_debugfs.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_kcpu_debugfs.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_kcpu_debugfs.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_kcpu_debugfs.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_kcpu_debugfs.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_kcpu_debugfs.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_kcpu_debugfs.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_kcpu_debugfs.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_protected_memory.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_protected_memory.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_protected_memory.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_protected_memory.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_protected_memory.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_protected_memory.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_protected_memory.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_protected_memory.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_reset_gpu.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_reset_gpu.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_reset_gpu.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_reset_gpu.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_scheduler.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_scheduler.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_scheduler.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_scheduler.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_scheduler.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_scheduler.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_scheduler.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_scheduler.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_tiler_heap.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_tiler_heap.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_tiler_heap.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_tiler_heap.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_tiler_heap.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_tiler_heap.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_tiler_heap.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_tiler_heap.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_tiler_heap_debugfs.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_tiler_heap_debugfs.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_tiler_heap_debugfs.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_tiler_heap_debugfs.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_tiler_heap_debugfs.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_tiler_heap_debugfs.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_tiler_heap_debugfs.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_tiler_heap_debugfs.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_tiler_heap_def.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_tiler_heap_def.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_tiler_heap_def.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_tiler_heap_def.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_timeout.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_timeout.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_timeout.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_timeout.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_timeout.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_timeout.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_timeout.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_timeout.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_tl_reader.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_tl_reader.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_tl_reader.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_tl_reader.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_tl_reader.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_tl_reader.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_tl_reader.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_tl_reader.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_trace_buffer.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_trace_buffer.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_trace_buffer.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_trace_buffer.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_trace_buffer.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_trace_buffer.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_trace_buffer.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/csf/mali_kbase_csf_trace_buffer.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/debug/Kbuild b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/Kbuild
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/debug/Kbuild
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/Kbuild


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_ktrace_codes_csf.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_ktrace_codes_csf.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_ktrace_codes_csf.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_ktrace_codes_csf.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_ktrace_codes_jm.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_ktrace_codes_jm.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_ktrace_codes_jm.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_ktrace_codes_jm.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_ktrace_csf.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_ktrace_csf.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_ktrace_csf.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_ktrace_csf.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_ktrace_csf.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_ktrace_csf.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_ktrace_csf.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_ktrace_csf.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_ktrace_defs_csf.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_ktrace_defs_csf.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_ktrace_defs_csf.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_ktrace_defs_csf.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_ktrace_defs_jm.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_ktrace_defs_jm.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_ktrace_defs_jm.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_ktrace_defs_jm.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_ktrace_jm.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_ktrace_jm.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_ktrace_jm.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_ktrace_jm.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_ktrace_jm.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_ktrace_jm.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_ktrace_jm.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_ktrace_jm.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_linux_ktrace_csf.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_linux_ktrace_csf.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_linux_ktrace_csf.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_linux_ktrace_csf.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_linux_ktrace_jm.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_linux_ktrace_jm.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_linux_ktrace_jm.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/backend/mali_kbase_debug_linux_ktrace_jm.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/debug/mali_kbase_debug_ktrace.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/mali_kbase_debug_ktrace.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/debug/mali_kbase_debug_ktrace.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/mali_kbase_debug_ktrace.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/debug/mali_kbase_debug_ktrace.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/mali_kbase_debug_ktrace.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/debug/mali_kbase_debug_ktrace.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/mali_kbase_debug_ktrace.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/debug/mali_kbase_debug_ktrace_codes.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/mali_kbase_debug_ktrace_codes.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/debug/mali_kbase_debug_ktrace_codes.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/mali_kbase_debug_ktrace_codes.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/debug/mali_kbase_debug_ktrace_defs.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/mali_kbase_debug_ktrace_defs.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/debug/mali_kbase_debug_ktrace_defs.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/mali_kbase_debug_ktrace_defs.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/debug/mali_kbase_debug_ktrace_internal.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/mali_kbase_debug_ktrace_internal.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/debug/mali_kbase_debug_ktrace_internal.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/mali_kbase_debug_ktrace_internal.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/debug/mali_kbase_debug_linux_ktrace.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/mali_kbase_debug_linux_ktrace.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/debug/mali_kbase_debug_linux_ktrace.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/debug/mali_kbase_debug_linux_ktrace.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/device/Kbuild b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/device/Kbuild
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/device/Kbuild
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/device/Kbuild


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/device/backend/mali_kbase_device_csf.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/device/backend/mali_kbase_device_csf.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/device/backend/mali_kbase_device_csf.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/device/backend/mali_kbase_device_csf.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/device/backend/mali_kbase_device_hw_csf.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/device/backend/mali_kbase_device_hw_csf.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/device/backend/mali_kbase_device_hw_csf.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/device/backend/mali_kbase_device_hw_csf.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/device/backend/mali_kbase_device_hw_jm.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/device/backend/mali_kbase_device_hw_jm.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/device/backend/mali_kbase_device_hw_jm.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/device/backend/mali_kbase_device_hw_jm.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/device/backend/mali_kbase_device_jm.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/device/backend/mali_kbase_device_jm.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/device/backend/mali_kbase_device_jm.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/device/backend/mali_kbase_device_jm.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/device/mali_kbase_device.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/device/mali_kbase_device.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/device/mali_kbase_device.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/device/mali_kbase_device.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/device/mali_kbase_device.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/device/mali_kbase_device.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/device/mali_kbase_device.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/device/mali_kbase_device.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/device/mali_kbase_device_hw.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/device/mali_kbase_device_hw.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/device/mali_kbase_device_hw.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/device/mali_kbase_device_hw.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/device/mali_kbase_device_internal.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/device/mali_kbase_device_internal.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/device/mali_kbase_device_internal.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/device/mali_kbase_device_internal.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/gpu/Kbuild b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/gpu/Kbuild
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/gpu/Kbuild
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/gpu/Kbuild


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/gpu/backend/mali_kbase_gpu_fault_csf.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/gpu/backend/mali_kbase_gpu_fault_csf.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/gpu/backend/mali_kbase_gpu_fault_csf.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/gpu/backend/mali_kbase_gpu_fault_csf.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/gpu/backend/mali_kbase_gpu_fault_jm.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/gpu/backend/mali_kbase_gpu_fault_jm.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/gpu/backend/mali_kbase_gpu_fault_jm.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/gpu/backend/mali_kbase_gpu_fault_jm.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/gpu/mali_kbase_gpu.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/gpu/mali_kbase_gpu.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/gpu/mali_kbase_gpu.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/gpu/mali_kbase_gpu.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/gpu/mali_kbase_gpu_fault.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/gpu/mali_kbase_gpu_fault.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/gpu/mali_kbase_gpu_fault.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/gpu/mali_kbase_gpu_fault.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/gpu/mali_kbase_gpu_regmap.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/gpu/mali_kbase_gpu_regmap.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/gpu/mali_kbase_gpu_regmap.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/gpu/mali_kbase_gpu_regmap.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/ipa/Kbuild b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/ipa/Kbuild
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/ipa/Kbuild
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/ipa/Kbuild


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/ipa/backend/mali_kbase_ipa_counter_common_csf.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/ipa/backend/mali_kbase_ipa_counter_common_csf.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/ipa/backend/mali_kbase_ipa_counter_common_csf.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/ipa/backend/mali_kbase_ipa_counter_common_csf.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/ipa/backend/mali_kbase_ipa_counter_common_csf.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/ipa/backend/mali_kbase_ipa_counter_common_csf.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/ipa/backend/mali_kbase_ipa_counter_common_csf.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/ipa/backend/mali_kbase_ipa_counter_common_csf.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/ipa/backend/mali_kbase_ipa_counter_common_jm.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/ipa/backend/mali_kbase_ipa_counter_common_jm.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/ipa/backend/mali_kbase_ipa_counter_common_jm.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/ipa/backend/mali_kbase_ipa_counter_common_jm.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/ipa/backend/mali_kbase_ipa_counter_common_jm.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/ipa/backend/mali_kbase_ipa_counter_common_jm.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/ipa/backend/mali_kbase_ipa_counter_common_jm.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/ipa/backend/mali_kbase_ipa_counter_common_jm.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/ipa/backend/mali_kbase_ipa_counter_csf.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/ipa/backend/mali_kbase_ipa_counter_csf.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/ipa/backend/mali_kbase_ipa_counter_csf.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/ipa/backend/mali_kbase_ipa_counter_csf.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/ipa/backend/mali_kbase_ipa_counter_jm.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/ipa/backend/mali_kbase_ipa_counter_jm.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/ipa/backend/mali_kbase_ipa_counter_jm.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/ipa/backend/mali_kbase_ipa_counter_jm.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/ipa/mali_kbase_ipa.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/ipa/mali_kbase_ipa.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/ipa/mali_kbase_ipa.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/ipa/mali_kbase_ipa.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/ipa/mali_kbase_ipa.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/ipa/mali_kbase_ipa.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/ipa/mali_kbase_ipa.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/ipa/mali_kbase_ipa.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/ipa/mali_kbase_ipa_debugfs.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/ipa/mali_kbase_ipa_debugfs.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/ipa/mali_kbase_ipa_debugfs.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/ipa/mali_kbase_ipa_debugfs.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/ipa/mali_kbase_ipa_debugfs.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/ipa/mali_kbase_ipa_debugfs.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/ipa/mali_kbase_ipa_debugfs.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/ipa/mali_kbase_ipa_debugfs.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/ipa/mali_kbase_ipa_simple.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/ipa/mali_kbase_ipa_simple.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/ipa/mali_kbase_ipa_simple.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/ipa/mali_kbase_ipa_simple.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/ipa/mali_kbase_ipa_simple.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/ipa/mali_kbase_ipa_simple.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/ipa/mali_kbase_ipa_simple.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/ipa/mali_kbase_ipa_simple.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/jm/mali_kbase_jm_defs.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/jm/mali_kbase_jm_defs.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/jm/mali_kbase_jm_defs.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/jm/mali_kbase_jm_defs.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/jm/mali_kbase_jm_js.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/jm/mali_kbase_jm_js.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/jm/mali_kbase_jm_js.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/jm/mali_kbase_jm_js.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/jm/mali_kbase_js_defs.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/jm/mali_kbase_js_defs.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/jm/mali_kbase_js_defs.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/jm/mali_kbase_js_defs.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_base_hwconfig_features.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_base_hwconfig_features.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_base_hwconfig_features.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_base_hwconfig_features.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_base_hwconfig_issues.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_base_hwconfig_issues.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_base_hwconfig_issues.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_base_hwconfig_issues.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_as_fault_debugfs.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_as_fault_debugfs.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_as_fault_debugfs.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_as_fault_debugfs.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_as_fault_debugfs.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_as_fault_debugfs.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_as_fault_debugfs.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_as_fault_debugfs.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_bits.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_bits.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_bits.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_bits.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_cache_policy.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_cache_policy.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_cache_policy.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_cache_policy.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_cache_policy.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_cache_policy.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_cache_policy.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_cache_policy.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_caps.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_caps.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_caps.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_caps.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_ccswe.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_ccswe.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_ccswe.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_ccswe.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_ccswe.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_ccswe.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_ccswe.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_ccswe.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_config.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_config.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_config.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_config.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_config.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_config.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_config.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_config.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_config_defaults.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_config_defaults.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_config_defaults.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_config_defaults.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_core_linux.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_core_linux.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_core_linux.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_cs_experimental.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_cs_experimental.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_cs_experimental.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_cs_experimental.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_ctx_sched.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_ctx_sched.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_ctx_sched.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_ctx_sched.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_ctx_sched.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_ctx_sched.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_ctx_sched.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_ctx_sched.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_debug.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_debug.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_debug.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_debug.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_debug.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_debug.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_debug.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_debug.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_debug_job_fault.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_debug_job_fault.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_debug_job_fault.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_debug_job_fault.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_debug_job_fault.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_debug_job_fault.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_debug_job_fault.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_debug_job_fault.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_debug_mem_view.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_debug_mem_view.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_debug_mem_view.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_debug_mem_view.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_debug_mem_view.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_debug_mem_view.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_debug_mem_view.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_debug_mem_view.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_debugfs_helper.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_debugfs_helper.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_debugfs_helper.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_debugfs_helper.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_debugfs_helper.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_debugfs_helper.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_debugfs_helper.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_debugfs_helper.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_defs.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_defs.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_defs.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_defs.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_disjoint_events.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_disjoint_events.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_disjoint_events.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_disjoint_events.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_dma_fence.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_dma_fence.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_dma_fence.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_dma_fence.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_dma_fence.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_dma_fence.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_dma_fence.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_dma_fence.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_dummy_job_wa.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_dummy_job_wa.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_dummy_job_wa.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_dummy_job_wa.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_dummy_job_wa.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_dummy_job_wa.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_dummy_job_wa.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_dummy_job_wa.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_dvfs_debugfs.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_dvfs_debugfs.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_dvfs_debugfs.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_dvfs_debugfs.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_dvfs_debugfs.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_dvfs_debugfs.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_dvfs_debugfs.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_dvfs_debugfs.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_event.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_event.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_event.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_event.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_fence.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_fence.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_fence.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_fence.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_fence.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_fence.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_fence.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_fence.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_fence_defs.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_fence_defs.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_fence_defs.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_fence_defs.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_fence_ops.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_fence_ops.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_fence_ops.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_fence_ops.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_gator.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_gator.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_gator.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_gator.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_gpu_memory_debugfs.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_gpu_memory_debugfs.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_gpu_memory_debugfs.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_gpu_memory_debugfs.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_gpu_memory_debugfs.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_gpu_memory_debugfs.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_gpu_memory_debugfs.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_gpu_memory_debugfs.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_gpuprops.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_gpuprops.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_gpuprops.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_gpuprops.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_gpuprops.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_gpuprops.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_gpuprops.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_gpuprops.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_gpuprops_types.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_gpuprops_types.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_gpuprops_types.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_gpuprops_types.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_gwt.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_gwt.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_gwt.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_gwt.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_gwt.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_gwt.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_gwt.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_gwt.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hw.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hw.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hw.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hw.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hw.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hw.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hw.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hw.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwaccess_backend.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwaccess_backend.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwaccess_backend.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwaccess_backend.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwaccess_defs.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwaccess_defs.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwaccess_defs.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwaccess_defs.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwaccess_gpuprops.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwaccess_gpuprops.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwaccess_gpuprops.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwaccess_gpuprops.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwaccess_instr.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwaccess_instr.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwaccess_instr.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwaccess_instr.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwaccess_jm.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwaccess_jm.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwaccess_jm.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwaccess_jm.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwaccess_pm.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwaccess_pm.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwaccess_pm.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwaccess_pm.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwaccess_time.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwaccess_time.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwaccess_time.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwaccess_time.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_accumulator.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_accumulator.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_accumulator.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_accumulator.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_backend.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_backend.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_backend.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_backend.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_backend_csf.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_backend_csf.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_backend_csf.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_backend_csf.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_backend_csf.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_backend_csf.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_backend_csf.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_backend_csf.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_backend_csf_if.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_backend_csf_if.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_backend_csf_if.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_backend_csf_if.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_backend_csf_if_fw.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_backend_csf_if_fw.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_backend_csf_if_fw.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_backend_csf_if_fw.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_backend_csf_if_fw.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_backend_csf_if_fw.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_backend_csf_if_fw.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_backend_csf_if_fw.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_backend_jm.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_backend_jm.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_backend_jm.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_backend_jm.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_backend_jm.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_backend_jm.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_backend_jm.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_backend_jm.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_context.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_context.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_context.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_context.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_gpu.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_gpu.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_gpu.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_gpu.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_gpu.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_gpu.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_gpu.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_gpu.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_legacy.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_legacy.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_legacy.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_legacy.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_legacy.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_legacy.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_legacy.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_legacy.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_types.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_types.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_types.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_types.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_types.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_types.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_types.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_types.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_virtualizer.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_virtualizer.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_virtualizer.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_virtualizer.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_virtualizer.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_virtualizer.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_virtualizer.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_hwcnt_virtualizer.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_jd.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_jd.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_jd.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_jd.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_jd_debugfs.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_jd_debugfs.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_jd_debugfs.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_jd_debugfs.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_jd_debugfs.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_jd_debugfs.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_jd_debugfs.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_jd_debugfs.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_jm.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_jm.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_jm.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_jm.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_jm.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_jm.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_jm.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_jm.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_js.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_js.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_js.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_js.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_js.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_js.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_js.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_js.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_js_ctx_attr.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_js_ctx_attr.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_js_ctx_attr.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_js_ctx_attr.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_js_ctx_attr.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_js_ctx_attr.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_js_ctx_attr.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_js_ctx_attr.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_kinstr_jm.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_kinstr_jm.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_kinstr_jm.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_kinstr_jm.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_kinstr_jm.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_kinstr_jm.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_kinstr_jm.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_kinstr_jm.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_linux.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_linux.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_linux.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_linux.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_mem.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_mem.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_mem.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_mem.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_mem.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_mem.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_mem.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_mem.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_linux.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_linux.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_linux.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_linux.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_linux.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_linux.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_linux.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_linux.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_lowlevel.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_lowlevel.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_lowlevel.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_lowlevel.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_pool.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_pool.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_pool.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_pool.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_pool_debugfs.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_pool_debugfs.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_pool_debugfs.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_pool_debugfs.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_pool_debugfs.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_pool_debugfs.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_pool_debugfs.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_pool_debugfs.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_pool_group.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_pool_group.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_pool_group.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_pool_group.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_pool_group.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_pool_group.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_pool_group.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_pool_group.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_profile_debugfs.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_profile_debugfs.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_profile_debugfs.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_profile_debugfs.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_profile_debugfs.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_profile_debugfs.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_profile_debugfs.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_profile_debugfs.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_profile_debugfs_buf_size.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_profile_debugfs_buf_size.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_profile_debugfs_buf_size.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_mem_profile_debugfs_buf_size.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_mipe_gen_header.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_mipe_gen_header.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_mipe_gen_header.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_mipe_gen_header.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_mipe_proto.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_mipe_proto.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_mipe_proto.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_mipe_proto.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_native_mgm.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_native_mgm.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_native_mgm.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_native_mgm.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_native_mgm.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_native_mgm.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_native_mgm.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_native_mgm.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_platform_fake.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_platform_fake.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_platform_fake.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_platform_fake.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_pm.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_pm.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_pm.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_pm.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_pm.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_pm.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_pm.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_pm.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_regs_history_debugfs.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_regs_history_debugfs.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_regs_history_debugfs.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_regs_history_debugfs.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_regs_history_debugfs.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_regs_history_debugfs.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_regs_history_debugfs.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_regs_history_debugfs.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_reset_gpu.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_reset_gpu.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_reset_gpu.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_reset_gpu.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_smc.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_smc.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_smc.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_smc.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_smc.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_smc.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_smc.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_smc.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_softjobs.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_softjobs.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_softjobs.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_softjobs.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_strings.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_strings.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_strings.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_strings.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_strings.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_strings.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_strings.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_strings.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_sync.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_sync.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_sync.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_sync.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_sync_android.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_sync_android.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_sync_android.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_sync_android.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_sync_common.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_sync_common.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_sync_common.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_sync_common.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_sync_file.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_sync_file.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_sync_file.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_sync_file.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_trace_gpu_mem.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_trace_gpu_mem.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_trace_gpu_mem.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_trace_gpu_mem.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_trace_gpu_mem.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_trace_gpu_mem.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_trace_gpu_mem.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_trace_gpu_mem.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_utility.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_utility.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_utility.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_utility.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_vinstr.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_vinstr.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_vinstr.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_vinstr.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_vinstr.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_vinstr.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_kbase_vinstr.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_kbase_vinstr.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_linux_trace.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_linux_trace.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_linux_trace.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_linux_trace.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_malisw.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_malisw.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_malisw.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_malisw.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_power_gpu_frequency_trace.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_power_gpu_frequency_trace.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_power_gpu_frequency_trace.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_power_gpu_frequency_trace.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mali_power_gpu_frequency_trace.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_power_gpu_frequency_trace.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mali_power_gpu_frequency_trace.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mali_power_gpu_frequency_trace.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mmu/Kbuild b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mmu/Kbuild
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mmu/Kbuild
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mmu/Kbuild


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mmu/backend/mali_kbase_mmu_csf.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mmu/backend/mali_kbase_mmu_csf.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mmu/backend/mali_kbase_mmu_csf.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mmu/backend/mali_kbase_mmu_csf.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mmu/backend/mali_kbase_mmu_jm.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mmu/backend/mali_kbase_mmu_jm.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mmu/backend/mali_kbase_mmu_jm.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mmu/backend/mali_kbase_mmu_jm.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mmu/mali_kbase_mmu.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mmu/mali_kbase_mmu.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mmu/mali_kbase_mmu.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mmu/mali_kbase_mmu.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mmu/mali_kbase_mmu.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mmu/mali_kbase_mmu.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mmu/mali_kbase_mmu.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mmu/mali_kbase_mmu.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mmu/mali_kbase_mmu_hw.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mmu/mali_kbase_mmu_hw.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mmu/mali_kbase_mmu_hw.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mmu/mali_kbase_mmu_hw.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mmu/mali_kbase_mmu_hw_direct.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mmu/mali_kbase_mmu_hw_direct.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mmu/mali_kbase_mmu_hw_direct.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mmu/mali_kbase_mmu_hw_direct.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mmu/mali_kbase_mmu_internal.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mmu/mali_kbase_mmu_internal.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mmu/mali_kbase_mmu_internal.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mmu/mali_kbase_mmu_internal.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/mmu/mali_kbase_mmu_mode_aarch64.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mmu/mali_kbase_mmu_mode_aarch64.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/mmu/mali_kbase_mmu_mode_aarch64.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/mmu/mali_kbase_mmu_mode_aarch64.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/platform/Kconfig b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/Kconfig
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/platform/Kconfig
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/Kconfig


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/Kbuild b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/devicetree/Kbuild
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/Kbuild
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/devicetree/Kbuild


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_clock.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_kbase_clk_rate_trace.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_kbase_clk_rate_trace.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_kbase_clk_rate_trace.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_kbase_clk_rate_trace.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_kbase_config_devicetree.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_kbase_config_devicetree.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_kbase_config_devicetree.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_kbase_config_devicetree.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_kbase_config_platform.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_kbase_config_platform.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_kbase_config_platform.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_kbase_config_platform.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_kbase_config_platform.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_kbase_config_platform.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_kbase_config_platform.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_kbase_config_platform.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_kbase_runtime_pm.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_kbase_runtime_pm.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_kbase_runtime_pm.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_kbase_runtime_pm.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_platform.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_platform.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_platform.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_platform.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_scaling.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_scaling.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_scaling.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/devicetree/mali_scaling.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/meson_main2.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/devicetree/meson_main2.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/meson_main2.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/devicetree/meson_main2.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/meson_main2.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/devicetree/meson_main2.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/meson_main2.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/devicetree/meson_main2.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/mpgpu.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/devicetree/mpgpu.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/mpgpu.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/devicetree/mpgpu.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/platform_gx.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/devicetree/platform_gx.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/platform_gx.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/devicetree/platform_gx.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/scaling.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/devicetree/scaling.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/platform/devicetree/scaling.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/devicetree/scaling.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/platform/vexpress/Kbuild b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/vexpress/Kbuild
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/platform/vexpress/Kbuild
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/vexpress/Kbuild


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/platform/vexpress/mali_kbase_config_platform.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/vexpress/mali_kbase_config_platform.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/platform/vexpress/mali_kbase_config_platform.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/vexpress/mali_kbase_config_platform.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/platform/vexpress/mali_kbase_config_vexpress.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/vexpress/mali_kbase_config_vexpress.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/platform/vexpress/mali_kbase_config_vexpress.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/vexpress/mali_kbase_config_vexpress.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/platform/vexpress_1xv7_a57/Kbuild b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/vexpress_1xv7_a57/Kbuild
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/platform/vexpress_1xv7_a57/Kbuild
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/vexpress_1xv7_a57/Kbuild


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/platform/vexpress_1xv7_a57/mali_kbase_config_platform.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/vexpress_1xv7_a57/mali_kbase_config_platform.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/platform/vexpress_1xv7_a57/mali_kbase_config_platform.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/vexpress_1xv7_a57/mali_kbase_config_platform.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/platform/vexpress_1xv7_a57/mali_kbase_config_vexpress.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/vexpress_1xv7_a57/mali_kbase_config_vexpress.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/platform/vexpress_1xv7_a57/mali_kbase_config_vexpress.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/vexpress_1xv7_a57/mali_kbase_config_vexpress.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/platform/vexpress_6xvirtex7_10mhz/Kbuild b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/vexpress_6xvirtex7_10mhz/Kbuild
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/platform/vexpress_6xvirtex7_10mhz/Kbuild
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/vexpress_6xvirtex7_10mhz/Kbuild


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/platform/vexpress_6xvirtex7_10mhz/mali_kbase_config_platform.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/vexpress_6xvirtex7_10mhz/mali_kbase_config_platform.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/platform/vexpress_6xvirtex7_10mhz/mali_kbase_config_platform.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/vexpress_6xvirtex7_10mhz/mali_kbase_config_platform.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/platform/vexpress_6xvirtex7_10mhz/mali_kbase_config_vexpress.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/vexpress_6xvirtex7_10mhz/mali_kbase_config_vexpress.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/platform/vexpress_6xvirtex7_10mhz/mali_kbase_config_vexpress.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/platform/vexpress_6xvirtex7_10mhz/mali_kbase_config_vexpress.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/protected_mode_switcher.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/protected_mode_switcher.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/protected_mode_switcher.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/protected_mode_switcher.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tests/Kbuild b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/Kbuild
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tests/Kbuild
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/Kbuild


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tests/Kconfig b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/Kconfig
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tests/Kconfig
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/Kconfig


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tests/Mconfig b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/Mconfig
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tests/Mconfig
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/Mconfig


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tests/build.bp b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/build.bp
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tests/build.bp
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/build.bp


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tests/include/kutf/kutf_helpers.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/include/kutf/kutf_helpers.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tests/include/kutf/kutf_helpers.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/include/kutf/kutf_helpers.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tests/include/kutf/kutf_helpers_user.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/include/kutf/kutf_helpers_user.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tests/include/kutf/kutf_helpers_user.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/include/kutf/kutf_helpers_user.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tests/include/kutf/kutf_mem.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/include/kutf/kutf_mem.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tests/include/kutf/kutf_mem.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/include/kutf/kutf_mem.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tests/include/kutf/kutf_resultset.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/include/kutf/kutf_resultset.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tests/include/kutf/kutf_resultset.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/include/kutf/kutf_resultset.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tests/include/kutf/kutf_suite.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/include/kutf/kutf_suite.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tests/include/kutf/kutf_suite.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/include/kutf/kutf_suite.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tests/include/kutf/kutf_utils.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/include/kutf/kutf_utils.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tests/include/kutf/kutf_utils.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/include/kutf/kutf_utils.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tests/kutf/Kbuild b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/kutf/Kbuild
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tests/kutf/Kbuild
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/kutf/Kbuild


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tests/kutf/build.bp b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/kutf/build.bp
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tests/kutf/build.bp
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/kutf/build.bp


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tests/kutf/kutf_helpers.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/kutf/kutf_helpers.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tests/kutf/kutf_helpers.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/kutf/kutf_helpers.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tests/kutf/kutf_helpers_user.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/kutf/kutf_helpers_user.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tests/kutf/kutf_helpers_user.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/kutf/kutf_helpers_user.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tests/kutf/kutf_mem.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/kutf/kutf_mem.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tests/kutf/kutf_mem.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/kutf/kutf_mem.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tests/kutf/kutf_resultset.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/kutf/kutf_resultset.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tests/kutf/kutf_resultset.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/kutf/kutf_resultset.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tests/kutf/kutf_suite.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/kutf/kutf_suite.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tests/kutf/kutf_suite.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/kutf/kutf_suite.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tests/kutf/kutf_utils.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/kutf/kutf_utils.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tests/kutf/kutf_utils.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/kutf/kutf_utils.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tests/mali_kutf_clk_rate_trace/kernel/Kbuild b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/mali_kutf_clk_rate_trace/kernel/Kbuild
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tests/mali_kutf_clk_rate_trace/kernel/Kbuild
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/mali_kutf_clk_rate_trace/kernel/Kbuild


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tests/mali_kutf_clk_rate_trace/kernel/build.bp b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/mali_kutf_clk_rate_trace/kernel/build.bp
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tests/mali_kutf_clk_rate_trace/kernel/build.bp
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/mali_kutf_clk_rate_trace/kernel/build.bp


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tests/mali_kutf_clk_rate_trace/kernel/mali_kutf_clk_rate_trace_test.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/mali_kutf_clk_rate_trace/kernel/mali_kutf_clk_rate_trace_test.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tests/mali_kutf_clk_rate_trace/kernel/mali_kutf_clk_rate_trace_test.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/mali_kutf_clk_rate_trace/kernel/mali_kutf_clk_rate_trace_test.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tests/mali_kutf_clk_rate_trace/mali_kutf_clk_rate_trace_test.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/mali_kutf_clk_rate_trace/mali_kutf_clk_rate_trace_test.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tests/mali_kutf_clk_rate_trace/mali_kutf_clk_rate_trace_test.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/mali_kutf_clk_rate_trace/mali_kutf_clk_rate_trace_test.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tests/mali_kutf_irq_test/Kbuild b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/mali_kutf_irq_test/Kbuild
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tests/mali_kutf_irq_test/Kbuild
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/mali_kutf_irq_test/Kbuild


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tests/mali_kutf_irq_test/build.bp b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/mali_kutf_irq_test/build.bp
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tests/mali_kutf_irq_test/build.bp
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/mali_kutf_irq_test/build.bp


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tests/mali_kutf_irq_test/mali_kutf_irq_test_main.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/mali_kutf_irq_test/mali_kutf_irq_test_main.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tests/mali_kutf_irq_test/mali_kutf_irq_test_main.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tests/mali_kutf_irq_test/mali_kutf_irq_test_main.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/thirdparty/Kbuild b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/thirdparty/Kbuild
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/thirdparty/Kbuild
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/thirdparty/Kbuild


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/thirdparty/mali_kbase_mmap.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/thirdparty/mali_kbase_mmap.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/thirdparty/mali_kbase_mmap.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/thirdparty/mali_kbase_mmap.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tl/Kbuild b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tl/Kbuild
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tl/Kbuild
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tl/Kbuild


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tl/backend/mali_kbase_timeline_csf.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tl/backend/mali_kbase_timeline_csf.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tl/backend/mali_kbase_timeline_csf.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tl/backend/mali_kbase_timeline_csf.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tl/backend/mali_kbase_timeline_jm.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tl/backend/mali_kbase_timeline_jm.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tl/backend/mali_kbase_timeline_jm.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tl/backend/mali_kbase_timeline_jm.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_timeline.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_timeline.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_timeline.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_timeline.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_timeline.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_timeline.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_timeline.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_timeline.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_timeline_io.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_timeline_io.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_timeline_io.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_timeline_io.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_timeline_priv.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_timeline_priv.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_timeline_priv.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_timeline_priv.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_tl_serialize.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_tl_serialize.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_tl_serialize.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_tl_serialize.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_tlstream.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_tlstream.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_tlstream.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_tlstream.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_tlstream.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_tlstream.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_tlstream.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_tlstream.h


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_tracepoints.c b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_tracepoints.c
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_tracepoints.c
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_tracepoints.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_tracepoints.h b/bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_tracepoints.h
similarity index 100%
rename from dvalin/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_tracepoints.h
rename to bifrost/r32p1/kernel/drivers/gpu/arm/midgard/tl/mali_kbase_tracepoints.h


diff --git a/dvalin/kernel/include/linux/dma-buf-test-exporter.h b/bifrost/r32p1/kernel/include/linux/dma-buf-test-exporter.h
similarity index 100%
rename from dvalin/kernel/include/linux/dma-buf-test-exporter.h
rename to bifrost/r32p1/kernel/include/linux/dma-buf-test-exporter.h


diff --git a/dvalin/kernel/include/linux/memory_group_manager.h b/bifrost/r32p1/kernel/include/linux/memory_group_manager.h
similarity index 100%
rename from dvalin/kernel/include/linux/memory_group_manager.h
rename to bifrost/r32p1/kernel/include/linux/memory_group_manager.h


diff --git a/dvalin/kernel/include/linux/priority_control_manager.h b/bifrost/r32p1/kernel/include/linux/priority_control_manager.h
similarity index 100%
rename from dvalin/kernel/include/linux/priority_control_manager.h
rename to bifrost/r32p1/kernel/include/linux/priority_control_manager.h


diff --git a/dvalin/kernel/include/linux/protected_memory_allocator.h b/bifrost/r32p1/kernel/include/linux/protected_memory_allocator.h
similarity index 100%
rename from dvalin/kernel/include/linux/protected_memory_allocator.h
rename to bifrost/r32p1/kernel/include/linux/protected_memory_allocator.h


diff --git a/dvalin/kernel/include/linux/protected_mode_switcher.h b/bifrost/r32p1/kernel/include/linux/protected_mode_switcher.h
similarity index 100%
rename from dvalin/kernel/include/linux/protected_mode_switcher.h
rename to bifrost/r32p1/kernel/include/linux/protected_mode_switcher.h


diff --git a/dvalin/kernel/include/uapi/gpu/arm/midgard/csf/mali_base_csf_kernel.h b/bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/csf/mali_base_csf_kernel.h
similarity index 100%
rename from dvalin/kernel/include/uapi/gpu/arm/midgard/csf/mali_base_csf_kernel.h
rename to bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/csf/mali_base_csf_kernel.h


diff --git a/dvalin/kernel/include/uapi/gpu/arm/midgard/csf/mali_gpu_csf_control_registers.h b/bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/csf/mali_gpu_csf_control_registers.h
similarity index 100%
rename from dvalin/kernel/include/uapi/gpu/arm/midgard/csf/mali_gpu_csf_control_registers.h
rename to bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/csf/mali_gpu_csf_control_registers.h


diff --git a/dvalin/kernel/include/uapi/gpu/arm/midgard/csf/mali_gpu_csf_registers.h b/bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/csf/mali_gpu_csf_registers.h
similarity index 100%
rename from dvalin/kernel/include/uapi/gpu/arm/midgard/csf/mali_gpu_csf_registers.h
rename to bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/csf/mali_gpu_csf_registers.h


diff --git a/dvalin/kernel/include/uapi/gpu/arm/midgard/csf/mali_kbase_csf_ioctl.h b/bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/csf/mali_kbase_csf_ioctl.h
similarity index 100%
rename from dvalin/kernel/include/uapi/gpu/arm/midgard/csf/mali_kbase_csf_ioctl.h
rename to bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/csf/mali_kbase_csf_ioctl.h


diff --git a/dvalin/kernel/include/uapi/gpu/arm/midgard/gpu/backend/mali_kbase_gpu_regmap_csf.h b/bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/gpu/backend/mali_kbase_gpu_regmap_csf.h
similarity index 100%
rename from dvalin/kernel/include/uapi/gpu/arm/midgard/gpu/backend/mali_kbase_gpu_regmap_csf.h
rename to bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/gpu/backend/mali_kbase_gpu_regmap_csf.h


diff --git a/dvalin/kernel/include/uapi/gpu/arm/midgard/gpu/backend/mali_kbase_gpu_regmap_jm.h b/bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/gpu/backend/mali_kbase_gpu_regmap_jm.h
similarity index 100%
rename from dvalin/kernel/include/uapi/gpu/arm/midgard/gpu/backend/mali_kbase_gpu_regmap_jm.h
rename to bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/gpu/backend/mali_kbase_gpu_regmap_jm.h


diff --git a/dvalin/kernel/include/uapi/gpu/arm/midgard/gpu/mali_kbase_gpu_coherency.h b/bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/gpu/mali_kbase_gpu_coherency.h
similarity index 100%
rename from dvalin/kernel/include/uapi/gpu/arm/midgard/gpu/mali_kbase_gpu_coherency.h
rename to bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/gpu/mali_kbase_gpu_coherency.h


diff --git a/dvalin/kernel/include/uapi/gpu/arm/midgard/gpu/mali_kbase_gpu_id.h b/bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/gpu/mali_kbase_gpu_id.h
similarity index 100%
rename from dvalin/kernel/include/uapi/gpu/arm/midgard/gpu/mali_kbase_gpu_id.h
rename to bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/gpu/mali_kbase_gpu_id.h


diff --git a/dvalin/kernel/include/uapi/gpu/arm/midgard/gpu/mali_kbase_gpu_regmap.h b/bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/gpu/mali_kbase_gpu_regmap.h
similarity index 100%
rename from dvalin/kernel/include/uapi/gpu/arm/midgard/gpu/mali_kbase_gpu_regmap.h
rename to bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/gpu/mali_kbase_gpu_regmap.h


diff --git a/dvalin/kernel/include/uapi/gpu/arm/midgard/jm/mali_base_jm_kernel.h b/bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/jm/mali_base_jm_kernel.h
similarity index 100%
rename from dvalin/kernel/include/uapi/gpu/arm/midgard/jm/mali_base_jm_kernel.h
rename to bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/jm/mali_base_jm_kernel.h


diff --git a/dvalin/kernel/include/uapi/gpu/arm/midgard/jm/mali_kbase_jm_ioctl.h b/bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/jm/mali_kbase_jm_ioctl.h
similarity index 100%
rename from dvalin/kernel/include/uapi/gpu/arm/midgard/jm/mali_kbase_jm_ioctl.h
rename to bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/jm/mali_kbase_jm_ioctl.h


diff --git a/dvalin/kernel/include/uapi/gpu/arm/midgard/mali_base_kernel.h b/bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/mali_base_kernel.h
similarity index 100%
rename from dvalin/kernel/include/uapi/gpu/arm/midgard/mali_base_kernel.h
rename to bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/mali_base_kernel.h


diff --git a/dvalin/kernel/include/uapi/gpu/arm/midgard/mali_base_mem_priv.h b/bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/mali_base_mem_priv.h
similarity index 100%
rename from dvalin/kernel/include/uapi/gpu/arm/midgard/mali_base_mem_priv.h
rename to bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/mali_base_mem_priv.h


diff --git a/dvalin/kernel/include/uapi/gpu/arm/midgard/mali_kbase_hwcnt_reader.h b/bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/mali_kbase_hwcnt_reader.h
similarity index 100%
rename from dvalin/kernel/include/uapi/gpu/arm/midgard/mali_kbase_hwcnt_reader.h
rename to bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/mali_kbase_hwcnt_reader.h


diff --git a/dvalin/kernel/include/uapi/gpu/arm/midgard/mali_kbase_ioctl.h b/bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/mali_kbase_ioctl.h
similarity index 100%
rename from dvalin/kernel/include/uapi/gpu/arm/midgard/mali_kbase_ioctl.h
rename to bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/mali_kbase_ioctl.h


diff --git a/dvalin/kernel/include/uapi/gpu/arm/midgard/mali_kbase_kinstr_jm_reader.h b/bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/mali_kbase_kinstr_jm_reader.h
similarity index 100%
rename from dvalin/kernel/include/uapi/gpu/arm/midgard/mali_kbase_kinstr_jm_reader.h
rename to bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/mali_kbase_kinstr_jm_reader.h


diff --git a/dvalin/kernel/include/uapi/gpu/arm/midgard/mali_uk.h b/bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/mali_uk.h
similarity index 100%
rename from dvalin/kernel/include/uapi/gpu/arm/midgard/mali_uk.h
rename to bifrost/r32p1/kernel/include/uapi/gpu/arm/midgard/mali_uk.h


diff --git a/dvalin/kernel/license.txt b/bifrost/r32p1/kernel/license.txt
similarity index 100%
rename from dvalin/kernel/license.txt
rename to bifrost/r32p1/kernel/license.txt


diff --git a/dvalin/kernel/patches/trusted_firmware_gpu_coherency_toggle.patch b/bifrost/r32p1/kernel/patches/trusted_firmware_gpu_coherency_toggle.patch
similarity index 100%
rename from dvalin/kernel/patches/trusted_firmware_gpu_coherency_toggle.patch
rename to bifrost/r32p1/kernel/patches/trusted_firmware_gpu_coherency_toggle.patch


diff --git a/bifrost/r38p2/kernel/Documentation/ABI/testing/sysfs-device-mali b/bifrost/r38p2/kernel/Documentation/ABI/testing/sysfs-device-mali
new file mode 100644
index 0000000..cd011da
--- /dev/null
+++ b/bifrost/r38p2/kernel/Documentation/ABI/testing/sysfs-device-mali

@@ -0,0 +1,319 @@
+/*
+ *
+ * (C) COPYRIGHT 2020 ARM Limited. All rights reserved.
+ *
+ * This program is free software and is provided to you under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation) and any use by you of this program is subject to the terms
+ * of such GNU licence.
+ *
+ * A copy of the licence is included with the program) and can also be obtained
+ * from Free Software Foundation) Inc.) 51 Franklin Street) Fifth Floor)
+ * Boston) MA  02110-1301) USA.
+ *
+ */
+
+What:		/sys/class/misc/mali%u/device/core_mask
+Description:
+		This attribute is used to restrict the number of shader cores
+		available in this instance, is useful for debugging purposes.
+		Reading this attribute provides us mask of all cores available.
+		Writing to it will set the current core mask. Doesn't
+		allow disabling all the cores present in this instance.
+
+What:		/sys/class/misc/mali%u/device/debug_command
+Description:
+		This attribute is used to issue debug commands that supported
+		by the driver. On reading it provides the list of debug commands
+		that are supported, and writing back one of those commands will
+		enable that debug option.
+
+What:		/sys/class/misc/mali%u/device/dvfs_period
+Description:
+		This is used to set the DVFS sampling period to be used by the
+		driver, On reading it provides the current DVFS sampling period,
+		on writing a value we set the DVFS sampling period.
+
+What:		/sys/class/misc/mali%u/device/dummy_job_wa_info
+Description:
+		This attribute is available only with platform device that
+                supports a Job Manager based GPU that requires a GPU workaround
+		to execute the dummy fragment job on all shader cores to
+		workaround a hang issue.
+
+		Its a readonly attribute and on reading gives details on the
+		options used with the dummy workaround.
+
+What:		/sys/class/misc/mali%u/device/fw_timeout
+Description:
+		This attribute is available only with mali platform
+		device-driver that supports a CSF GPU. This attribute is
+		used to set the duration value in milliseconds for the
+		waiting timeout used for a GPU status change request being
+		acknowledged by the FW.
+
+What:		/sys/class/misc/mali%u/device/gpuinfo
+Description:
+		This attribute provides description of the present Mali GPU.
+		Its a read only attribute provides details like GPU family, the
+		number of cores, the hardware version and the raw product id.
+
+What:		/sys/class/misc/mali%u/device/idle_hysteresis_time
+Description:
+		This attribute is available only with mali platform
+		device-driver that supports a CSF GPU. This attribute is
+		used to set the duration value in milliseconds for the
+		configuring hysteresis field for determining GPU idle detection.
+
+What:		/sys/class/misc/mali%u/device/js_ctx_scheduling_mode
+Description:
+		This attribute is available only with platform device that
+		supports a Job Manager based GPU. This attribute is used to set
+		context scheduling priority for a job slot.
+
+		On Reading it provides the currently set job slot context
+		priority.
+
+		Writing 0 to this attribute sets it to the mode were
+		higher priority atoms will be scheduled first, regardless of
+		the context they belong to. Newly-runnable higher priority atoms
+		can preempt lower priority atoms currently running on the GPU,
+		even if they belong to a different context.
+
+		Writing 1 to this attribute set it to the mode were the
+		highest-priority atom will be chosen from each context in turn
+		using a round-robin algorithm, so priority only has an effect
+		within the context an atom belongs to. Newly-runnable higher
+		priority atoms can preempt the lower priority atoms currently
+		running on the GPU, but only if they belong to the same context.
+
+What:		/sys/class/misc/mali%u/device/js_scheduling_period
+Description:
+		This attribute is available only with platform device that
+                supports a Job Manager based GPU. Used to set the job scheduler
+		tick period in nano-seconds. The Job Scheduler determines the
+		jobs that are run on the GPU, and for how long, Job Scheduler
+		makes decisions at a regular time interval determined by value
+		in js_scheduling_period.
+
+What:		/sys/class/misc/mali%u/device/js_softstop_always
+Description:
+		This attribute is available only with platform device that
+                supports a Job Manager based GPU. Soft-stops are disabled when
+		only a single context is present, this attribute is used to
+		enable soft-stop when only a single context is present can be
+		used for debug and unit-testing purposes.
+
+What:		/sys/class/misc/mali%u/device/js_timeouts
+Description:
+		This attribute is available only with platform device that
+                supports a Job Manager based GPU. It used to set the soft stop
+		and hard stop times for the job scheduler.
+
+		Writing value 0 causes no change, or -1 to restore the
+		default timeout.
+
+		The format used to set js_timeouts is
+		"<soft_stop_ms> <soft_stop_ms_cl> <hard_stop_ms_ss>
+		<hard_stop_ms_cl> <hard_stop_ms_dumping> <reset_ms_ss>
+		<reset_ms_cl> <reset_ms_dumping>"
+
+
+What:		/sys/class/misc/mali%u/device/lp_mem_pool_max_size
+Description:
+		This attribute is used to set the maximum number of large pages
+		memory pools that the driver can contain. Large pages are of
+		size 2MB. On read it displays all the max size of all memory
+		pools and can be used to modify each individual pools as well.
+
+What:		/sys/class/misc/mali%u/device/lp_mem_pool_size
+Description:
+		This attribute is used to set the number of large memory pages
+		which should be	populated, changing this value may cause
+		existing pages to be removed from the pool, or new pages to be
+		created and then added to the pool. On read it will provide
+		pool size for all available pools and we can modify individual
+		pool.
+
+What:		/sys/class/misc/mali%u/device/mem_pool_max_size
+Description:
+		This attribute is used to set the maximum number of small pages
+		for memory pools that the driver can contain. Here small pages
+		are of size 4KB. On read it will display the max size for all
+		available pools and allows us to set max size of
+		individual pools.
+
+What:		/sys/class/misc/mali%u/device/mem_pool_size
+Description:
+		This attribute is used to set the number of small memory pages
+		which should be populated, changing this value may cause
+		existing pages to be removed from the pool, or new pages to
+		be created and then added to the pool. On read it will provide
+		pool size for all available pools and we can modify individual
+		pool.
+
+What:		/sys/class/misc/mali%u/device/device/mempool/ctx_default_max_size
+Description:
+		This attribute is used to set maximum memory pool size for
+		all the memory pool so that the maximum amount of free memory
+		that each pool can hold is identical.
+
+What:		/sys/class/misc/mali%u/device/device/mempool/lp_max_size
+Description:
+		This attribute is used to set the maximum number of large pages
+		for all memory pools that the driver can contain.
+		Large pages are of size 2MB.
+
+What:		/sys/class/misc/mali%u/device/device/mempool/max_size
+Description:
+		This attribute is used to set the maximum number of small pages
+		for all the memory pools that the driver can contain.
+		Here small pages are of size 4KB.
+
+What:		/sys/class/misc/mali%u/device/pm_poweroff
+Description:
+		This attribute contains the current values, represented as the
+		following space-separated integers:
+		• PM_GPU_POWEROFF_TICK_NS.
+		• PM_POWEROFF_TICK_SHADER.
+		• PM_POWEROFF_TICK_GPU.
+
+		Example:
+		echo 100000 4 4 > /sys/class/misc/mali0/device/pm_poweroff
+
+		Sets the following new values: 100,000ns tick, four ticks
+		for shader power down, and four ticks for GPU power down.
+
+What:		/sys/class/misc/mali%u/device/power_policy
+Description:
+		This attribute is used to find the current power policy been
+		used, reading will list the power policies available and
+		enclosed in square bracket is the current one been selected.
+
+		Example:
+		cat /sys/class/misc/mali0/device/power_policy
+		[demand] coarse_demand always_on
+
+		To switch to a different policy at runtime write the valid entry
+		name back to the attribute.
+
+		Example:
+		echo "coarse_demand" > /sys/class/misc/mali0/device/power_policy
+
+What:		/sys/class/misc/mali%u/device/progress_timeout
+Description:
+		This attribute is available only with mali platform
+		device-driver that supports a CSF GPU. This attribute
+		is used to set the progress timeout value and read the current
+		progress timeout value.
+
+		Progress timeout value is the maximum number of GPU cycles
+		without forward progress to allow to elapse before terminating a
+		GPU command queue group.
+
+What:           /sys/class/misc/mali%u/device/mcu_shader_pwroff_timeout
+Description:
+		This attribute is available only with mali platform
+		device-driver that supports a CSF GPU. The duration value unit
+		is in micro-seconds and is used for configuring MCU shader Core power-off
+		timer. The configured MCU shader Core power-off timer will only have
+		effect when the host driver has delegated the shader cores
+		power management to MCU. The supplied value will be
+		recorded internally without any change. But the actual field
+		value will be subject to core power-off timer source frequency
+		scaling and maximum value limiting. The default source will be
+		SYSTEM_TIMESTAMP counter. But in case the platform is not able
+		to supply it, the GPU CYCLE_COUNTER source will be used as an
+		alternative.
+
+		If we set the value to zero then MCU-controlled shader/tiler
+		power management will be disabled.
+
+
+What:           /sys/class/misc/mali%u/device/csg_scheduling_period
+Description:
+		This attribute is available only with mali platform
+		device-driver that supports a CSF GPU. The duration value unit
+		is in milliseconds and is used for configuring csf scheduling
+		tick duration.
+
+What:		/sys/class/misc/mali%u/device/reset_timeout
+Description:
+		This attribute is used to set the number of milliseconds to
+		wait for the soft stop to complete for the GPU jobs before
+		proceeding with the GPU reset.
+
+What:		/sys/class/misc/mali%u/device/soft_job_timeout
+Description:
+		This attribute is available only with platform device that
+                supports a Job Manager based GPU. It used to set the timeout
+		value for waiting for any soft event to complete.
+
+What:		/sys/class/misc/mali%u/device/scheduling/serialize_jobs
+Description:
+		This attribute is available only with platform device that
+                supports a Job Manager based GPU.
+
+		Various options available under this are:
+		• none - for disabling serialization.
+		• intra-slot - Serialize atoms within a slot, only one
+				atom per job slot.
+		• inter-slot - Serialize atoms between slots, only one
+				job slot running at any time.
+		• full - it a combination of both inter and intra slot,
+				so only one atom and one job slot running
+				at any time.
+		• full-reset - full serialization and Reset the GPU after
+				each atom completion
+
+		These options are useful for debugging and investigating
+		failures and gpu hangs to narrow down atoms that could cause
+		troubles.
+
+What:		/sys/class/misc/mali%u/device/firmware_config/Compute iterator count/*
+Description:
+		This attribute is available only with mali platform
+		device-driver that supports a CSF GPU. Its a read-only attribute
+		which indicates the maximum number of Compute iterators
+		supported by the GPU.
+
+What:		/sys/class/misc/mali%u/device/firmware_config/CSHWIF count/*
+Description:
+		This attribute is available only with mali platform
+		device-driver that supports a CSF GPU. Its a read-only
+		attribute which indicates the maximum number of	CSHWIFs
+		supported by the GPU.
+
+What:		/sys/class/misc/mali%u/device/firmware_config/Fragment iterator count/*
+Description:
+		This attribute is available only with mali platform
+		device-driver that supports a CSF GPU. Its a read-only
+		attribute which indicates the maximum number of
+		Fragment iterators supported by the GPU.
+
+What:		/sys/class/misc/mali%u/device/firmware_config/Scoreboard set count/*
+Description:
+		This attribute is available only with mali platform
+		device-driver that supports a CSF GPU. Its a read-only
+		attribute which indicates the maximum number of
+		Scoreboard set supported by the GPU.
+
+What:		/sys/class/misc/mali%u/device/firmware_config/Tiler iterator count/*
+Description:
+		This attribute is available only with mali platform
+		device-driver that supports a CSF GPU. Its a read-only
+		attribute which indicates the maximum number of	Tiler iterators
+		supported by the GPU.
+
+What:		/sys/class/misc/mali%u/device/firmware_config/Log verbosity/*
+Description:
+		This attribute is available only with mali platform
+                device-driver that supports a CSF GPU.
+
+		Used to enable firmware logs, logging levels valid values
+		are indicated using 'min and 'max' attribute values
+		values that are read-only.
+
+		Log level can be set using the 'cur' read, write attribute,
+		we can use a valid log level value from min and max range values
+		and set a valid desired log level for firmware logs.

diff --git a/bifrost/r38p2/kernel/Documentation/devicetree/bindings/arm/mali-midgard.txt b/bifrost/r38p2/kernel/Documentation/devicetree/bindings/arm/mali-midgard.txt
new file mode 100644
index 0000000..2126dc9
--- /dev/null
+++ b/bifrost/r38p2/kernel/Documentation/devicetree/bindings/arm/mali-midgard.txt

@@ -0,0 +1,241 @@
+# SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
+#
+# (C) COPYRIGHT 2013-2021 ARM Limited. All rights reserved.
+#
+# This program is free software and is provided to you under the terms of the
+# GNU General Public License version 2 as published by the Free Software
+# Foundation, and any use by you of this program is subject to the terms
+# of such GNU license.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, you can access it online at
+# http://www.gnu.org/licenses/gpl-2.0.html.
+#
+#
+
+* ARM Mali Midgard / Bifrost devices
+
+
+Required properties:
+
+- compatible : Should be mali<chip>, replacing digits with x from the back,
+until malit<Major>xx, and it must end with one of: "arm,malit6xx" or
+"arm,mali-midgard" or "arm,mali-bifrost"
+- reg : Physical base address of the device and length of the register area.
+- interrupts : Contains the three IRQ lines required by T-6xx devices
+- interrupt-names : Contains the names of IRQ resources in the order they were
+provided in the interrupts property. Must contain: "JOB, "MMU", "GPU".
+
+Optional:
+
+- clocks : One or more pairs of phandle to clock and clock specifier
+           for the Mali device. The order is important: the first clock
+           shall correspond to the "clk_mali" source, while the second clock
+           (that is optional) shall correspond to the "shadercores" source.
+- clock-names : Shall be set to: "clk_mali", "shadercores".
+- mali-supply : Phandle to the top level regulator for the Mali device.
+                Refer to
+Documentation/devicetree/bindings/regulator/regulator.txt for details.
+- shadercores-supply : Phandle to shader cores regulator for the Mali device.
+                       This is optional.
+- operating-points-v2 : Refer to Documentation/devicetree/bindings/power/mali-opp.txt
+for details.
+- quirks_gpu : Used to write to the JM_CONFIG or CSF_CONFIG register.
+	  Should be used with care. Options passed here are used to override
+	  certain default behavior. Note: This will override 'idvs-group-size'
+	  field in devicetree and module param 'corestack_driver_control',
+	  therefore if 'quirks_gpu' is used then 'idvs-group-size' and
+	  'corestack_driver_control' value should be incorporated into 'quirks_gpu'.
+- quirks_sc : Used to write to the SHADER_CONFIG register.
+	  Should be used with care. Options passed here are used to override
+	  certain default behavior.
+- quirks_tiler : Used to write to the TILER_CONFIG register.
+	  Should be used with care. Options passed here are used to
+	  disable or override certain default behavior.
+- quirks_mmu : Used to write to the L2_CONFIG register.
+	  Should be used with care. Options passed here are used to
+	  disable or override certain default behavior.
+- power_model : Sets the power model parameters. Defined power models include:
+	  "mali-simple-power-model", "mali-g51-power-model", "mali-g52-power-model",
+	  "mali-g52_r1-power-model", "mali-g71-power-model", "mali-g72-power-model",
+	  "mali-g76-power-model", "mali-g77-power-model", "mali-tnax-power-model",
+	  "mali-tbex-power-model" and "mali-tbax-power-model".
+	- mali-simple-power-model: this model derives the GPU power usage based
+	  on the GPU voltage scaled by the system temperature. Note: it was
+	  designed for the Juno platform, and may not be suitable for others.
+		- compatible: Should be "arm,mali-simple-power-model"
+		- dynamic-coefficient: Coefficient, in pW/(Hz V^2), which is
+		  multiplied by v^2*f to calculate the dynamic power consumption.
+		- static-coefficient: Coefficient, in uW/V^3, which is
+		  multiplied by v^3 to calculate the static power consumption.
+		- ts: An array containing coefficients for the temperature
+		  scaling factor. This is used to scale the static power by a
+		  factor of tsf/1000000,
+		  where tsf = ts[3]*T^3 + ts[2]*T^2 + ts[1]*T + ts[0],
+		  and T = temperature in degrees.
+		- thermal-zone: A string identifying the thermal zone used for
+		  the GPU
+		- temp-poll-interval-ms: the interval at which the system
+		  temperature is polled
+	- mali-g*-power-model(s): unless being stated otherwise, these models derive
+	  the GPU power usage based on performance counters, so they are more
+	  accurate.
+		- compatible: Should be, as examples, "arm,mali-g51-power-model" /
+		  "arm,mali-g72-power-model".
+		- scale: the dynamic power calculated by the power model is
+		  multiplied by a factor of 'scale'. This value should be
+		  chosen to match a particular implementation.
+		- min_sample_cycles: Fall back to the simple power model if the
+		  number of GPU cycles for a given counter dump is less than
+		  'min_sample_cycles'. The default value of this should suffice.
+	* Note: when IPA is used, two separate power models (simple and counter-based)
+	  are used at different points so care should be taken to configure
+	  both power models in the device tree (specifically dynamic-coefficient,
+	  static-coefficient and scale) to best match the platform.
+- power_policy : Sets the GPU power policy at probe time. Available options are
+                 "coarse_demand" and "always_on". If not set, then "coarse_demand" is used.
+- system-coherency : Sets the coherency protocol to be used for coherent
+		     accesses made from the GPU.
+		     If not set then no coherency is used.
+	- 0  : ACE-Lite
+	- 1  : ACE
+	- 31 : No coherency
+- ipa-model : Sets the IPA model to be used for power management. GPU probe will fail if the
+	      model is not found in the registered models list. If no model is specified here,
+	      a gpu-id based model is picked if available, otherwise the default model is used.
+	- mali-simple-power-model: Default model used on mali
+-  idvs-group-size : Override the IDVS group size value. Tasks are sent to
+		     cores in groups of N + 1, so i.e. 0xF means 16 tasks.
+		     Valid values are between 0 to 0x3F (including).
+-  l2-size : Override L2 cache size on GPU that supports it
+-  l2-hash : Override L2 hash function on GPU that supports it
+-  l2-hash-values : Override L2 hash function using provided hash values, on GPUs that supports it.
+		    It is mutually exclusive with 'l2-hash'. Only one or the other must be
+		    used in a supported GPU.
+-  arbiter_if : Phandle to the arbif platform device, used to provide KBASE with an interface
+		to the Arbiter. This is required when using arbitration; setting to a non-NULL
+		value will enable arbitration.
+		If arbitration is in use, then there should be no external GPU control.
+		When arbiter_if is in use then the following must not be:
+		- power_model                         (no IPA allowed with arbitration)
+		- #cooling-cells
+		- operating-points-v2                 (no dvfs in kbase with arbitration)
+		- system-coherency with a value of 1  (no full coherency with arbitration)
+- int_id_override: list of <ID Setting[7:0]> tuples defining the IDs needed to be
+		   set and the setting coresponding to the SYSC_ALLOC register.
+
+
+Example for a Mali GPU with 1 clock and no regulators:
+
+gpu@0xfc010000 {
+	compatible = "arm,malit602", "arm,malit60x", "arm,malit6xx", "arm,mali-midgard";
+	reg = <0xfc010000 0x4000>;
+	interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
+	interrupt-names = "JOB", "MMU", "GPU";
+
+	clocks = <&pclk_mali>;
+	clock-names = "clk_mali";
+	mali-supply = <&vdd_mali>;
+	operating-points-v2 = <&gpu_opp_table>;
+	power_model@0 {
+		compatible = "arm,mali-simple-power-model";
+		static-coefficient = <2427750>;
+		dynamic-coefficient = <4687>;
+		ts = <20000 2000 (-20) 2>;
+		thermal-zone = "gpu";
+	};
+	power_model@1 {
+		compatible = "arm,mali-g71-power-model";
+		scale = <5>;
+	};
+
+	idvs-group-size = <0x7>;
+	l2-size = /bits/ 8 <0x10>;
+	l2-hash = /bits/ 8 <0x04>; /* or l2-hash-values = <0x12345678 0x8765 0xAB>; */
+};
+
+gpu_opp_table: opp_table0 {
+	compatible = "operating-points-v2";
+
+	opp@533000000 {
+		opp-hz = /bits/ 64 <533000000>;
+		opp-microvolt = <1250000>;
+	};
+	opp@450000000 {
+		opp-hz = /bits/ 64 <450000000>;
+		opp-microvolt = <1150000>;
+	};
+	opp@400000000 {
+		opp-hz = /bits/ 64 <400000000>;
+		opp-microvolt = <1125000>;
+	};
+	opp@350000000 {
+		opp-hz = /bits/ 64 <350000000>;
+		opp-microvolt = <1075000>;
+	};
+	opp@266000000 {
+		opp-hz = /bits/ 64 <266000000>;
+		opp-microvolt = <1025000>;
+	};
+	opp@160000000 {
+		opp-hz = /bits/ 64 <160000000>;
+		opp-microvolt = <925000>;
+	};
+	opp@100000000 {
+		opp-hz = /bits/ 64 <100000000>;
+		opp-microvolt = <912500>;
+	};
+};
+
+Example for a Mali GPU with 2 clocks and 2 regulators:
+
+gpu: gpu@6e000000 {
+	compatible = "arm,mali-midgard";
+	reg = <0x0 0x6e000000 0x0 0x200000>;
+	interrupts = <0 168 4>, <0 168 4>, <0 168 4>;
+	interrupt-names = "JOB", "MMU", "GPU";
+	clocks = <&clk_mali 0>, <&clk_mali 1>;
+	clock-names = "clk_mali", "shadercores";
+	mali-supply = <&supply0_3v3>;
+	shadercores-supply = <&supply1_3v3>;
+	system-coherency = <31>;
+	operating-points-v2 = <&gpu_opp_table>;
+};
+
+gpu_opp_table: opp_table0 {
+	compatible = "operating-points-v2", "operating-points-v2-mali";
+
+	opp@0 {
+		opp-hz = /bits/ 64 <50000000>;
+		opp-hz-real = /bits/ 64 <50000000>, /bits/ 64 <45000000>;
+		opp-microvolt = <820000>, <800000>;
+		opp-core-mask = /bits/ 64 <0xf>;
+	};
+	opp@1 {
+		opp-hz = /bits/ 64 <40000000>;
+		opp-hz-real = /bits/ 64 <40000000>, /bits/ 64 <35000000>;
+		opp-microvolt = <720000>, <700000>;
+		opp-core-mask = /bits/ 64 <0x7>;
+	};
+	opp@2 {
+		opp-hz = /bits/ 64 <30000000>;
+		opp-hz-real = /bits/ 64 <30000000>, /bits/ 64 <25000000>;
+		opp-microvolt = <620000>, <700000>;
+		opp-core-mask = /bits/ 64 <0x3>;
+	};
+};
+
+Example for a Mali GPU supporting PBHA configuration via DTB (default):
+
+gpu@0xfc010000 {
+    ...
+    pbha {
+        int_id_override = <2 0x32>, <9 0x05>, <16 0x32>;
+    };
+    ...
+};

diff --git a/dvalin/kernel/Documentation/devicetree/bindings/arm/memory_group_manager.txt b/bifrost/r38p2/kernel/Documentation/devicetree/bindings/arm/memory_group_manager.txt
similarity index 100%
copy from dvalin/kernel/Documentation/devicetree/bindings/arm/memory_group_manager.txt
copy to bifrost/r38p2/kernel/Documentation/devicetree/bindings/arm/memory_group_manager.txt


diff --git a/dvalin/kernel/Documentation/devicetree/bindings/arm/priority_control_manager.txt b/bifrost/r38p2/kernel/Documentation/devicetree/bindings/arm/priority_control_manager.txt
similarity index 100%
copy from dvalin/kernel/Documentation/devicetree/bindings/arm/priority_control_manager.txt
copy to bifrost/r38p2/kernel/Documentation/devicetree/bindings/arm/priority_control_manager.txt


diff --git a/dvalin/kernel/Documentation/devicetree/bindings/arm/protected_memory_allocator.txt b/bifrost/r38p2/kernel/Documentation/devicetree/bindings/arm/protected_memory_allocator.txt
similarity index 100%
copy from dvalin/kernel/Documentation/devicetree/bindings/arm/protected_memory_allocator.txt
copy to bifrost/r38p2/kernel/Documentation/devicetree/bindings/arm/protected_memory_allocator.txt


diff --git a/dvalin/kernel/Documentation/devicetree/bindings/power/mali-opp.txt b/bifrost/r38p2/kernel/Documentation/devicetree/bindings/power/mali-opp.txt
similarity index 100%
copy from dvalin/kernel/Documentation/devicetree/bindings/power/mali-opp.txt
copy to bifrost/r38p2/kernel/Documentation/devicetree/bindings/power/mali-opp.txt


diff --git a/dvalin/kernel/Documentation/dma-buf-test-exporter.txt b/bifrost/r38p2/kernel/Documentation/dma-buf-test-exporter.txt
similarity index 100%
copy from dvalin/kernel/Documentation/dma-buf-test-exporter.txt
copy to bifrost/r38p2/kernel/Documentation/dma-buf-test-exporter.txt


diff --git a/dvalin/kernel/Mconfig b/bifrost/r38p2/kernel/Mconfig
similarity index 100%
copy from dvalin/kernel/Mconfig
copy to bifrost/r38p2/kernel/Mconfig


diff --git a/dvalin/kernel/build.bp b/bifrost/r38p2/kernel/build.bp
similarity index 100%
copy from dvalin/kernel/build.bp
copy to bifrost/r38p2/kernel/build.bp


diff --git a/bifrost/r38p2/kernel/drivers/base/arm/Kbuild b/bifrost/r38p2/kernel/drivers/base/arm/Kbuild
new file mode 100644
index 0000000..01de13b
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/base/arm/Kbuild

@@ -0,0 +1,35 @@
+# SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
+#
+# (C) COPYRIGHT 2021 ARM Limited. All rights reserved.
+#
+# This program is free software and is provided to you under the terms of the
+# GNU General Public License version 2 as published by the Free Software
+# Foundation, and any use by you of this program is subject to the terms
+# of such GNU license.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, you can access it online at
+# http://www.gnu.org/licenses/gpl-2.0.html.
+#
+#
+
+#
+# ccflags
+#
+ccflags-y += -I$(src)/../../../include
+
+subdir-ccflags-y += $(ccflags-y)
+
+#
+# Kernel modules
+#
+obj-$(CONFIG_DMA_BUF_LOCK) += dma_buf_lock/src/
+obj-$(CONFIG_DMA_SHARED_BUFFER_TEST_EXPORTER) += dma_buf_test_exporter/
+obj-$(CONFIG_MALI_MEMORY_GROUP_MANAGER) += memory_group_manager/
+obj-$(CONFIG_MALI_PROTECTED_MEMORY_ALLOCATOR) += protected_memory_allocator/
+

diff --git a/bifrost/r38p2/kernel/drivers/base/arm/Kconfig b/bifrost/r38p2/kernel/drivers/base/arm/Kconfig
new file mode 100644
index 0000000..e5fca3a
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/base/arm/Kconfig

@@ -0,0 +1,74 @@
+# SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
+#
+# (C) COPYRIGHT 2021 ARM Limited. All rights reserved.
+#
+# This program is free software and is provided to you under the terms of the
+# GNU General Public License version 2 as published by the Free Software
+# Foundation, and any use by you of this program is subject to the terms
+# of such GNU license.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, you can access it online at
+# http://www.gnu.org/licenses/gpl-2.0.html.
+#
+#
+
+menuconfig MALI_BASE_MODULES
+	bool "Mali Base extra modules"
+	default n
+	help
+	  Enable this option to build support for a Arm Mali base modules.
+	  Those modules provide extra features or debug interfaces and,
+	  are optional for the use of the Mali GPU modules.
+
+config DMA_BUF_LOCK
+	bool "Build dma-buf lock module"
+	depends on MALI_BASE_MODULES && MALI_DMA_FENCE
+	default y
+	help
+	  This option will build the dma_buf_lock module.
+
+	  Modules:
+	    - dma_buf_lock.ko
+
+config DMA_SHARED_BUFFER_TEST_EXPORTER
+	bool "Build dma-buf framework test exporter module"
+	depends on MALI_BASE_MODULES && DMA_SHARED_BUFFER
+	default y
+	help
+	  This option will build the dma-buf framework test exporter module.
+	  Usable to help test importers.
+
+	  Modules:
+	    - dma-buf-test-exporter.ko
+
+config MALI_MEMORY_GROUP_MANAGER
+	bool "Build Mali Memory Group Manager module"
+	depends on MALI_BASE_MODULES
+	default y
+	help
+	  This option will build the memory group manager module.
+	  This is an example implementation for allocation and release of pages
+	  for memory pools managed by Mali GPU device drivers.
+
+	  Modules:
+	    - memory_group_manager.ko
+
+config MALI_PROTECTED_MEMORY_ALLOCATOR
+	bool "Build Mali Protected Memory Allocator module"
+	depends on MALI_BASE_MODULES && MALI_CSF_SUPPORT
+	default y
+	help
+	  This option will build the protected memory allocator module.
+	  This is an example implementation for allocation and release of pages
+	  of secure memory intended to be used by the firmware
+	  of Mali GPU device drivers.
+
+	  Modules:
+	    - protected_memory_allocator.ko
+

diff --git a/bifrost/r38p2/kernel/drivers/base/arm/Makefile b/bifrost/r38p2/kernel/drivers/base/arm/Makefile
new file mode 100644
index 0000000..ed5c118
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/base/arm/Makefile

@@ -0,0 +1,122 @@
+# SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
+#
+# (C) COPYRIGHT 2021-2022 ARM Limited. All rights reserved.
+#
+# This program is free software and is provided to you under the terms of the
+# GNU General Public License version 2 as published by the Free Software
+# Foundation, and any use by you of this program is subject to the terms
+# of such GNU license.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, you can access it online at
+# http://www.gnu.org/licenses/gpl-2.0.html.
+#
+#
+
+#
+# Paths
+#
+KERNEL_SRC ?= /lib/modules/$(shell uname -r)/build
+KDIR ?= $(KERNEL_SRC)
+
+ifeq ($(KDIR),)
+    $(error Must specify KDIR to point to the kernel to target))
+endif
+
+vars :=
+#
+# Default configuration values
+#
+CONFIG_MALI_BASE_MODULES ?= n
+
+ifeq ($(CONFIG_MALI_BASE_MODULES),y)
+    CONFIG_MALI_CSF_SUPPORT ?= n
+
+    ifneq ($(CONFIG_DMA_SHARED_BUFFER),n)
+        CONFIG_DMA_BUF_LOCK ?= y
+        CONFIG_DMA_SHARED_BUFFER_TEST_EXPORTER ?= y
+    else
+        # Prevent misuse when CONFIG_DMA_SHARED_BUFFER=n
+        CONFIG_DMA_BUF_LOCK = n
+        CONFIG_DMA_SHARED_BUFFER_TEST_EXPORTER = n
+    endif
+
+    CONFIG_MALI_MEMORY_GROUP_MANAGER ?= y
+
+    ifneq ($(CONFIG_MALI_CSF_SUPPORT), n)
+        CONFIG_MALI_PROTECTED_MEMORY_ALLOCATOR ?= y
+    endif
+
+else
+    # Prevent misuse when CONFIG_MALI_BASE_MODULES=n
+    CONFIG_DMA_BUF_LOCK = n
+    CONFIG_DMA_SHARED_BUFFER_TEST_EXPORTER = n
+    CONFIG_MALI_MEMORY_GROUP_MANAGER = n
+    CONFIG_MALI_PROTECTED_MEMORY_ALLOCATOR = n
+
+endif
+
+CONFIGS := \
+    CONFIG_MALI_BASE_MODULES \
+    CONFIG_MALI_CSF_SUPPORT \
+    CONFIG_DMA_BUF_LOCK \
+    CONFIG_DMA_SHARED_BUFFER_TEST_EXPORTER \
+    CONFIG_MALI_MEMORY_GROUP_MANAGER \
+    CONFIG_MALI_PROTECTED_MEMORY_ALLOCATOR
+
+
+#
+# MAKE_ARGS to pass the custom CONFIGs on out-of-tree build
+#
+# Generate the list of CONFIGs and values.
+# $(value config) is the name of the CONFIG option.
+# $(value $(value config)) is its value (y, m).
+# When the CONFIG is not set to y or m, it defaults to n.
+MAKE_ARGS := $(foreach config,$(CONFIGS), \
+                    $(if $(filter y m,$(value $(value config))), \
+                        $(value config)=$(value $(value config)), \
+                        $(value config)=n))
+
+#
+# EXTRA_CFLAGS to define the custom CONFIGs on out-of-tree build
+#
+# Generate the list of CONFIGs defines with values from CONFIGS.
+# $(value config) is the name of the CONFIG option.
+# When set to y or m, the CONFIG gets defined to 1.
+EXTRA_CFLAGS := $(foreach config,$(CONFIGS), \
+                    $(if $(filter y m,$(value $(value config))), \
+                        -D$(value config)=1))
+
+# The following were added to align with W=1 in scripts/Makefile.extrawarn
+# from the Linux source tree
+KBUILD_CFLAGS += -Wall -Werror
+KBUILD_CFLAGS += -Wextra -Wunused -Wno-unused-parameter
+KBUILD_CFLAGS += -Wmissing-declarations
+KBUILD_CFLAGS += -Wmissing-format-attribute
+KBUILD_CFLAGS += -Wmissing-prototypes
+KBUILD_CFLAGS += -Wold-style-definition
+KBUILD_CFLAGS += -Wmissing-include-dirs
+KBUILD_CFLAGS += $(call cc-option, -Wunused-but-set-variable)
+KBUILD_CFLAGS += $(call cc-option, -Wunused-const-variable)
+KBUILD_CFLAGS += $(call cc-option, -Wpacked-not-aligned)
+KBUILD_CFLAGS += $(call cc-option, -Wstringop-truncation)
+# The following turn off the warnings enabled by -Wextra
+KBUILD_CFLAGS += -Wno-missing-field-initializers
+KBUILD_CFLAGS += -Wno-sign-compare
+KBUILD_CFLAGS += -Wno-type-limits
+
+KBUILD_CPPFLAGS += -DKBUILD_EXTRA_WARN1
+
+all:
+	$(MAKE) -C $(KDIR) M=$(CURDIR) $(MAKE_ARGS) EXTRA_CFLAGS="$(EXTRA_CFLAGS)" KBUILD_EXTRA_SYMBOLS="$(EXTRA_SYMBOLS)" modules
+
+modules_install:
+	$(MAKE) -C $(KDIR) M=$(CURDIR) $(MAKE_ARGS) modules_install
+
+clean:
+	$(MAKE) -C $(KDIR) M=$(CURDIR) $(MAKE_ARGS) clean

diff --git a/bifrost/r38p2/kernel/drivers/base/arm/Mconfig b/bifrost/r38p2/kernel/drivers/base/arm/Mconfig
new file mode 100644
index 0000000..a48df6d
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/base/arm/Mconfig

@@ -0,0 +1,74 @@
+# SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
+#
+# (C) COPYRIGHT 2021 ARM Limited. All rights reserved.
+#
+# This program is free software and is provided to you under the terms of the
+# GNU General Public License version 2 as published by the Free Software
+# Foundation, and any use by you of this program is subject to the terms
+# of such GNU license.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, you can access it online at
+# http://www.gnu.org/licenses/gpl-2.0.html.
+#
+#
+
+menuconfig MALI_BASE_MODULES
+	bool "Mali Base extra modules"
+	default y if BACKEND_KERNEL
+	help
+	  Enable this option to build support for a Arm Mali base modules.
+	  Those modules provide extra features or debug interfaces and,
+	  are optional for the use of the Mali GPU modules.
+
+config DMA_BUF_LOCK
+	bool "Build dma-buf lock module"
+	depends on MALI_BASE_MODULES && MALI_DMA_FENCE
+	default y
+	help
+	  This option will build the dma_buf_lock module.
+
+	  Modules:
+	    - dma_buf_lock.ko
+
+config DMA_SHARED_BUFFER_TEST_EXPORTER
+	bool "Build dma-buf framework test exporter module"
+	depends on MALI_BASE_MODULES
+	default y
+	help
+	  This option will build the dma-buf framework test exporter module.
+	  Usable to help test importers.
+
+	  Modules:
+	    - dma-buf-test-exporter.ko
+
+config MALI_MEMORY_GROUP_MANAGER
+	bool "Build Mali Memory Group Manager module"
+	depends on MALI_BASE_MODULES
+	default y
+	help
+	  This option will build the memory group manager module.
+	  This is an example implementation for allocation and release of pages
+	  for memory pools managed by Mali GPU device drivers.
+
+	  Modules:
+	    - memory_group_manager.ko
+
+config MALI_PROTECTED_MEMORY_ALLOCATOR
+	bool "Build Mali Protected Memory Allocator module"
+	depends on MALI_BASE_MODULES && GPU_HAS_CSF
+	default y
+	help
+	  This option will build the protected memory allocator module.
+	  This is an example implementation for allocation and release of pages
+	  of secure memory intended to be used by the firmware
+	  of Mali GPU device drivers.
+
+	  Modules:
+	    - protected_memory_allocator.ko
+

diff --git a/bifrost/r38p2/kernel/drivers/base/arm/dma_buf_lock/src/Kbuild b/bifrost/r38p2/kernel/drivers/base/arm/dma_buf_lock/src/Kbuild
new file mode 100644
index 0000000..b6b741b
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/base/arm/dma_buf_lock/src/Kbuild

@@ -0,0 +1,23 @@
+# SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
+#
+# (C) COPYRIGHT 2012, 2020-2021 ARM Limited. All rights reserved.
+#
+# This program is free software and is provided to you under the terms of the
+# GNU General Public License version 2 as published by the Free Software
+# Foundation, and any use by you of this program is subject to the terms
+# of such GNU license.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, you can access it online at
+# http://www.gnu.org/licenses/gpl-2.0.html.
+#
+#
+
+ifeq ($(CONFIG_DMA_BUF_LOCK), y)
+obj-m := dma_buf_lock.o
+endif

diff --git a/bifrost/r38p2/kernel/drivers/base/arm/dma_buf_lock/src/build.bp b/bifrost/r38p2/kernel/drivers/base/arm/dma_buf_lock/src/build.bp
new file mode 100644
index 0000000..dc49c0f
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/base/arm/dma_buf_lock/src/build.bp

@@ -0,0 +1,37 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
+/*
+ *
+ * (C) COPYRIGHT 2021 ARM Limited. All rights reserved.
+ *
+ * This program is free software and is provided to you under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation, and any use by you of this program is subject to the terms
+ * of such GNU license.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, you can access it online at
+ * http://www.gnu.org/licenses/gpl-2.0.html.
+ *
+ */
+
+bob_kernel_module {
+    name: "dma_buf_lock",
+    defaults: [
+        "kernel_defaults"
+    ],
+    srcs: [
+        "Kbuild",
+        "dma_buf_lock.c",
+        "dma_buf_lock.h",
+    ],
+    enabled: false,
+    dma_buf_lock: {
+        kbuild_options: ["CONFIG_DMA_BUF_LOCK=y"],
+        enabled: true,
+    },
+}

diff --git a/bifrost/r38p2/kernel/drivers/base/arm/dma_buf_lock/src/dma_buf_lock.c b/bifrost/r38p2/kernel/drivers/base/arm/dma_buf_lock/src/dma_buf_lock.c
new file mode 100644
index 0000000..cf9cf30
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/base/arm/dma_buf_lock/src/dma_buf_lock.c

@@ -0,0 +1,908 @@
+// SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
+/*
+ *
+ * (C) COPYRIGHT 2012-2014, 2017-2018, 2020-2022 ARM Limited. All rights reserved.
+ *
+ * This program is free software and is provided to you under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation, and any use by you of this program is subject to the terms
+ * of such GNU license.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, you can access it online at
+ * http://www.gnu.org/licenses/gpl-2.0.html.
+ *
+ */
+
+#include <linux/version.h>
+#include <linux/version_compat_defs.h>
+#include <linux/uaccess.h>
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/fs.h>
+#include <linux/cdev.h>
+#include <linux/device.h>
+#include <linux/slab.h>
+#include <linux/atomic.h>
+#if (KERNEL_VERSION(5, 4, 0) > LINUX_VERSION_CODE)
+#include <linux/reservation.h>
+#else
+#include <linux/dma-resv.h>
+#endif
+#include <linux/dma-buf.h>
+#include <linux/wait.h>
+#include <linux/sched.h>
+#include <linux/poll.h>
+#include <linux/anon_inodes.h>
+#include <linux/file.h>
+
+#if (KERNEL_VERSION(4, 10, 0) > LINUX_VERSION_CODE)
+
+#include <linux/fence.h>
+
+#define dma_fence_context_alloc(a) fence_context_alloc(a)
+#define dma_fence_init(a, b, c, d, e) fence_init(a, b, c, d, e)
+#define dma_fence_get(a) fence_get(a)
+#define dma_fence_put(a) fence_put(a)
+#define dma_fence_signal(a) fence_signal(a)
+#define dma_fence_is_signaled(a) fence_is_signaled(a)
+#define dma_fence_add_callback(a, b, c) fence_add_callback(a, b, c)
+#define dma_fence_remove_callback(a, b) fence_remove_callback(a, b)
+
+#if (KERNEL_VERSION(4, 9, 68) > LINUX_VERSION_CODE)
+#define dma_fence_get_status(a) (fence_is_signaled(a) ? (a)->status ?: 1 : 0)
+#else
+#define dma_fence_get_status(a) (fence_is_signaled(a) ? (a)->error ?: 1 : 0)
+#endif
+
+#else
+
+#include <linux/dma-fence.h>
+
+#if (KERNEL_VERSION(4, 11, 0) > LINUX_VERSION_CODE)
+#define dma_fence_get_status(a) (dma_fence_is_signaled(a) ? \
+	(a)->status ?: 1 \
+	: 0)
+#endif
+
+#endif /* < 4.10.0 */
+
+#include "dma_buf_lock.h"
+
+/* Maximum number of buffers that a single handle can address */
+#define DMA_BUF_LOCK_BUF_MAX 32
+
+#define DMA_BUF_LOCK_DEBUG 1
+
+#define DMA_BUF_LOCK_INIT_BIAS  0xFF
+
+static dev_t dma_buf_lock_dev;
+static struct cdev dma_buf_lock_cdev;
+static struct class *dma_buf_lock_class;
+static const char dma_buf_lock_dev_name[] = "dma_buf_lock";
+
+#if defined(HAVE_UNLOCKED_IOCTL) || defined(HAVE_COMPAT_IOCTL) || ((KERNEL_VERSION(5, 9, 0) <= LINUX_VERSION_CODE))
+static long dma_buf_lock_ioctl(struct file *filp, unsigned int cmd, unsigned long arg);
+#else
+static int dma_buf_lock_ioctl(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg);
+#endif
+
+static const struct file_operations dma_buf_lock_fops = {
+	.owner   = THIS_MODULE,
+#if defined(HAVE_UNLOCKED_IOCTL) || ((KERNEL_VERSION(5, 9, 0) <= LINUX_VERSION_CODE))
+	.unlocked_ioctl   = dma_buf_lock_ioctl,
+#endif
+#if defined(HAVE_COMPAT_IOCTL) || ((KERNEL_VERSION(5, 9, 0) <= LINUX_VERSION_CODE))
+	.compat_ioctl   = dma_buf_lock_ioctl,
+#endif
+};
+
+struct dma_buf_lock_resource {
+#if (KERNEL_VERSION(4, 10, 0) > LINUX_VERSION_CODE)
+	struct fence fence;
+#else
+	struct dma_fence fence;
+#endif
+	int *list_of_dma_buf_fds;               /* List of buffers copied from userspace */
+	atomic_t locked;                        /* Status of lock */
+	struct dma_buf **dma_bufs;
+	unsigned long exclusive;                /* Exclusive access bitmap */
+	atomic_t fence_dep_count;		/* Number of dma-fence dependencies */
+	struct list_head dma_fence_callbacks;	/* list of all callbacks set up to wait on other fences */
+	wait_queue_head_t wait;
+	struct kref refcount;
+	struct list_head link;
+	struct work_struct work;
+	int count;
+};
+
+/**
+ * struct dma_buf_lock_fence_cb - Callback data struct for dma-fence
+ * @fence_cb: Callback function
+ * @fence:    Pointer to the fence object on which this callback is waiting
+ * @res:      Pointer to dma_buf_lock_resource that is waiting on this callback
+ * @node:     List head for linking this callback to the lock resource
+ */
+struct dma_buf_lock_fence_cb {
+#if (KERNEL_VERSION(4, 10, 0) > LINUX_VERSION_CODE)
+	struct fence_cb fence_cb;
+	struct fence *fence;
+#else
+	struct dma_fence_cb fence_cb;
+	struct dma_fence *fence;
+#endif
+	struct dma_buf_lock_resource *res;
+	struct list_head node;
+};
+
+static LIST_HEAD(dma_buf_lock_resource_list);
+static DEFINE_MUTEX(dma_buf_lock_mutex);
+
+static inline int is_dma_buf_lock_file(struct file *);
+static void dma_buf_lock_dounlock(struct kref *ref);
+
+
+/*** dma_buf_lock fence part ***/
+
+/* Spin lock protecting all Mali fences as fence->lock. */
+static DEFINE_SPINLOCK(dma_buf_lock_fence_lock);
+
+static const char *
+#if (KERNEL_VERSION(4, 10, 0) > LINUX_VERSION_CODE)
+dma_buf_lock_fence_get_driver_name(struct fence *fence)
+#else
+dma_buf_lock_fence_get_driver_name(struct dma_fence *fence)
+#endif
+{
+	return "dma_buf_lock";
+}
+
+static const char *
+#if (KERNEL_VERSION(4, 10, 0) > LINUX_VERSION_CODE)
+dma_buf_lock_fence_get_timeline_name(struct fence *fence)
+#else
+dma_buf_lock_fence_get_timeline_name(struct dma_fence *fence)
+#endif
+{
+	return "dma_buf_lock.timeline";
+}
+
+static bool
+#if (KERNEL_VERSION(4, 10, 0) > LINUX_VERSION_CODE)
+dma_buf_lock_fence_enable_signaling(struct fence *fence)
+#else
+dma_buf_lock_fence_enable_signaling(struct dma_fence *fence)
+#endif
+{
+	return true;
+}
+
+#if (KERNEL_VERSION(4, 10, 0) > LINUX_VERSION_CODE)
+const struct fence_ops dma_buf_lock_fence_ops = {
+	.wait = fence_default_wait,
+#else
+const struct dma_fence_ops dma_buf_lock_fence_ops = {
+	.wait = dma_fence_default_wait,
+#endif
+	.get_driver_name = dma_buf_lock_fence_get_driver_name,
+	.get_timeline_name = dma_buf_lock_fence_get_timeline_name,
+	.enable_signaling = dma_buf_lock_fence_enable_signaling,
+};
+
+static void
+dma_buf_lock_fence_init(struct dma_buf_lock_resource *resource)
+{
+	dma_fence_init(&resource->fence,
+		       &dma_buf_lock_fence_ops,
+		       &dma_buf_lock_fence_lock,
+		       0,
+		       0);
+}
+
+static void
+dma_buf_lock_fence_free_callbacks(struct dma_buf_lock_resource *resource)
+{
+	struct dma_buf_lock_fence_cb *cb, *tmp;
+
+	/* Clean up and free callbacks. */
+	list_for_each_entry_safe(cb, tmp, &resource->dma_fence_callbacks, node) {
+		/* Cancel callbacks that hasn't been called yet and release the
+		 * reference taken in dma_buf_lock_fence_add_callback().
+		 */
+		dma_fence_remove_callback(cb->fence, &cb->fence_cb);
+		dma_fence_put(cb->fence);
+		list_del(&cb->node);
+		kfree(cb);
+	}
+}
+
+static void
+dma_buf_lock_fence_work(struct work_struct *pwork)
+{
+	struct dma_buf_lock_resource *resource =
+		container_of(pwork, struct dma_buf_lock_resource, work);
+
+	WARN_ON(atomic_read(&resource->fence_dep_count));
+	WARN_ON(!atomic_read(&resource->locked));
+	WARN_ON(!resource->exclusive);
+
+	mutex_lock(&dma_buf_lock_mutex);
+	kref_put(&resource->refcount, dma_buf_lock_dounlock);
+	mutex_unlock(&dma_buf_lock_mutex);
+}
+
+static void
+#if (KERNEL_VERSION(4, 10, 0) > LINUX_VERSION_CODE)
+dma_buf_lock_fence_callback(struct fence *fence, struct fence_cb *cb)
+#else
+dma_buf_lock_fence_callback(struct dma_fence *fence, struct dma_fence_cb *cb)
+#endif
+{
+	struct dma_buf_lock_fence_cb *dma_buf_lock_cb = container_of(cb,
+				struct dma_buf_lock_fence_cb,
+				fence_cb);
+	struct dma_buf_lock_resource *resource = dma_buf_lock_cb->res;
+
+#if DMA_BUF_LOCK_DEBUG
+	pr_debug("%s\n", __func__);
+#endif
+
+	/* Callback function will be invoked in atomic context. */
+
+	if (atomic_dec_and_test(&resource->fence_dep_count)) {
+		atomic_set(&resource->locked, 1);
+		wake_up(&resource->wait);
+
+		if (resource->exclusive)
+			/* Warn if the work was already queued */
+			WARN_ON(!schedule_work(&resource->work));
+	}
+}
+
+#if (KERNEL_VERSION(4, 10, 0) > LINUX_VERSION_CODE)
+static int
+dma_buf_lock_fence_add_callback(struct dma_buf_lock_resource *resource,
+				struct fence *fence,
+				fence_func_t callback)
+#else
+static int
+dma_buf_lock_fence_add_callback(struct dma_buf_lock_resource *resource,
+				struct dma_fence *fence,
+				dma_fence_func_t callback)
+#endif
+{
+	int err = 0;
+	struct dma_buf_lock_fence_cb *fence_cb;
+
+	if (!fence)
+		return -EINVAL;
+
+	fence_cb = kmalloc(sizeof(*fence_cb), GFP_KERNEL);
+	if (!fence_cb)
+		return -ENOMEM;
+
+	fence_cb->fence = fence;
+	fence_cb->res   = resource;
+	INIT_LIST_HEAD(&fence_cb->node);
+
+	err = dma_fence_add_callback(fence, &fence_cb->fence_cb,
+				     callback);
+
+	if (err == -ENOENT) {
+		/* Fence signaled, get the completion result */
+		err = dma_fence_get_status(fence);
+
+		/* remap success completion to err code */
+		if (err == 1)
+			err = 0;
+
+		kfree(fence_cb);
+	} else if (err) {
+		kfree(fence_cb);
+	} else {
+		/*
+		 * Get reference to fence that will be kept until callback gets
+		 * cleaned up in dma_buf_lock_fence_free_callbacks().
+		 */
+		dma_fence_get(fence);
+		atomic_inc(&resource->fence_dep_count);
+		/* Add callback to resource's list of callbacks */
+		list_add(&fence_cb->node, &resource->dma_fence_callbacks);
+	}
+
+	return err;
+}
+
+#if (KERNEL_VERSION(5, 4, 0) > LINUX_VERSION_CODE)
+static int
+dma_buf_lock_add_fence_reservation_callback(struct dma_buf_lock_resource *resource,
+					    struct reservation_object *resv,
+					    bool exclusive)
+#else
+static int
+dma_buf_lock_add_fence_reservation_callback(struct dma_buf_lock_resource *resource,
+					    struct dma_resv *resv,
+					    bool exclusive)
+#endif
+{
+#if (KERNEL_VERSION(4, 10, 0) > LINUX_VERSION_CODE)
+	struct fence *excl_fence = NULL;
+	struct fence **shared_fences = NULL;
+#else
+	struct dma_fence *excl_fence = NULL;
+	struct dma_fence **shared_fences = NULL;
+#endif
+	unsigned int shared_count = 0;
+	int err, i;
+
+#if (KERNEL_VERSION(5, 4, 0) > LINUX_VERSION_CODE)
+	err = reservation_object_get_fences_rcu(
+#elif (KERNEL_VERSION(5, 14, 0) > LINUX_VERSION_CODE)
+	err = dma_resv_get_fences_rcu(
+#else
+	err = dma_resv_get_fences(
+#endif
+						resv,
+						&excl_fence,
+						&shared_count,
+						&shared_fences);
+	if (err)
+		return err;
+
+	if (excl_fence) {
+		err = dma_buf_lock_fence_add_callback(resource,
+						      excl_fence,
+						      dma_buf_lock_fence_callback);
+
+		/* Release our reference, taken by reservation_object_get_fences_rcu(),
+		 * to the fence. We have set up our callback (if that was possible),
+		 * and it's the fence's owner is responsible for singling the fence
+		 * before allowing it to disappear.
+		 */
+		dma_fence_put(excl_fence);
+
+		if (err)
+			goto out;
+	}
+
+	if (exclusive) {
+		for (i = 0; i < shared_count; i++) {
+			err = dma_buf_lock_fence_add_callback(resource,
+							      shared_fences[i],
+							      dma_buf_lock_fence_callback);
+			if (err)
+				goto out;
+		}
+	}
+
+	/* Release all our references to the shared fences, taken by
+	 * reservation_object_get_fences_rcu(). We have set up our callback (if
+	 * that was possible), and it's the fence's owner is responsible for
+	 * signaling the fence before allowing it to disappear.
+	 */
+out:
+	for (i = 0; i < shared_count; i++)
+		dma_fence_put(shared_fences[i]);
+	kfree(shared_fences);
+
+	return err;
+}
+
+static void
+dma_buf_lock_release_fence_reservation(struct dma_buf_lock_resource *resource,
+				       struct ww_acquire_ctx *ctx)
+{
+	unsigned int r;
+
+	for (r = 0; r < resource->count; r++)
+		ww_mutex_unlock(&resource->dma_bufs[r]->resv->lock);
+	ww_acquire_fini(ctx);
+}
+
+static int
+dma_buf_lock_acquire_fence_reservation(struct dma_buf_lock_resource *resource,
+				       struct ww_acquire_ctx *ctx)
+{
+#if (KERNEL_VERSION(5, 4, 0) > LINUX_VERSION_CODE)
+	struct reservation_object *content_resv = NULL;
+#else
+	struct dma_resv *content_resv = NULL;
+#endif
+	unsigned int content_resv_idx = 0;
+	unsigned int r;
+	int err = 0;
+
+	ww_acquire_init(ctx, &reservation_ww_class);
+
+retry:
+	for (r = 0; r < resource->count; r++) {
+		if (resource->dma_bufs[r]->resv == content_resv) {
+			content_resv = NULL;
+			continue;
+		}
+
+		err = ww_mutex_lock(&resource->dma_bufs[r]->resv->lock, ctx);
+		if (err)
+			goto error;
+	}
+
+	ww_acquire_done(ctx);
+	return err;
+
+error:
+	content_resv_idx = r;
+
+	/* Unlock the locked one ones */
+	while (r--)
+		ww_mutex_unlock(&resource->dma_bufs[r]->resv->lock);
+
+	if (content_resv)
+		ww_mutex_unlock(&content_resv->lock);
+
+	/* If we deadlock try with lock_slow and retry */
+	if (err == -EDEADLK) {
+#if DMA_BUF_LOCK_DEBUG
+		pr_debug("deadlock at dma_buf fd %i\n",
+		       resource->list_of_dma_buf_fds[content_resv_idx]);
+#endif
+		content_resv = resource->dma_bufs[content_resv_idx]->resv;
+		ww_mutex_lock_slow(&content_resv->lock, ctx);
+		goto retry;
+	}
+
+	/* If we are here the function failed */
+	ww_acquire_fini(ctx);
+	return err;
+}
+
+static int dma_buf_lock_handle_release(struct inode *inode, struct file *file)
+{
+	struct dma_buf_lock_resource *resource;
+
+	if (!is_dma_buf_lock_file(file))
+		return -EINVAL;
+
+	resource = file->private_data;
+#if DMA_BUF_LOCK_DEBUG
+	pr_debug("%s\n", __func__);
+#endif
+	mutex_lock(&dma_buf_lock_mutex);
+	kref_put(&resource->refcount, dma_buf_lock_dounlock);
+	mutex_unlock(&dma_buf_lock_mutex);
+
+	return 0;
+}
+
+static __poll_t dma_buf_lock_handle_poll(struct file *file, poll_table *wait)
+{
+	struct dma_buf_lock_resource *resource;
+	unsigned int ret = 0;
+
+	if (!is_dma_buf_lock_file(file)) {
+#if (KERNEL_VERSION(4, 19, 0) > LINUX_VERSION_CODE)
+		return POLLERR;
+#else
+		return EPOLLERR;
+#endif
+	}
+
+	resource = file->private_data;
+#if DMA_BUF_LOCK_DEBUG
+	pr_debug("%s\n", __func__);
+#endif
+	if (atomic_read(&resource->locked) == 1) {
+		/* Resources have been locked */
+#if (KERNEL_VERSION(4, 19, 0) > LINUX_VERSION_CODE)
+		ret = POLLIN | POLLRDNORM;
+		if (resource->exclusive)
+			ret |= POLLOUT | POLLWRNORM;
+#else
+		ret = EPOLLIN | EPOLLRDNORM;
+		if (resource->exclusive)
+			ret |= EPOLLOUT | EPOLLWRNORM;
+#endif
+	} else {
+		if (!poll_does_not_wait(wait))
+			poll_wait(file, &resource->wait, wait);
+	}
+#if DMA_BUF_LOCK_DEBUG
+	pr_debug("%s : return %i\n", __func__, ret);
+#endif
+	return ret;
+}
+
+static const struct file_operations dma_buf_lock_handle_fops = {
+	.owner		= THIS_MODULE,
+	.release	= dma_buf_lock_handle_release,
+	.poll		= dma_buf_lock_handle_poll,
+};
+
+/*
+ * is_dma_buf_lock_file - Check if struct file* is associated with dma_buf_lock
+ */
+static inline int is_dma_buf_lock_file(struct file *file)
+{
+	return file->f_op == &dma_buf_lock_handle_fops;
+}
+
+/*
+ * Start requested lock.
+ *
+ * Allocates required memory, copies dma_buf_fd list from userspace,
+ * acquires related reservation objects, and starts the lock.
+ */
+static int dma_buf_lock_dolock(struct dma_buf_lock_k_request *request)
+{
+	struct dma_buf_lock_resource *resource;
+	struct ww_acquire_ctx ww_ctx;
+	struct file *file;
+	int size;
+	int fd;
+	int i;
+	int ret;
+	int error;
+
+	if (request->list_of_dma_buf_fds == NULL)
+		return -EINVAL;
+	if (request->count <= 0)
+		return -EINVAL;
+	if (request->count > DMA_BUF_LOCK_BUF_MAX)
+		return -EINVAL;
+	if (request->exclusive != DMA_BUF_LOCK_NONEXCLUSIVE &&
+	    request->exclusive != DMA_BUF_LOCK_EXCLUSIVE)
+		return -EINVAL;
+
+	resource = kzalloc(sizeof(*resource), GFP_KERNEL);
+	if (resource == NULL)
+		return -ENOMEM;
+
+	atomic_set(&resource->locked, 0);
+	kref_init(&resource->refcount);
+	INIT_LIST_HEAD(&resource->link);
+	INIT_WORK(&resource->work, dma_buf_lock_fence_work);
+	resource->count = request->count;
+
+	/* Allocate space to store dma_buf_fds received from user space */
+	size = request->count * sizeof(int);
+	resource->list_of_dma_buf_fds = kmalloc(size, GFP_KERNEL);
+
+	if (resource->list_of_dma_buf_fds == NULL) {
+		kfree(resource);
+		return -ENOMEM;
+	}
+
+	/* Allocate space to store dma_buf pointers associated with dma_buf_fds */
+	size = sizeof(struct dma_buf *) * request->count;
+	resource->dma_bufs = kmalloc(size, GFP_KERNEL);
+
+	if (resource->dma_bufs == NULL) {
+		kfree(resource->list_of_dma_buf_fds);
+		kfree(resource);
+		return -ENOMEM;
+	}
+
+	/* Copy requested list of dma_buf_fds from user space */
+	size = request->count * sizeof(int);
+	if (copy_from_user(resource->list_of_dma_buf_fds,
+			   (void __user *)request->list_of_dma_buf_fds,
+			   size) != 0) {
+		kfree(resource->list_of_dma_buf_fds);
+		kfree(resource->dma_bufs);
+		kfree(resource);
+		return -ENOMEM;
+	}
+#if DMA_BUF_LOCK_DEBUG
+	for (i = 0; i < request->count; i++)
+		pr_debug("dma_buf %i = %X\n", i, resource->list_of_dma_buf_fds[i]);
+#endif
+
+	/* Initialize the fence associated with dma_buf_lock resource */
+	dma_buf_lock_fence_init(resource);
+
+	INIT_LIST_HEAD(&resource->dma_fence_callbacks);
+
+	atomic_set(&resource->fence_dep_count, DMA_BUF_LOCK_INIT_BIAS);
+
+	/* Add resource to global list */
+	mutex_lock(&dma_buf_lock_mutex);
+
+	list_add(&resource->link, &dma_buf_lock_resource_list);
+
+	mutex_unlock(&dma_buf_lock_mutex);
+
+	for (i = 0; i < request->count; i++) {
+		/* Convert fd into dma_buf structure */
+		resource->dma_bufs[i] = dma_buf_get(resource->list_of_dma_buf_fds[i]);
+
+		if (IS_ERR_VALUE(PTR_ERR(resource->dma_bufs[i]))) {
+			mutex_lock(&dma_buf_lock_mutex);
+			kref_put(&resource->refcount, dma_buf_lock_dounlock);
+			mutex_unlock(&dma_buf_lock_mutex);
+			return -EINVAL;
+		}
+
+		/*Check the reservation object associated with dma_buf */
+		if (resource->dma_bufs[i]->resv == NULL) {
+			mutex_lock(&dma_buf_lock_mutex);
+			kref_put(&resource->refcount, dma_buf_lock_dounlock);
+			mutex_unlock(&dma_buf_lock_mutex);
+			return -EINVAL;
+		}
+#if DMA_BUF_LOCK_DEBUG
+		pr_debug("%s : dma_buf_fd %i dma_buf %pK dma_fence reservation %pK\n",
+		       __func__, resource->list_of_dma_buf_fds[i], resource->dma_bufs[i], resource->dma_bufs[i]->resv);
+#endif
+	}
+
+	init_waitqueue_head(&resource->wait);
+
+	kref_get(&resource->refcount);
+
+	error = get_unused_fd_flags(0);
+	if (error < 0)
+		return error;
+
+	fd = error;
+
+	file = anon_inode_getfile("dma_buf_lock", &dma_buf_lock_handle_fops, (void *)resource, 0);
+
+	if (IS_ERR(file)) {
+		put_unused_fd(fd);
+		mutex_lock(&dma_buf_lock_mutex);
+		kref_put(&resource->refcount, dma_buf_lock_dounlock);
+		kref_put(&resource->refcount, dma_buf_lock_dounlock);
+		mutex_unlock(&dma_buf_lock_mutex);
+		return PTR_ERR(file);
+	}
+
+	resource->exclusive = request->exclusive;
+
+	/* Start locking process */
+	ret = dma_buf_lock_acquire_fence_reservation(resource, &ww_ctx);
+	if (ret) {
+#if DMA_BUF_LOCK_DEBUG
+		pr_debug("%s : Error %d locking reservations.\n", __func__, ret);
+#endif
+		put_unused_fd(fd);
+		mutex_lock(&dma_buf_lock_mutex);
+		kref_put(&resource->refcount, dma_buf_lock_dounlock);
+		kref_put(&resource->refcount, dma_buf_lock_dounlock);
+		mutex_unlock(&dma_buf_lock_mutex);
+		return ret;
+	}
+
+	/* Take an extra reference for exclusive access, which will be dropped
+	 * once the pre-existing fences attached to dma-buf resources, for which
+	 * we have commited for exclusive access, are signaled.
+	 * At a given time there can be only one exclusive fence attached to a
+	 * reservation object, so the new exclusive fence replaces the original
+	 * fence and the future sync is done against the new fence which is
+	 * supposed to be signaled only after the original fence was signaled.
+	 * If the new exclusive fence is signaled prematurely then the resources
+	 * would become available for new access while they are already being
+	 * written to by the original owner.
+	 */
+	if (resource->exclusive)
+		kref_get(&resource->refcount);
+
+	for (i = 0; i < request->count; i++) {
+#if (KERNEL_VERSION(5, 4, 0) > LINUX_VERSION_CODE)
+		struct reservation_object *resv = resource->dma_bufs[i]->resv;
+#else
+		struct dma_resv *resv = resource->dma_bufs[i]->resv;
+#endif
+		if (!test_bit(i, &resource->exclusive)) {
+
+#if (KERNEL_VERSION(5, 4, 0) > LINUX_VERSION_CODE)
+			ret = reservation_object_reserve_shared(resv);
+#else
+			ret = dma_resv_reserve_shared(resv, 0);
+#endif
+			if (ret) {
+#if DMA_BUF_LOCK_DEBUG
+				pr_debug("%s : Error %d reserving space for shared fence.\n", __func__, ret);
+#endif
+				break;
+			}
+
+			ret = dma_buf_lock_add_fence_reservation_callback(resource,
+									  resv,
+									  false);
+			if (ret) {
+#if DMA_BUF_LOCK_DEBUG
+				pr_debug("%s : Error %d adding reservation to callback.\n", __func__, ret);
+#endif
+				break;
+			}
+
+#if (KERNEL_VERSION(5, 4, 0) > LINUX_VERSION_CODE)
+			reservation_object_add_shared_fence(resv, &resource->fence);
+#else
+			dma_resv_add_shared_fence(resv, &resource->fence);
+#endif
+		} else {
+			ret = dma_buf_lock_add_fence_reservation_callback(resource, resv, true);
+			if (ret) {
+#if DMA_BUF_LOCK_DEBUG
+				pr_debug("%s : Error %d adding reservation to callback.\n", __func__, ret);
+#endif
+				break;
+			}
+
+#if (KERNEL_VERSION(5, 4, 0) > LINUX_VERSION_CODE)
+			reservation_object_add_excl_fence(resv, &resource->fence);
+#else
+			dma_resv_add_excl_fence(resv, &resource->fence);
+#endif
+		}
+	}
+
+	dma_buf_lock_release_fence_reservation(resource, &ww_ctx);
+
+	/* Test if the callbacks were already triggered */
+	if (!atomic_sub_return(DMA_BUF_LOCK_INIT_BIAS, &resource->fence_dep_count)) {
+		atomic_set(&resource->locked, 1);
+
+		/* Drop the extra reference taken for exclusive access */
+		if (resource->exclusive)
+			dma_buf_lock_fence_work(&resource->work);
+	}
+
+	if (IS_ERR_VALUE((unsigned long)ret)) {
+		put_unused_fd(fd);
+
+		mutex_lock(&dma_buf_lock_mutex);
+		kref_put(&resource->refcount, dma_buf_lock_dounlock);
+		kref_put(&resource->refcount, dma_buf_lock_dounlock);
+		mutex_unlock(&dma_buf_lock_mutex);
+
+		return ret;
+	}
+
+#if DMA_BUF_LOCK_DEBUG
+	pr_debug("%s : complete\n", __func__);
+#endif
+	mutex_lock(&dma_buf_lock_mutex);
+	kref_put(&resource->refcount, dma_buf_lock_dounlock);
+	mutex_unlock(&dma_buf_lock_mutex);
+
+	/* Installing the fd is deferred to the very last operation before return
+	 * to avoid allowing userspace to close it during the setup.
+	 */
+	fd_install(fd, file);
+	return fd;
+}
+
+static void dma_buf_lock_dounlock(struct kref *ref)
+{
+	int i;
+	struct dma_buf_lock_resource *resource = container_of(ref, struct dma_buf_lock_resource, refcount);
+
+	atomic_set(&resource->locked, 0);
+
+	/* Signal the resource's fence. */
+	dma_fence_signal(&resource->fence);
+
+	dma_buf_lock_fence_free_callbacks(resource);
+
+	list_del(&resource->link);
+
+	for (i = 0; i < resource->count; i++) {
+		if (resource->dma_bufs[i])
+			dma_buf_put(resource->dma_bufs[i]);
+	}
+
+	kfree(resource->dma_bufs);
+	kfree(resource->list_of_dma_buf_fds);
+	dma_fence_put(&resource->fence);
+}
+
+static int __init dma_buf_lock_init(void)
+{
+	int err;
+#if DMA_BUF_LOCK_DEBUG
+	pr_debug("%s\n", __func__);
+#endif
+	err = alloc_chrdev_region(&dma_buf_lock_dev, 0, 1, dma_buf_lock_dev_name);
+
+	if (err == 0) {
+		cdev_init(&dma_buf_lock_cdev, &dma_buf_lock_fops);
+
+		err = cdev_add(&dma_buf_lock_cdev, dma_buf_lock_dev, 1);
+
+		if (err == 0) {
+			dma_buf_lock_class = class_create(THIS_MODULE, dma_buf_lock_dev_name);
+			if (IS_ERR(dma_buf_lock_class))
+				err = PTR_ERR(dma_buf_lock_class);
+			else {
+				struct device *mdev = device_create(
+					dma_buf_lock_class, NULL, dma_buf_lock_dev,
+					NULL, "%s", dma_buf_lock_dev_name);
+				if (!IS_ERR(mdev))
+					return 0;
+
+				err = PTR_ERR(mdev);
+				class_destroy(dma_buf_lock_class);
+			}
+			cdev_del(&dma_buf_lock_cdev);
+		}
+
+		unregister_chrdev_region(dma_buf_lock_dev, 1);
+	}
+#if DMA_BUF_LOCK_DEBUG
+	pr_debug("%s failed\n", __func__);
+#endif
+	return err;
+}
+
+static void __exit dma_buf_lock_exit(void)
+{
+#if DMA_BUF_LOCK_DEBUG
+	pr_debug("%s\n", __func__);
+#endif
+
+	/* Unlock all outstanding references */
+	while (1) {
+		struct dma_buf_lock_resource *resource;
+
+		mutex_lock(&dma_buf_lock_mutex);
+		if (list_empty(&dma_buf_lock_resource_list)) {
+			mutex_unlock(&dma_buf_lock_mutex);
+			break;
+		}
+
+		resource = list_entry(dma_buf_lock_resource_list.next,
+			struct dma_buf_lock_resource, link);
+
+		kref_put(&resource->refcount, dma_buf_lock_dounlock);
+		mutex_unlock(&dma_buf_lock_mutex);
+	}
+
+	device_destroy(dma_buf_lock_class, dma_buf_lock_dev);
+
+	class_destroy(dma_buf_lock_class);
+
+	cdev_del(&dma_buf_lock_cdev);
+
+	unregister_chrdev_region(dma_buf_lock_dev, 1);
+}
+
+#if defined(HAVE_UNLOCKED_IOCTL) || defined(HAVE_COMPAT_IOCTL) || ((KERNEL_VERSION(5, 9, 0) <= LINUX_VERSION_CODE))
+static long dma_buf_lock_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
+#else
+static int dma_buf_lock_ioctl(struct inode *inode, struct file *filp, unsigned int cmd, unsigned long arg)
+#endif
+{
+	struct dma_buf_lock_k_request request;
+	int size = _IOC_SIZE(cmd);
+
+	if (_IOC_TYPE(cmd) != DMA_BUF_LOCK_IOC_MAGIC)
+		return -ENOTTY;
+	if ((_IOC_NR(cmd) < DMA_BUF_LOCK_IOC_MINNR) || (_IOC_NR(cmd) > DMA_BUF_LOCK_IOC_MAXNR))
+		return -ENOTTY;
+
+	switch (cmd) {
+	case DMA_BUF_LOCK_FUNC_LOCK_ASYNC:
+		if (size != sizeof(request))
+			return -ENOTTY;
+		if (copy_from_user(&request, (void __user *)arg, size))
+			return -EFAULT;
+#if DMA_BUF_LOCK_DEBUG
+		pr_debug("DMA_BUF_LOCK_FUNC_LOCK_ASYNC - %i\n", request.count);
+#endif
+		return dma_buf_lock_dolock(&request);
+	}
+
+	return -ENOTTY;
+}
+
+module_init(dma_buf_lock_init);
+module_exit(dma_buf_lock_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_INFO(import_ns, "DMA_BUF");

diff --git a/bifrost/r38p2/kernel/drivers/base/arm/dma_buf_lock/src/dma_buf_lock.h b/bifrost/r38p2/kernel/drivers/base/arm/dma_buf_lock/src/dma_buf_lock.h
new file mode 100644
index 0000000..b5bb225
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/base/arm/dma_buf_lock/src/dma_buf_lock.h

@@ -0,0 +1,44 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
+/*
+ *
+ * (C) COPYRIGHT 2012, 2020-2021 ARM Limited. All rights reserved.
+ *
+ * This program is free software and is provided to you under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation, and any use by you of this program is subject to the terms
+ * of such GNU license.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, you can access it online at
+ * http://www.gnu.org/licenses/gpl-2.0.html.
+ *
+ */
+
+#ifndef _DMA_BUF_LOCK_H
+#define _DMA_BUF_LOCK_H
+
+enum dma_buf_lock_exclusive {
+	DMA_BUF_LOCK_NONEXCLUSIVE = 0,
+	DMA_BUF_LOCK_EXCLUSIVE = -1
+};
+
+struct dma_buf_lock_k_request {
+	int count;
+	int *list_of_dma_buf_fds;
+	int timeout;
+	enum dma_buf_lock_exclusive exclusive;
+};
+
+#define DMA_BUF_LOCK_IOC_MAGIC '~'
+
+#define DMA_BUF_LOCK_FUNC_LOCK_ASYNC       _IOW(DMA_BUF_LOCK_IOC_MAGIC, 11, struct dma_buf_lock_k_request)
+
+#define DMA_BUF_LOCK_IOC_MINNR 11
+#define DMA_BUF_LOCK_IOC_MAXNR 11
+
+#endif /* _DMA_BUF_LOCK_H */

diff --git a/dvalin/kernel/drivers/base/arm/dma_buf_test_exporter/Kbuild b/bifrost/r38p2/kernel/drivers/base/arm/dma_buf_test_exporter/Kbuild
similarity index 100%
copy from dvalin/kernel/drivers/base/arm/dma_buf_test_exporter/Kbuild
copy to bifrost/r38p2/kernel/drivers/base/arm/dma_buf_test_exporter/Kbuild


diff --git a/dvalin/kernel/drivers/base/arm/dma_buf_test_exporter/build.bp b/bifrost/r38p2/kernel/drivers/base/arm/dma_buf_test_exporter/build.bp
similarity index 100%
copy from dvalin/kernel/drivers/base/arm/dma_buf_test_exporter/build.bp
copy to bifrost/r38p2/kernel/drivers/base/arm/dma_buf_test_exporter/build.bp


diff --git a/bifrost/r38p2/kernel/drivers/base/arm/dma_buf_test_exporter/dma-buf-test-exporter.c b/bifrost/r38p2/kernel/drivers/base/arm/dma_buf_test_exporter/dma-buf-test-exporter.c
new file mode 100644
index 0000000..6b9a4d7
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/base/arm/dma_buf_test_exporter/dma-buf-test-exporter.c

@@ -0,0 +1,781 @@
+// SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
+/*
+ *
+ * (C) COPYRIGHT 2012-2022 ARM Limited. All rights reserved.
+ *
+ * This program is free software and is provided to you under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation, and any use by you of this program is subject to the terms
+ * of such GNU license.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, you can access it online at
+ * http://www.gnu.org/licenses/gpl-2.0.html.
+ *
+ */
+
+#include <linux/dma-buf-test-exporter.h>
+#include <linux/dma-buf.h>
+#include <linux/miscdevice.h>
+#include <linux/slab.h>
+#include <linux/uaccess.h>
+#include <linux/version.h>
+#include <linux/module.h>
+#include <linux/fs.h>
+#include <linux/atomic.h>
+#include <linux/mm.h>
+#include <linux/highmem.h>
+#include <linux/dma-mapping.h>
+
+/* Maximum size allowed in a single DMA_BUF_TE_ALLOC call */
+#define DMA_BUF_TE_ALLOC_MAX_SIZE ((8ull << 30) >> PAGE_SHIFT) /* 8 GB */
+
+/* Since kernel version 5.0 CONFIG_ARCH_NO_SG_CHAIN replaced CONFIG_ARCH_HAS_SG_CHAIN */
+#if KERNEL_VERSION(5, 0, 0) > LINUX_VERSION_CODE
+#if (!defined(ARCH_HAS_SG_CHAIN) && !defined(CONFIG_ARCH_HAS_SG_CHAIN))
+#define NO_SG_CHAIN
+#endif
+#elif defined(CONFIG_ARCH_NO_SG_CHAIN)
+#define NO_SG_CHAIN
+#endif
+
+struct dma_buf_te_alloc {
+	/* the real alloc */
+	size_t nr_pages;
+	struct page **pages;
+
+	/* the debug usage tracking */
+	int nr_attached_devices;
+	int nr_device_mappings;
+	int nr_cpu_mappings;
+
+	/* failure simulation */
+	int fail_attach;
+	int fail_map;
+	int fail_mmap;
+
+	bool contiguous;
+	dma_addr_t contig_dma_addr;
+	void *contig_cpu_addr;
+};
+
+struct dma_buf_te_attachment {
+	struct sg_table *sg;
+	bool attachment_mapped;
+};
+
+static struct miscdevice te_device;
+
+#if (KERNEL_VERSION(4, 19, 0) > LINUX_VERSION_CODE)
+static int dma_buf_te_attach(struct dma_buf *buf, struct device *dev, struct dma_buf_attachment *attachment)
+#else
+static int dma_buf_te_attach(struct dma_buf *buf, struct dma_buf_attachment *attachment)
+#endif
+{
+	struct dma_buf_te_alloc	*alloc;
+
+	alloc = buf->priv;
+
+	if (alloc->fail_attach)
+		return -EFAULT;
+
+	attachment->priv = kzalloc(sizeof(struct dma_buf_te_attachment), GFP_KERNEL);
+	if (!attachment->priv)
+		return -ENOMEM;
+
+	/* dma_buf is externally locked during call */
+	alloc->nr_attached_devices++;
+	return 0;
+}
+
+/**
+ * dma_buf_te_detach - The detach callback function to release &attachment
+ *
+ * @buf: buffer for the &attachment
+ * @attachment: attachment data to be released
+ */
+static void dma_buf_te_detach(struct dma_buf *buf, struct dma_buf_attachment *attachment)
+{
+	struct dma_buf_te_alloc *alloc = buf->priv;
+	struct dma_buf_te_attachment *pa = attachment->priv;
+
+	/* dma_buf is externally locked during call */
+
+	WARN(pa->attachment_mapped, "WARNING: dma-buf-test-exporter detected detach with open device mappings");
+
+	alloc->nr_attached_devices--;
+
+	kfree(pa);
+}
+
+static struct sg_table *dma_buf_te_map(struct dma_buf_attachment *attachment, enum dma_data_direction direction)
+{
+	struct sg_table *sg;
+	struct scatterlist *iter;
+	struct dma_buf_te_alloc	*alloc;
+	struct dma_buf_te_attachment *pa = attachment->priv;
+	size_t i;
+	int ret;
+
+	alloc = attachment->dmabuf->priv;
+
+	if (alloc->fail_map)
+		return ERR_PTR(-ENOMEM);
+
+	if (WARN(pa->attachment_mapped,
+	    "WARNING: Attempted to map already mapped attachment."))
+		return ERR_PTR(-EBUSY);
+
+#ifdef NO_SG_CHAIN
+	/* if the ARCH can't chain we can't have allocs larger than a single sg can hold */
+	if (alloc->nr_pages > SG_MAX_SINGLE_ALLOC)
+		return ERR_PTR(-EINVAL);
+#endif /* NO_SG_CHAIN */
+
+	sg = kmalloc(sizeof(struct sg_table), GFP_KERNEL);
+	if (!sg)
+		return ERR_PTR(-ENOMEM);
+
+	/* from here we access the allocation object, so lock the dmabuf pointing to it */
+	mutex_lock(&attachment->dmabuf->lock);
+
+	if (alloc->contiguous)
+		ret = sg_alloc_table(sg, 1, GFP_KERNEL);
+	else
+		ret = sg_alloc_table(sg, alloc->nr_pages, GFP_KERNEL);
+	if (ret) {
+		mutex_unlock(&attachment->dmabuf->lock);
+		kfree(sg);
+		return ERR_PTR(ret);
+	}
+
+	if (alloc->contiguous) {
+		sg_dma_len(sg->sgl) = alloc->nr_pages * PAGE_SIZE;
+		sg_set_page(sg->sgl, pfn_to_page(PFN_DOWN(alloc->contig_dma_addr)), alloc->nr_pages * PAGE_SIZE, 0);
+		sg_dma_address(sg->sgl) = alloc->contig_dma_addr;
+	} else {
+		for_each_sg(sg->sgl, iter, alloc->nr_pages, i)
+			sg_set_page(iter, alloc->pages[i], PAGE_SIZE, 0);
+	}
+
+	if (!dma_map_sg(attachment->dev, sg->sgl, sg->nents, direction)) {
+		mutex_unlock(&attachment->dmabuf->lock);
+		sg_free_table(sg);
+		kfree(sg);
+		return ERR_PTR(-ENOMEM);
+	}
+
+	alloc->nr_device_mappings++;
+	pa->attachment_mapped = true;
+	pa->sg = sg;
+	mutex_unlock(&attachment->dmabuf->lock);
+	return sg;
+}
+
+static void dma_buf_te_unmap(struct dma_buf_attachment *attachment,
+							 struct sg_table *sg, enum dma_data_direction direction)
+{
+	struct dma_buf_te_alloc *alloc;
+	struct dma_buf_te_attachment *pa = attachment->priv;
+
+	alloc = attachment->dmabuf->priv;
+
+	mutex_lock(&attachment->dmabuf->lock);
+
+	WARN(!pa->attachment_mapped, "WARNING: Unmatched unmap of attachment.");
+
+	alloc->nr_device_mappings--;
+	pa->attachment_mapped = false;
+	pa->sg = NULL;
+	mutex_unlock(&attachment->dmabuf->lock);
+
+	dma_unmap_sg(attachment->dev, sg->sgl, sg->nents, direction);
+	sg_free_table(sg);
+	kfree(sg);
+}
+
+static void dma_buf_te_release(struct dma_buf *buf)
+{
+	size_t i;
+	struct dma_buf_te_alloc *alloc;
+
+	alloc = buf->priv;
+	/* no need for locking */
+
+	if (alloc->contiguous) {
+		dma_free_attrs(te_device.this_device,
+						alloc->nr_pages * PAGE_SIZE,
+						alloc->contig_cpu_addr,
+						alloc->contig_dma_addr,
+						DMA_ATTR_WRITE_COMBINE);
+	} else {
+		for (i = 0; i < alloc->nr_pages; i++)
+			__free_page(alloc->pages[i]);
+	}
+#if (KERNEL_VERSION(4, 12, 0) <= LINUX_VERSION_CODE)
+	kvfree(alloc->pages);
+#else
+	kfree(alloc->pages);
+#endif
+	kfree(alloc);
+}
+
+static int dma_buf_te_sync(struct dma_buf *dmabuf,
+			enum dma_data_direction direction,
+			bool start_cpu_access)
+{
+	struct dma_buf_attachment *attachment;
+
+	mutex_lock(&dmabuf->lock);
+
+	list_for_each_entry(attachment, &dmabuf->attachments, node) {
+		struct dma_buf_te_attachment *pa = attachment->priv;
+		struct sg_table *sg = pa->sg;
+
+		if (!sg) {
+			dev_dbg(te_device.this_device, "no mapping for device %s\n", dev_name(attachment->dev));
+			continue;
+		}
+
+		if (start_cpu_access) {
+			dev_dbg(te_device.this_device, "sync cpu with device %s\n", dev_name(attachment->dev));
+
+			dma_sync_sg_for_cpu(attachment->dev, sg->sgl, sg->nents, direction);
+		} else {
+			dev_dbg(te_device.this_device, "sync device %s with cpu\n", dev_name(attachment->dev));
+
+			dma_sync_sg_for_device(attachment->dev, sg->sgl, sg->nents, direction);
+		}
+	}
+
+	mutex_unlock(&dmabuf->lock);
+	return 0;
+}
+
+static int dma_buf_te_begin_cpu_access(struct dma_buf *dmabuf,
+					enum dma_data_direction direction)
+{
+	return dma_buf_te_sync(dmabuf, direction, true);
+}
+
+static int dma_buf_te_end_cpu_access(struct dma_buf *dmabuf,
+				enum dma_data_direction direction)
+{
+	return dma_buf_te_sync(dmabuf, direction, false);
+}
+
+static void dma_buf_te_mmap_open(struct vm_area_struct *vma)
+{
+	struct dma_buf *dma_buf;
+	struct dma_buf_te_alloc *alloc;
+
+	dma_buf = vma->vm_private_data;
+	alloc = dma_buf->priv;
+
+	mutex_lock(&dma_buf->lock);
+	alloc->nr_cpu_mappings++;
+	mutex_unlock(&dma_buf->lock);
+}
+
+static void dma_buf_te_mmap_close(struct vm_area_struct *vma)
+{
+	struct dma_buf *dma_buf;
+	struct dma_buf_te_alloc *alloc;
+
+	dma_buf = vma->vm_private_data;
+	alloc = dma_buf->priv;
+
+	BUG_ON(alloc->nr_cpu_mappings <= 0);
+	mutex_lock(&dma_buf->lock);
+	alloc->nr_cpu_mappings--;
+	mutex_unlock(&dma_buf->lock);
+}
+
+#if KERNEL_VERSION(4, 11, 0) > LINUX_VERSION_CODE
+static int dma_buf_te_mmap_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
+#elif KERNEL_VERSION(5, 1, 0) > LINUX_VERSION_CODE
+static int dma_buf_te_mmap_fault(struct vm_fault *vmf)
+#else
+static vm_fault_t dma_buf_te_mmap_fault(struct vm_fault *vmf)
+#endif
+{
+	struct dma_buf_te_alloc *alloc;
+	struct dma_buf *dmabuf;
+	struct page *pageptr;
+
+#if KERNEL_VERSION(4, 11, 0) > LINUX_VERSION_CODE
+	dmabuf = vma->vm_private_data;
+#else
+	dmabuf = vmf->vma->vm_private_data;
+#endif
+	alloc = dmabuf->priv;
+
+	if (vmf->pgoff > alloc->nr_pages)
+		return VM_FAULT_SIGBUS;
+
+	pageptr = alloc->pages[vmf->pgoff];
+
+	BUG_ON(!pageptr);
+
+	get_page(pageptr);
+	vmf->page = pageptr;
+
+	return 0;
+}
+
+static const struct vm_operations_struct dma_buf_te_vm_ops = {
+	.open = dma_buf_te_mmap_open,
+	.close = dma_buf_te_mmap_close,
+	.fault = dma_buf_te_mmap_fault
+};
+
+static int dma_buf_te_mmap(struct dma_buf *dmabuf, struct vm_area_struct *vma)
+{
+	struct dma_buf_te_alloc *alloc;
+
+	alloc = dmabuf->priv;
+
+	if (alloc->fail_mmap)
+		return -ENOMEM;
+
+	vma->vm_flags |= VM_IO | VM_DONTEXPAND | VM_DONTDUMP;
+	vma->vm_ops = &dma_buf_te_vm_ops;
+	vma->vm_private_data = dmabuf;
+
+	/*  we fault in the pages on access */
+
+	/* call open to do the ref-counting */
+	dma_buf_te_vm_ops.open(vma);
+
+	return 0;
+}
+
+#if KERNEL_VERSION(4, 19, 0) > LINUX_VERSION_CODE
+static void *dma_buf_te_kmap_atomic(struct dma_buf *buf, unsigned long page_num)
+{
+	/* IGNORE */
+	return NULL;
+}
+#endif
+
+static void *dma_buf_te_kmap(struct dma_buf *buf, unsigned long page_num)
+{
+	struct dma_buf_te_alloc *alloc;
+
+	alloc = buf->priv;
+	if (page_num >= alloc->nr_pages)
+		return NULL;
+
+	return kmap(alloc->pages[page_num]);
+}
+static void dma_buf_te_kunmap(struct dma_buf *buf,
+		unsigned long page_num, void *addr)
+{
+	struct dma_buf_te_alloc *alloc;
+
+	alloc = buf->priv;
+	if (page_num >= alloc->nr_pages)
+		return;
+
+	kunmap(alloc->pages[page_num]);
+}
+
+static struct dma_buf_ops dma_buf_te_ops = {
+	/* real handlers */
+	.attach = dma_buf_te_attach,
+	.detach = dma_buf_te_detach,
+	.map_dma_buf = dma_buf_te_map,
+	.unmap_dma_buf = dma_buf_te_unmap,
+	.release = dma_buf_te_release,
+	.mmap = dma_buf_te_mmap,
+	.begin_cpu_access = dma_buf_te_begin_cpu_access,
+	.end_cpu_access = dma_buf_te_end_cpu_access,
+#if KERNEL_VERSION(4, 12, 0) > LINUX_VERSION_CODE
+	.kmap = dma_buf_te_kmap,
+	.kunmap = dma_buf_te_kunmap,
+
+	/* nop handlers for mandatory functions we ignore */
+	.kmap_atomic = dma_buf_te_kmap_atomic
+#else
+#if KERNEL_VERSION(5, 6, 0) > LINUX_VERSION_CODE
+	.map = dma_buf_te_kmap,
+	.unmap = dma_buf_te_kunmap,
+#endif
+
+#if KERNEL_VERSION(4, 19, 0) > LINUX_VERSION_CODE
+	/* nop handlers for mandatory functions we ignore */
+	.map_atomic = dma_buf_te_kmap_atomic
+#endif
+#endif
+};
+
+static int do_dma_buf_te_ioctl_version(struct dma_buf_te_ioctl_version __user *buf)
+{
+	struct dma_buf_te_ioctl_version v;
+
+	if (copy_from_user(&v, buf, sizeof(v)))
+		return -EFAULT;
+
+	if (v.op != DMA_BUF_TE_ENQ)
+		return -EFAULT;
+
+	v.op = DMA_BUF_TE_ACK;
+	v.major = DMA_BUF_TE_VER_MAJOR;
+	v.minor = DMA_BUF_TE_VER_MINOR;
+
+	if (copy_to_user(buf, &v, sizeof(v)))
+		return -EFAULT;
+	else
+		return 0;
+}
+
+static int do_dma_buf_te_ioctl_alloc(struct dma_buf_te_ioctl_alloc __user *buf, bool contiguous)
+{
+	struct dma_buf_te_ioctl_alloc alloc_req;
+	struct dma_buf_te_alloc *alloc;
+	struct dma_buf *dma_buf;
+	size_t i = 0;
+	size_t max_nr_pages = DMA_BUF_TE_ALLOC_MAX_SIZE;
+	int fd;
+
+	if (copy_from_user(&alloc_req, buf, sizeof(alloc_req))) {
+		dev_err(te_device.this_device, "%s: couldn't get user data", __func__);
+		goto no_input;
+	}
+
+	if (!alloc_req.size) {
+		dev_err(te_device.this_device, "%s: no size specified", __func__);
+		goto invalid_size;
+	}
+
+#ifdef NO_SG_CHAIN
+	/* Whilst it is possible to allocate larger buffer, we won't be able to
+	 * map it during actual usage (mmap() still succeeds). We fail here so
+	 * userspace code can deal with it early than having driver failure
+	 * later on.
+	 */
+	if (max_nr_pages > SG_MAX_SINGLE_ALLOC)
+		max_nr_pages = SG_MAX_SINGLE_ALLOC;
+#endif /* NO_SG_CHAIN */
+
+	if (alloc_req.size > max_nr_pages) {
+		dev_err(te_device.this_device, "%s: buffer size of %llu pages exceeded the mapping limit of %zu pages",
+				__func__, alloc_req.size, max_nr_pages);
+		goto invalid_size;
+	}
+
+	alloc = kzalloc(sizeof(struct dma_buf_te_alloc), GFP_KERNEL);
+	if (alloc == NULL) {
+		dev_err(te_device.this_device, "%s: couldn't alloc object", __func__);
+		goto no_alloc_object;
+	}
+
+	alloc->nr_pages = alloc_req.size;
+	alloc->contiguous = contiguous;
+
+#if (KERNEL_VERSION(4, 12, 0) <= LINUX_VERSION_CODE)
+	alloc->pages = kvzalloc(sizeof(struct page *) * alloc->nr_pages, GFP_KERNEL);
+#else
+	alloc->pages = kzalloc(sizeof(struct page *) * alloc->nr_pages, GFP_KERNEL);
+#endif
+
+	if (!alloc->pages) {
+		dev_err(te_device.this_device,
+				"%s: couldn't alloc %zu page structures",
+				__func__, alloc->nr_pages);
+		goto free_alloc_object;
+	}
+
+	if (contiguous) {
+		dma_addr_t dma_aux;
+
+		alloc->contig_cpu_addr = dma_alloc_attrs(te_device.this_device,
+				alloc->nr_pages * PAGE_SIZE,
+				&alloc->contig_dma_addr,
+				GFP_KERNEL | __GFP_ZERO,
+				DMA_ATTR_WRITE_COMBINE);
+		if (!alloc->contig_cpu_addr) {
+			dev_err(te_device.this_device, "%s: couldn't alloc contiguous buffer %zu pages",
+				__func__, alloc->nr_pages);
+			goto free_page_struct;
+		}
+		dma_aux = alloc->contig_dma_addr;
+		for (i = 0; i < alloc->nr_pages; i++) {
+			alloc->pages[i] = pfn_to_page(PFN_DOWN(dma_aux));
+			dma_aux += PAGE_SIZE;
+		}
+	} else {
+		for (i = 0; i < alloc->nr_pages; i++) {
+			alloc->pages[i] = alloc_page(GFP_KERNEL | __GFP_ZERO);
+			if (alloc->pages[i] == NULL) {
+				dev_err(te_device.this_device, "%s: couldn't alloc page", __func__);
+				goto no_page;
+			}
+		}
+	}
+
+	/* alloc ready, let's export it */
+	{
+		struct dma_buf_export_info export_info = {
+			.exp_name = "dma_buf_te",
+			.owner = THIS_MODULE,
+			.ops = &dma_buf_te_ops,
+			.size = alloc->nr_pages << PAGE_SHIFT,
+			.flags = O_CLOEXEC | O_RDWR,
+			.priv = alloc,
+		};
+
+		dma_buf = dma_buf_export(&export_info);
+	}
+
+	if (IS_ERR_OR_NULL(dma_buf)) {
+		dev_err(te_device.this_device, "%s: couldn't export dma_buf", __func__);
+		goto no_export;
+	}
+
+	/* get fd for buf */
+	fd = dma_buf_fd(dma_buf, O_CLOEXEC);
+
+	if (fd < 0) {
+		dev_err(te_device.this_device, "%s: couldn't get fd from dma_buf", __func__);
+		goto no_fd;
+	}
+
+	return fd;
+
+no_fd:
+	dma_buf_put(dma_buf);
+no_export:
+	/* i still valid */
+no_page:
+	if (contiguous) {
+		dma_free_attrs(te_device.this_device,
+						alloc->nr_pages * PAGE_SIZE,
+						alloc->contig_cpu_addr,
+						alloc->contig_dma_addr,
+						DMA_ATTR_WRITE_COMBINE);
+	} else {
+		while (i-- > 0)
+			__free_page(alloc->pages[i]);
+	}
+free_page_struct:
+#if (KERNEL_VERSION(4, 12, 0) <= LINUX_VERSION_CODE)
+	kvfree(alloc->pages);
+#else
+	kfree(alloc->pages);
+#endif
+free_alloc_object:
+	kfree(alloc);
+no_alloc_object:
+invalid_size:
+no_input:
+	return -EFAULT;
+}
+
+static int do_dma_buf_te_ioctl_status(struct dma_buf_te_ioctl_status __user *arg)
+{
+	struct dma_buf_te_ioctl_status status;
+	struct dma_buf *dmabuf;
+	struct dma_buf_te_alloc *alloc;
+	int res = -EINVAL;
+
+	if (copy_from_user(&status, arg, sizeof(status)))
+		return -EFAULT;
+
+	dmabuf = dma_buf_get(status.fd);
+	if (IS_ERR_OR_NULL(dmabuf))
+		return -EINVAL;
+
+	/* verify it's one of ours */
+	if (dmabuf->ops != &dma_buf_te_ops)
+		goto err_have_dmabuf;
+
+	/* ours, get the current status */
+	alloc = dmabuf->priv;
+
+	/* lock while reading status to take a snapshot */
+	mutex_lock(&dmabuf->lock);
+	status.attached_devices = alloc->nr_attached_devices;
+	status.device_mappings = alloc->nr_device_mappings;
+	status.cpu_mappings = alloc->nr_cpu_mappings;
+	mutex_unlock(&dmabuf->lock);
+
+	if (copy_to_user(arg, &status, sizeof(status)))
+		goto err_have_dmabuf;
+
+	/* All OK */
+	res = 0;
+
+err_have_dmabuf:
+	dma_buf_put(dmabuf);
+	return res;
+}
+
+static int do_dma_buf_te_ioctl_set_failing(struct dma_buf_te_ioctl_set_failing __user *arg)
+{
+	struct dma_buf *dmabuf;
+	struct dma_buf_te_ioctl_set_failing f;
+	struct dma_buf_te_alloc *alloc;
+	int res = -EINVAL;
+
+	if (copy_from_user(&f, arg, sizeof(f)))
+		return -EFAULT;
+
+	dmabuf = dma_buf_get(f.fd);
+	if (IS_ERR_OR_NULL(dmabuf))
+		return -EINVAL;
+
+	/* verify it's one of ours */
+	if (dmabuf->ops != &dma_buf_te_ops)
+		goto err_have_dmabuf;
+
+	/* ours, set the fail modes */
+	alloc = dmabuf->priv;
+	/* lock to set the fail modes atomically */
+	mutex_lock(&dmabuf->lock);
+	alloc->fail_attach = f.fail_attach;
+	alloc->fail_map    = f.fail_map;
+	alloc->fail_mmap   = f.fail_mmap;
+	mutex_unlock(&dmabuf->lock);
+
+	/* success */
+	res = 0;
+
+err_have_dmabuf:
+	dma_buf_put(dmabuf);
+	return res;
+}
+
+static u32 dma_te_buf_fill(struct dma_buf *dma_buf, unsigned int value)
+{
+	struct dma_buf_attachment *attachment;
+	struct sg_table *sgt;
+	struct scatterlist *sg;
+	unsigned int count;
+	int ret = 0;
+	size_t i;
+
+	attachment = dma_buf_attach(dma_buf, te_device.this_device);
+	if (IS_ERR_OR_NULL(attachment))
+		return -EBUSY;
+
+	sgt = dma_buf_map_attachment(attachment, DMA_BIDIRECTIONAL);
+	if (IS_ERR_OR_NULL(sgt)) {
+		ret = PTR_ERR(sgt);
+		goto no_import;
+	}
+
+	ret = dma_buf_begin_cpu_access(dma_buf, DMA_BIDIRECTIONAL);
+	if (ret)
+		goto no_cpu_access;
+
+	for_each_sg(sgt->sgl, sg, sgt->nents, count) {
+		for (i = 0; i < sg_dma_len(sg); i = i + PAGE_SIZE) {
+			void *addr = NULL;
+#if KERNEL_VERSION(5, 6, 0) <= LINUX_VERSION_CODE
+			addr = dma_buf_te_kmap(dma_buf, i >> PAGE_SHIFT);
+#else
+			addr = dma_buf_kmap(dma_buf, i >> PAGE_SHIFT);
+#endif
+			if (!addr) {
+				ret = -EPERM;
+				goto no_kmap;
+			}
+			memset(addr, value, PAGE_SIZE);
+#if KERNEL_VERSION(5, 6, 0) <= LINUX_VERSION_CODE
+			dma_buf_te_kunmap(dma_buf, i >> PAGE_SHIFT, addr);
+#else
+			dma_buf_kunmap(dma_buf, i >> PAGE_SHIFT, addr);
+#endif
+		}
+	}
+
+no_kmap:
+	dma_buf_end_cpu_access(dma_buf, DMA_BIDIRECTIONAL);
+no_cpu_access:
+	dma_buf_unmap_attachment(attachment, sgt, DMA_BIDIRECTIONAL);
+no_import:
+	dma_buf_detach(dma_buf, attachment);
+	return ret;
+}
+
+static int do_dma_buf_te_ioctl_fill(struct dma_buf_te_ioctl_fill __user *arg)
+{
+
+	struct dma_buf *dmabuf;
+	struct dma_buf_te_ioctl_fill f;
+	int ret;
+
+	if (copy_from_user(&f, arg, sizeof(f)))
+		return -EFAULT;
+
+	dmabuf = dma_buf_get(f.fd);
+	if (IS_ERR_OR_NULL(dmabuf))
+		return -EINVAL;
+
+	ret = dma_te_buf_fill(dmabuf, f.value);
+	dma_buf_put(dmabuf);
+
+	return ret;
+}
+
+static long dma_buf_te_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
+{
+	switch (cmd) {
+	case DMA_BUF_TE_VERSION:
+		return do_dma_buf_te_ioctl_version((struct dma_buf_te_ioctl_version __user *)arg);
+	case DMA_BUF_TE_ALLOC:
+		return do_dma_buf_te_ioctl_alloc((struct dma_buf_te_ioctl_alloc __user *)arg, false);
+	case DMA_BUF_TE_ALLOC_CONT:
+		return do_dma_buf_te_ioctl_alloc((struct dma_buf_te_ioctl_alloc __user *)arg, true);
+	case DMA_BUF_TE_QUERY:
+		return do_dma_buf_te_ioctl_status((struct dma_buf_te_ioctl_status __user *)arg);
+	case DMA_BUF_TE_SET_FAILING:
+		return do_dma_buf_te_ioctl_set_failing((struct dma_buf_te_ioctl_set_failing __user *)arg);
+	case DMA_BUF_TE_FILL:
+		return do_dma_buf_te_ioctl_fill((struct dma_buf_te_ioctl_fill __user *)arg);
+	default:
+		return -ENOTTY;
+	}
+}
+
+static const struct file_operations dma_buf_te_fops = {
+	.owner = THIS_MODULE,
+	.unlocked_ioctl = dma_buf_te_ioctl,
+	.compat_ioctl = dma_buf_te_ioctl,
+};
+
+static int __init dma_buf_te_init(void)
+{
+	int res;
+
+	te_device.minor = MISC_DYNAMIC_MINOR;
+	te_device.name = "dma_buf_te";
+	te_device.fops = &dma_buf_te_fops;
+
+	res = misc_register(&te_device);
+	if (res) {
+		pr_warn("Misc device registration failed of 'dma_buf_te'\n");
+		return res;
+	}
+	te_device.this_device->coherent_dma_mask = DMA_BIT_MASK(32);
+
+	dev_info(te_device.this_device, "dma_buf_te ready\n");
+	return 0;
+
+}
+
+static void __exit dma_buf_te_exit(void)
+{
+	misc_deregister(&te_device);
+}
+
+module_init(dma_buf_te_init);
+module_exit(dma_buf_te_exit);
+MODULE_LICENSE("GPL");
+MODULE_INFO(import_ns, "DMA_BUF");

diff --git a/dvalin/kernel/drivers/base/arm/memory_group_manager/Kbuild b/bifrost/r38p2/kernel/drivers/base/arm/memory_group_manager/Kbuild
similarity index 100%
copy from dvalin/kernel/drivers/base/arm/memory_group_manager/Kbuild
copy to bifrost/r38p2/kernel/drivers/base/arm/memory_group_manager/Kbuild


diff --git a/dvalin/kernel/drivers/base/arm/memory_group_manager/build.bp b/bifrost/r38p2/kernel/drivers/base/arm/memory_group_manager/build.bp
similarity index 100%
copy from dvalin/kernel/drivers/base/arm/memory_group_manager/build.bp
copy to bifrost/r38p2/kernel/drivers/base/arm/memory_group_manager/build.bp


diff --git a/bifrost/r38p2/kernel/drivers/base/arm/memory_group_manager/memory_group_manager.c b/bifrost/r38p2/kernel/drivers/base/arm/memory_group_manager/memory_group_manager.c
new file mode 100644
index 0000000..fa64eb1
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/base/arm/memory_group_manager/memory_group_manager.c

@@ -0,0 +1,492 @@
+// SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
+/*
+ *
+ * (C) COPYRIGHT 2019-2022 ARM Limited. All rights reserved.
+ *
+ * This program is free software and is provided to you under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation, and any use by you of this program is subject to the terms
+ * of such GNU license.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, you can access it online at
+ * http://www.gnu.org/licenses/gpl-2.0.html.
+ *
+ */
+
+#include <linux/fs.h>
+#include <linux/of.h>
+#include <linux/slab.h>
+#include <linux/platform_device.h>
+#include <linux/version.h>
+#include <linux/module.h>
+#if IS_ENABLED(CONFIG_DEBUG_FS)
+#include <linux/debugfs.h>
+#include <linux/version_compat_defs.h>
+#endif
+#include <linux/mm.h>
+#include <linux/memory_group_manager.h>
+
+#if (KERNEL_VERSION(4, 20, 0) > LINUX_VERSION_CODE)
+static inline vm_fault_t vmf_insert_pfn_prot(struct vm_area_struct *vma,
+			unsigned long addr, unsigned long pfn, pgprot_t pgprot)
+{
+	int err = vm_insert_pfn_prot(vma, addr, pfn, pgprot);
+
+	if (unlikely(err == -ENOMEM))
+		return VM_FAULT_OOM;
+	if (unlikely(err < 0 && err != -EBUSY))
+		return VM_FAULT_SIGBUS;
+
+	return VM_FAULT_NOPAGE;
+}
+#endif
+
+#define PTE_PBHA_SHIFT (59)
+#define PTE_PBHA_MASK ((uint64_t)0xf << PTE_PBHA_SHIFT)
+#define PTE_RES_BIT_MULTI_AS_SHIFT (63)
+
+#define IMPORTED_MEMORY_ID (MEMORY_GROUP_MANAGER_NR_GROUPS - 1)
+
+/**
+ * struct mgm_group - Structure to keep track of the number of allocated
+ *                    pages per group
+ *
+ * @size:  The number of allocated small(4KB) pages
+ * @lp_size:  The number of allocated large(2MB) pages
+ * @insert_pfn: The number of calls to map pages for CPU access.
+ * @update_gpu_pte: The number of calls to update GPU page table entries.
+ *
+ * This structure allows page allocation information to be displayed via
+ * debugfs. Display is organized per group with small and large sized pages.
+ */
+struct mgm_group {
+	size_t size;
+	size_t lp_size;
+	size_t insert_pfn;
+	size_t update_gpu_pte;
+};
+
+/**
+ * struct mgm_groups - Structure for groups of memory group manager
+ *
+ * @groups: To keep track of the number of allocated pages of all groups
+ * @dev: device attached
+ * @mgm_debugfs_root: debugfs root directory of memory group manager
+ *
+ * This structure allows page allocation information to be displayed via
+ * debugfs. Display is organized per group with small and large sized pages.
+ */
+struct mgm_groups {
+	struct mgm_group groups[MEMORY_GROUP_MANAGER_NR_GROUPS];
+	struct device *dev;
+#if IS_ENABLED(CONFIG_DEBUG_FS)
+	struct dentry *mgm_debugfs_root;
+#endif
+};
+
+#if IS_ENABLED(CONFIG_DEBUG_FS)
+
+static int mgm_size_get(void *data, u64 *val)
+{
+	struct mgm_group *group = data;
+
+	*val = group->size;
+
+	return 0;
+}
+
+static int mgm_lp_size_get(void *data, u64 *val)
+{
+	struct mgm_group *group = data;
+
+	*val = group->lp_size;
+
+	return 0;
+}
+
+static int mgm_insert_pfn_get(void *data, u64 *val)
+{
+	struct mgm_group *group = data;
+
+	*val = group->insert_pfn;
+
+	return 0;
+}
+
+static int mgm_update_gpu_pte_get(void *data, u64 *val)
+{
+	struct mgm_group *group = data;
+
+	*val = group->update_gpu_pte;
+
+	return 0;
+}
+
+DEFINE_DEBUGFS_ATTRIBUTE(fops_mgm_size, mgm_size_get, NULL, "%llu\n");
+DEFINE_DEBUGFS_ATTRIBUTE(fops_mgm_lp_size, mgm_lp_size_get, NULL, "%llu\n");
+DEFINE_DEBUGFS_ATTRIBUTE(fops_mgm_insert_pfn, mgm_insert_pfn_get, NULL, "%llu\n");
+DEFINE_DEBUGFS_ATTRIBUTE(fops_mgm_update_gpu_pte, mgm_update_gpu_pte_get, NULL, "%llu\n");
+
+static void mgm_term_debugfs(struct mgm_groups *data)
+{
+	debugfs_remove_recursive(data->mgm_debugfs_root);
+}
+
+#define MGM_DEBUGFS_GROUP_NAME_MAX 10
+static int mgm_initialize_debugfs(struct mgm_groups *mgm_data)
+{
+	int i;
+	struct dentry *e, *g;
+	char debugfs_group_name[MGM_DEBUGFS_GROUP_NAME_MAX];
+
+	/*
+	 * Create root directory of memory-group-manager
+	 */
+	mgm_data->mgm_debugfs_root =
+		debugfs_create_dir("physical-memory-group-manager", NULL);
+	if (IS_ERR_OR_NULL(mgm_data->mgm_debugfs_root)) {
+		dev_err(mgm_data->dev, "fail to create debugfs root directory\n");
+		return -ENODEV;
+	}
+
+	/*
+	 * Create debugfs files per group
+	 */
+	for (i = 0; i < MEMORY_GROUP_MANAGER_NR_GROUPS; i++) {
+		scnprintf(debugfs_group_name, MGM_DEBUGFS_GROUP_NAME_MAX,
+				"group_%d", i);
+		g = debugfs_create_dir(debugfs_group_name,
+				mgm_data->mgm_debugfs_root);
+		if (IS_ERR_OR_NULL(g)) {
+			dev_err(mgm_data->dev, "fail to create group[%d]\n", i);
+			goto remove_debugfs;
+		}
+
+		e = debugfs_create_file("size", 0444, g, &mgm_data->groups[i],
+				&fops_mgm_size);
+		if (IS_ERR_OR_NULL(e)) {
+			dev_err(mgm_data->dev, "fail to create size[%d]\n", i);
+			goto remove_debugfs;
+		}
+
+		e = debugfs_create_file("lp_size", 0444, g,
+				&mgm_data->groups[i], &fops_mgm_lp_size);
+		if (IS_ERR_OR_NULL(e)) {
+			dev_err(mgm_data->dev,
+				"fail to create lp_size[%d]\n", i);
+			goto remove_debugfs;
+		}
+
+		e = debugfs_create_file("insert_pfn", 0444, g,
+				&mgm_data->groups[i], &fops_mgm_insert_pfn);
+		if (IS_ERR_OR_NULL(e)) {
+			dev_err(mgm_data->dev,
+				"fail to create insert_pfn[%d]\n", i);
+			goto remove_debugfs;
+		}
+
+		e = debugfs_create_file("update_gpu_pte", 0444, g,
+				&mgm_data->groups[i], &fops_mgm_update_gpu_pte);
+		if (IS_ERR_OR_NULL(e)) {
+			dev_err(mgm_data->dev,
+				"fail to create update_gpu_pte[%d]\n", i);
+			goto remove_debugfs;
+		}
+	}
+
+	return 0;
+
+remove_debugfs:
+	mgm_term_debugfs(mgm_data);
+	return -ENODEV;
+}
+
+#else
+
+static void mgm_term_debugfs(struct mgm_groups *data)
+{
+}
+
+static int mgm_initialize_debugfs(struct mgm_groups *mgm_data)
+{
+	return 0;
+}
+
+#endif /* CONFIG_DEBUG_FS */
+
+#define ORDER_SMALL_PAGE 0
+#define ORDER_LARGE_PAGE 9
+static void update_size(struct memory_group_manager_device *mgm_dev, int
+		group_id, int order, bool alloc)
+{
+	struct mgm_groups *data = mgm_dev->data;
+
+	switch (order) {
+	case ORDER_SMALL_PAGE:
+		if (alloc)
+			data->groups[group_id].size++;
+		else {
+			WARN_ON(data->groups[group_id].size == 0);
+			data->groups[group_id].size--;
+		}
+	break;
+
+	case ORDER_LARGE_PAGE:
+		if (alloc)
+			data->groups[group_id].lp_size++;
+		else {
+			WARN_ON(data->groups[group_id].lp_size == 0);
+			data->groups[group_id].lp_size--;
+		}
+	break;
+
+	default:
+		dev_err(data->dev, "Unknown order(%d)\n", order);
+	break;
+	}
+}
+
+static struct page *example_mgm_alloc_page(
+	struct memory_group_manager_device *mgm_dev, int group_id,
+	gfp_t gfp_mask, unsigned int order)
+{
+	struct mgm_groups *const data = mgm_dev->data;
+	struct page *p;
+
+	dev_dbg(data->dev, "%s(mgm_dev=%pK, group_id=%d gfp_mask=0x%x order=%u\n", __func__,
+		(void *)mgm_dev, group_id, gfp_mask, order);
+
+	if (WARN_ON(group_id < 0) ||
+		WARN_ON(group_id >= MEMORY_GROUP_MANAGER_NR_GROUPS))
+		return NULL;
+
+	p = alloc_pages(gfp_mask, order);
+
+	if (p) {
+		update_size(mgm_dev, group_id, order, true);
+	} else {
+		struct mgm_groups *data = mgm_dev->data;
+
+		dev_err(data->dev, "alloc_pages failed\n");
+	}
+
+	return p;
+}
+
+static void example_mgm_free_page(
+	struct memory_group_manager_device *mgm_dev, int group_id,
+	struct page *page, unsigned int order)
+{
+	struct mgm_groups *const data = mgm_dev->data;
+
+	dev_dbg(data->dev, "%s(mgm_dev=%pK, group_id=%d page=%pK order=%u\n", __func__,
+		(void *)mgm_dev, group_id, (void *)page, order);
+
+	if (WARN_ON(group_id < 0) ||
+		WARN_ON(group_id >= MEMORY_GROUP_MANAGER_NR_GROUPS))
+		return;
+
+	__free_pages(page, order);
+
+	update_size(mgm_dev, group_id, order, false);
+}
+
+static int example_mgm_get_import_memory_id(
+	struct memory_group_manager_device *mgm_dev,
+	struct memory_group_manager_import_data *import_data)
+{
+	struct mgm_groups *const data = mgm_dev->data;
+
+	dev_dbg(data->dev, "%s(mgm_dev=%pK, import_data=%pK (type=%d)\n", __func__, (void *)mgm_dev,
+		(void *)import_data, (int)import_data->type);
+
+	if (!WARN_ON(!import_data)) {
+		WARN_ON(!import_data->u.dma_buf);
+
+		WARN_ON(import_data->type !=
+				MEMORY_GROUP_MANAGER_IMPORT_TYPE_DMA_BUF);
+	}
+
+	return IMPORTED_MEMORY_ID;
+}
+
+static u64 example_mgm_update_gpu_pte(
+	struct memory_group_manager_device *const mgm_dev, int const group_id,
+	int const mmu_level, u64 pte)
+{
+	struct mgm_groups *const data = mgm_dev->data;
+
+	dev_dbg(data->dev, "%s(mgm_dev=%pK, group_id=%d, mmu_level=%d, pte=0x%llx)\n", __func__,
+		(void *)mgm_dev, group_id, mmu_level, pte);
+
+	if (WARN_ON(group_id < 0) ||
+		WARN_ON(group_id >= MEMORY_GROUP_MANAGER_NR_GROUPS))
+		return pte;
+
+	pte |= ((u64)group_id << PTE_PBHA_SHIFT) & PTE_PBHA_MASK;
+
+	/* Address could be translated into a different bus address here */
+	pte |= ((u64)1 << PTE_RES_BIT_MULTI_AS_SHIFT);
+
+	data->groups[group_id].update_gpu_pte++;
+
+	return pte;
+}
+
+static u64 example_mgm_pte_to_original_pte(struct memory_group_manager_device *const mgm_dev,
+					   int const group_id, int const mmu_level, u64 pte)
+{
+	/* Undo the group ID modification */
+	pte &= ~PTE_PBHA_MASK;
+	/* Undo the bit set */
+	pte &= ~((u64)1 << PTE_RES_BIT_MULTI_AS_SHIFT);
+
+	return pte;
+}
+
+static vm_fault_t example_mgm_vmf_insert_pfn_prot(
+	struct memory_group_manager_device *const mgm_dev, int const group_id,
+	struct vm_area_struct *const vma, unsigned long const addr,
+	unsigned long const pfn, pgprot_t const prot)
+{
+	struct mgm_groups *const data = mgm_dev->data;
+	vm_fault_t fault;
+
+	dev_dbg(data->dev,
+		"%s(mgm_dev=%pK, group_id=%d, vma=%pK, addr=0x%lx, pfn=0x%lx, prot=0x%llx)\n",
+		__func__, (void *)mgm_dev, group_id, (void *)vma, addr, pfn,
+		(unsigned long long)pgprot_val(prot));
+
+	if (WARN_ON(group_id < 0) ||
+		WARN_ON(group_id >= MEMORY_GROUP_MANAGER_NR_GROUPS))
+		return VM_FAULT_SIGBUS;
+
+	fault = vmf_insert_pfn_prot(vma, addr, pfn, prot);
+
+	if (fault == VM_FAULT_NOPAGE)
+		data->groups[group_id].insert_pfn++;
+	else
+		dev_err(data->dev, "vmf_insert_pfn_prot failed\n");
+
+	return fault;
+}
+
+static int mgm_initialize_data(struct mgm_groups *mgm_data)
+{
+	int i;
+
+	for (i = 0; i < MEMORY_GROUP_MANAGER_NR_GROUPS; i++) {
+		mgm_data->groups[i].size = 0;
+		mgm_data->groups[i].lp_size = 0;
+		mgm_data->groups[i].insert_pfn = 0;
+		mgm_data->groups[i].update_gpu_pte = 0;
+	}
+
+	return mgm_initialize_debugfs(mgm_data);
+}
+
+static void mgm_term_data(struct mgm_groups *data)
+{
+	int i;
+
+	for (i = 0; i < MEMORY_GROUP_MANAGER_NR_GROUPS; i++) {
+		if (data->groups[i].size != 0)
+			dev_warn(data->dev,
+				"%zu 0-order pages in group(%d) leaked\n",
+				data->groups[i].size, i);
+		if (data->groups[i].lp_size != 0)
+			dev_warn(data->dev,
+				"%zu 9 order pages in group(%d) leaked\n",
+				data->groups[i].lp_size, i);
+	}
+
+	mgm_term_debugfs(data);
+}
+
+static int memory_group_manager_probe(struct platform_device *pdev)
+{
+	struct memory_group_manager_device *mgm_dev;
+	struct mgm_groups *mgm_data;
+
+	mgm_dev = kzalloc(sizeof(*mgm_dev), GFP_KERNEL);
+	if (!mgm_dev)
+		return -ENOMEM;
+
+	mgm_dev->owner = THIS_MODULE;
+	mgm_dev->ops.mgm_alloc_page = example_mgm_alloc_page;
+	mgm_dev->ops.mgm_free_page = example_mgm_free_page;
+	mgm_dev->ops.mgm_get_import_memory_id =
+			example_mgm_get_import_memory_id;
+	mgm_dev->ops.mgm_vmf_insert_pfn_prot = example_mgm_vmf_insert_pfn_prot;
+	mgm_dev->ops.mgm_update_gpu_pte = example_mgm_update_gpu_pte;
+	mgm_dev->ops.mgm_pte_to_original_pte = example_mgm_pte_to_original_pte;
+
+	mgm_data = kzalloc(sizeof(*mgm_data), GFP_KERNEL);
+	if (!mgm_data) {
+		kfree(mgm_dev);
+		return -ENOMEM;
+	}
+
+	mgm_dev->data = mgm_data;
+	mgm_data->dev = &pdev->dev;
+
+	if (mgm_initialize_data(mgm_data)) {
+		kfree(mgm_data);
+		kfree(mgm_dev);
+		return -ENOENT;
+	}
+
+	platform_set_drvdata(pdev, mgm_dev);
+	dev_info(&pdev->dev, "Memory group manager probed successfully\n");
+
+	return 0;
+}
+
+static int memory_group_manager_remove(struct platform_device *pdev)
+{
+	struct memory_group_manager_device *mgm_dev =
+		platform_get_drvdata(pdev);
+	struct mgm_groups *mgm_data = mgm_dev->data;
+
+	mgm_term_data(mgm_data);
+	kfree(mgm_data);
+
+	kfree(mgm_dev);
+
+	dev_info(&pdev->dev, "Memory group manager removed successfully\n");
+
+	return 0;
+}
+
+static const struct of_device_id memory_group_manager_dt_ids[] = {
+	{ .compatible = "arm,physical-memory-group-manager" },
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, memory_group_manager_dt_ids);
+
+static struct platform_driver memory_group_manager_driver = {
+	.probe = memory_group_manager_probe,
+	.remove = memory_group_manager_remove,
+	.driver = {
+		.name = "physical-memory-group-manager",
+		.of_match_table = of_match_ptr(memory_group_manager_dt_ids),
+		/*
+		 * Prevent the mgm_dev from being unbound and freed, as other's
+		 * may have pointers to it and would get confused, or crash, if
+		 * it suddenly disappear.
+		 */
+		.suppress_bind_attrs = true,
+	}
+};
+
+module_platform_driver(memory_group_manager_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("ARM Ltd.");
+MODULE_VERSION("1.0");

diff --git a/dvalin/kernel/drivers/base/arm/protected_memory_allocator/Kbuild b/bifrost/r38p2/kernel/drivers/base/arm/protected_memory_allocator/Kbuild
similarity index 100%
copy from dvalin/kernel/drivers/base/arm/protected_memory_allocator/Kbuild
copy to bifrost/r38p2/kernel/drivers/base/arm/protected_memory_allocator/Kbuild


diff --git a/dvalin/kernel/drivers/base/arm/protected_memory_allocator/build.bp b/bifrost/r38p2/kernel/drivers/base/arm/protected_memory_allocator/build.bp
similarity index 100%
copy from dvalin/kernel/drivers/base/arm/protected_memory_allocator/build.bp
copy to bifrost/r38p2/kernel/drivers/base/arm/protected_memory_allocator/build.bp


diff --git a/bifrost/r38p2/kernel/drivers/base/arm/protected_memory_allocator/protected_memory_allocator.c b/bifrost/r38p2/kernel/drivers/base/arm/protected_memory_allocator/protected_memory_allocator.c
new file mode 100644
index 0000000..f0cd186
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/base/arm/protected_memory_allocator/protected_memory_allocator.c

@@ -0,0 +1,562 @@
+// SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
+/*
+ *
+ * (C) COPYRIGHT 2019-2021 ARM Limited. All rights reserved.
+ *
+ * This program is free software and is provided to you under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation, and any use by you of this program is subject to the terms
+ * of such GNU license.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, you can access it online at
+ * http://www.gnu.org/licenses/gpl-2.0.html.
+ *
+ */
+
+#include <linux/version.h>
+#include <linux/of.h>
+#include <linux/of_reserved_mem.h>
+#include <linux/platform_device.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/mm.h>
+#include <linux/io.h>
+#include <linux/protected_memory_allocator.h>
+
+/* Size of a bitfield element in bytes */
+#define BITFIELD_ELEM_SIZE sizeof(u64)
+
+/* We can track whether or not 64 pages are currently allocated in a u64 */
+#define PAGES_PER_BITFIELD_ELEM (BITFIELD_ELEM_SIZE * BITS_PER_BYTE)
+
+/* Order 6 (ie, 64) corresponds to the number of pages held in a bitfield */
+#define ORDER_OF_PAGES_PER_BITFIELD_ELEM 6
+
+/**
+ * struct simple_pma_device - Simple implementation of a protected memory
+ *                            allocator device
+ * @pma_dev: Protected memory allocator device pointer
+ * @dev:     Device pointer
+ * @allocated_pages_bitfield_arr: Status of all the physical memory pages within the
+ *                                protected memory region, one bit per page
+ * @rmem_base:      Base address of the reserved memory region
+ * @rmem_size:      Size of the reserved memory region, in pages
+ * @num_free_pages: Number of free pages in the memory region
+ * @rmem_lock:      Lock to serialize the allocation and freeing of
+ *                  physical pages from the protected memory region
+ */
+struct simple_pma_device {
+	struct protected_memory_allocator_device pma_dev;
+	struct device *dev;
+	u64 *allocated_pages_bitfield_arr;
+	phys_addr_t rmem_base;
+	size_t rmem_size;
+	size_t num_free_pages;
+	spinlock_t rmem_lock;
+};
+
+/**
+ * ALLOC_PAGES_BITFIELD_ARR_SIZE() - Number of elements in array
+ *                                   'allocated_pages_bitfield_arr'
+ * If the number of pages required does not divide exactly by
+ * PAGES_PER_BITFIELD_ELEM, adds an extra page for the remainder.
+ * @num_pages: number of pages
+ */
+#define ALLOC_PAGES_BITFIELD_ARR_SIZE(num_pages) \
+	((PAGES_PER_BITFIELD_ELEM * (0 != (num_pages % PAGES_PER_BITFIELD_ELEM)) + \
+	num_pages) / PAGES_PER_BITFIELD_ELEM)
+
+/**
+ * small_granularity_alloc() - Allocate 1-32 power-of-two pages.
+ * @epma_dev: protected memory allocator device structure.
+ * @alloc_bitfield_idx: index of the relevant bitfield.
+ * @start_bit: starting bitfield index.
+ * @order: bitshift for number of pages. Order of 0 to 5 equals 1 to 32 pages.
+ * @pma: protected_memory_allocation struct.
+ *
+ * Allocate a power-of-two number of pages, N, where
+ * 0 <= N <= ORDER_OF_PAGES_PER_BITFIELD_ELEM - 1.  ie, Up to 32 pages. The routine
+ * fills-in a pma structure and sets the appropriate bits in the allocated-pages
+ * bitfield array but assumes the caller has already determined that these are
+ * already clear.
+ *
+ * This routine always works within only a single allocated-pages bitfield element.
+ * It can be thought of as the 'small-granularity' allocator.
+ */
+static void small_granularity_alloc(struct simple_pma_device *const epma_dev,
+				    size_t alloc_bitfield_idx, size_t start_bit,
+				    size_t order,
+				    struct protected_memory_allocation *pma)
+{
+	size_t i;
+	size_t page_idx;
+	u64 *bitfield;
+	size_t alloc_pages_bitfield_size;
+
+	if (WARN_ON(!epma_dev) ||
+	    WARN_ON(!pma))
+		return;
+
+	WARN(epma_dev->rmem_size == 0, "%s: rmem_size is 0", __func__);
+	alloc_pages_bitfield_size = ALLOC_PAGES_BITFIELD_ARR_SIZE(epma_dev->rmem_size);
+
+	WARN(alloc_bitfield_idx >= alloc_pages_bitfield_size,
+	     "%s: idx>bf_size: %zu %zu", __func__,
+	     alloc_bitfield_idx, alloc_pages_bitfield_size);
+
+	WARN((start_bit + (1 << order)) > PAGES_PER_BITFIELD_ELEM,
+	     "%s: start=%zu order=%zu ppbe=%zu",
+	     __func__, start_bit, order, PAGES_PER_BITFIELD_ELEM);
+
+	bitfield = &epma_dev->allocated_pages_bitfield_arr[alloc_bitfield_idx];
+
+	for (i = 0; i < (1 << order); i++) {
+		/* Check the pages represented by this bit are actually free */
+		WARN(*bitfield & (1ULL << (start_bit + i)),
+		      "in %s: page not free: %zu %zu %.16llx %zu\n",
+		      __func__, i, order, *bitfield, alloc_pages_bitfield_size);
+
+		/* Mark the pages as now allocated */
+		*bitfield |= (1ULL << (start_bit + i));
+	}
+
+	/* Compute the page index */
+	page_idx = (alloc_bitfield_idx * PAGES_PER_BITFIELD_ELEM) + start_bit;
+
+	/* Fill-in the allocation struct for the caller */
+	pma->pa = epma_dev->rmem_base + (page_idx << PAGE_SHIFT);
+	pma->order = order;
+}
+
+/**
+ * large_granularity_alloc() - Allocate pages at multiples of 64 pages.
+ * @epma_dev: protected memory allocator device structure.
+ * @start_alloc_bitfield_idx: index of the starting bitfield.
+ * @order: bitshift for number of pages. Order of 6+ equals 64+ pages.
+ * @pma: protected_memory_allocation struct.
+ *
+ * Allocate a power-of-two number of pages, N, where
+ * N >= ORDER_OF_PAGES_PER_BITFIELD_ELEM. ie, 64 pages or more. The routine fills-in
+ * a pma structure and sets the appropriate bits in the allocated-pages bitfield array
+ * but assumes the caller has already determined that these are already clear.
+ *
+ * Unlike small_granularity_alloc, this routine can work with multiple 64-page groups,
+ * ie multiple elements from the allocated-pages bitfield array. However, it always
+ * works with complete sets of these 64-page groups. It can therefore be thought of
+ * as the 'large-granularity' allocator.
+ */
+static void large_granularity_alloc(struct simple_pma_device *const epma_dev,
+				    size_t start_alloc_bitfield_idx,
+				    size_t order,
+				    struct protected_memory_allocation *pma)
+{
+	size_t i;
+	size_t num_pages_to_alloc = (size_t)1 << order;
+	size_t num_bitfield_elements_needed = num_pages_to_alloc / PAGES_PER_BITFIELD_ELEM;
+	size_t start_page_idx = start_alloc_bitfield_idx * PAGES_PER_BITFIELD_ELEM;
+
+	if (WARN_ON(!epma_dev) ||
+	    WARN_ON(!pma))
+		return;
+
+	/*
+	 * Are there enough bitfield array elements (groups of 64 pages)
+	 * between the start element and the end of the bitfield array
+	 * to fulfill the request?
+	 */
+	WARN((start_alloc_bitfield_idx + order) >= ALLOC_PAGES_BITFIELD_ARR_SIZE(epma_dev->rmem_size),
+	     "%s: start=%zu order=%zu ms=%zu",
+	     __func__, start_alloc_bitfield_idx, order, epma_dev->rmem_size);
+
+	for (i = 0; i < num_bitfield_elements_needed; i++) {
+		u64 *bitfield = &epma_dev->allocated_pages_bitfield_arr[start_alloc_bitfield_idx + i];
+
+		/* We expect all pages that relate to this bitfield element to be free */
+		WARN((*bitfield != 0),
+		     "in %s: pages not free: i=%zu o=%zu bf=%.16llx\n",
+		     __func__, i, order, *bitfield);
+
+		/* Mark all the pages for this element as not free */
+		*bitfield = ~0ULL;
+	}
+
+	/* Fill-in the allocation struct for the caller */
+	pma->pa = epma_dev->rmem_base + (start_page_idx  << PAGE_SHIFT);
+	pma->order = order;
+}
+
+static struct protected_memory_allocation *simple_pma_alloc_page(
+	struct protected_memory_allocator_device *pma_dev, unsigned int order)
+{
+	struct simple_pma_device *const epma_dev =
+		container_of(pma_dev, struct simple_pma_device, pma_dev);
+	struct protected_memory_allocation *pma;
+	size_t num_pages_to_alloc;
+
+	u64 *bitfields = epma_dev->allocated_pages_bitfield_arr;
+	size_t i;
+	size_t bit;
+	size_t count;
+
+	dev_dbg(epma_dev->dev, "%s(pma_dev=%px, order=%u\n",
+		__func__, (void *)pma_dev, order);
+
+	/* This is an example function that follows an extremely simple logic
+	 * and is very likely to fail to allocate memory if put under stress.
+	 *
+	 * The simple_pma_device maintains an array of u64s, with one bit used
+	 * to track the status of each page.
+	 *
+	 * In order to create a memory allocation, the allocator looks for an
+	 * adjacent group of cleared bits. This does leave the algorithm open
+	 * to fragmentation issues, but is deemed sufficient for now.
+	 * If successful, the allocator shall mark all the pages as allocated
+	 * and increment the offset accordingly.
+	 *
+	 * Allocations of 64 pages or more (order 6) can be allocated only with
+	 * 64-page alignment, in order to keep the algorithm as simple as
+	 * possible. ie, starting from bit 0 of any 64-bit page-allocation
+	 * bitfield. For this, the large-granularity allocator is utilised.
+	 *
+	 * Allocations of lower-order can only be allocated entirely within the
+	 * same group of 64 pages, with the small-granularity allocator  (ie
+	 * always from the same 64-bit page-allocation bitfield) - again, to
+	 * keep things as simple as possible, but flexible to meet
+	 * current needs.
+	 */
+
+	num_pages_to_alloc = (size_t)1 << order;
+
+	pma = devm_kzalloc(epma_dev->dev, sizeof(*pma), GFP_KERNEL);
+	if (!pma) {
+		dev_err(epma_dev->dev, "Failed to alloc pma struct");
+		return NULL;
+	}
+
+	spin_lock(&epma_dev->rmem_lock);
+
+	if (epma_dev->num_free_pages < num_pages_to_alloc) {
+		dev_err(epma_dev->dev, "not enough free pages\n");
+		devm_kfree(epma_dev->dev, pma);
+		spin_unlock(&epma_dev->rmem_lock);
+		return NULL;
+	}
+
+	/*
+	 * For order 0-5 (ie, 1 to 32 pages) we always allocate within the same set of 64 pages
+	 * Currently, most allocations will be very small (1 page), so the more likely path
+	 * here is order < ORDER_OF_PAGES_PER_BITFIELD_ELEM.
+	 */
+	if (likely(order < ORDER_OF_PAGES_PER_BITFIELD_ELEM)) {
+		size_t alloc_pages_bitmap_size = ALLOC_PAGES_BITFIELD_ARR_SIZE(epma_dev->rmem_size);
+
+		for (i = 0; i < alloc_pages_bitmap_size; i++) {
+			count = 0;
+
+			for (bit = 0; bit < PAGES_PER_BITFIELD_ELEM; bit++) {
+				if  (0 == (bitfields[i] & (1ULL << bit))) {
+					if ((count + 1) >= num_pages_to_alloc) {
+						/*
+						 * We've found enough free, consecutive pages with which to
+						 * make an allocation
+						 */
+						small_granularity_alloc(
+							epma_dev, i,
+							bit - count, order,
+							pma);
+
+						epma_dev->num_free_pages -=
+							num_pages_to_alloc;
+
+						spin_unlock(
+							&epma_dev->rmem_lock);
+						return pma;
+					}
+
+					/* So far so good, but we need more set bits yet */
+					count++;
+				} else {
+					/*
+					 * We found an allocated page, so nothing we've seen so far can be used.
+					 * Keep looking.
+					 */
+					count = 0;
+				}
+			}
+		}
+	} else {
+		/**
+		 * For allocations of order ORDER_OF_PAGES_PER_BITFIELD_ELEM and above (>= 64 pages), we know
+		 * we'll only get allocations for whole groups of 64 pages, which hugely simplifies the task.
+		 */
+		size_t alloc_pages_bitmap_size = ALLOC_PAGES_BITFIELD_ARR_SIZE(epma_dev->rmem_size);
+
+		/* How many 64-bit bitfield elements will be needed for the allocation? */
+		size_t num_bitfield_elements_needed = num_pages_to_alloc / PAGES_PER_BITFIELD_ELEM;
+
+		count = 0;
+
+		for (i = 0; i < alloc_pages_bitmap_size; i++) {
+			/* Are all the pages free for the ith u64 bitfield element? */
+			if (bitfields[i] == 0) {
+				count += PAGES_PER_BITFIELD_ELEM;
+
+				if (count >= (1 << order)) {
+					size_t start_idx = (i + 1) - num_bitfield_elements_needed;
+
+					large_granularity_alloc(epma_dev,
+								start_idx,
+								order, pma);
+
+					epma_dev->num_free_pages -= 1 << order;
+					spin_unlock(&epma_dev->rmem_lock);
+					return pma;
+				}
+			} else {
+				count = 0;
+			}
+		}
+	}
+
+	spin_unlock(&epma_dev->rmem_lock);
+	devm_kfree(epma_dev->dev, pma);
+
+	dev_err(epma_dev->dev, "not enough contiguous pages (need %zu), total free pages left %zu\n",
+		num_pages_to_alloc, epma_dev->num_free_pages);
+	return NULL;
+}
+
+static phys_addr_t simple_pma_get_phys_addr(
+	struct protected_memory_allocator_device *pma_dev,
+	struct protected_memory_allocation *pma)
+{
+	struct simple_pma_device *const epma_dev =
+		container_of(pma_dev, struct simple_pma_device, pma_dev);
+
+	dev_dbg(epma_dev->dev, "%s(pma_dev=%px, pma=%px, pa=%llx\n",
+		__func__, (void *)pma_dev, (void *)pma,
+		(unsigned long long)pma->pa);
+
+	return pma->pa;
+}
+
+static void simple_pma_free_page(
+	struct protected_memory_allocator_device *pma_dev,
+	struct protected_memory_allocation *pma)
+{
+	struct simple_pma_device *const epma_dev =
+		container_of(pma_dev, struct simple_pma_device, pma_dev);
+	size_t num_pages_in_allocation;
+	size_t offset;
+	size_t i;
+	size_t bitfield_idx;
+	size_t bitfield_start_bit;
+	size_t page_num;
+	u64 *bitfield;
+	size_t alloc_pages_bitmap_size;
+	size_t num_bitfield_elems_used_by_alloc;
+
+	WARN_ON(pma == NULL);
+
+	dev_dbg(epma_dev->dev, "%s(pma_dev=%px, pma=%px, pa=%llx\n",
+		__func__, (void *)pma_dev, (void *)pma,
+		(unsigned long long)pma->pa);
+
+	WARN_ON(pma->pa < epma_dev->rmem_base);
+
+	/* This is an example function that follows an extremely simple logic
+	 * and is vulnerable to abuse.
+	 */
+	offset = (pma->pa - epma_dev->rmem_base);
+	num_pages_in_allocation = (size_t)1 << pma->order;
+
+	/* The number of bitfield elements used by the allocation */
+	num_bitfield_elems_used_by_alloc = num_pages_in_allocation / PAGES_PER_BITFIELD_ELEM;
+
+	/* The page number of the first page of the allocation, relative to rmem_base */
+	page_num = offset >> PAGE_SHIFT;
+
+	/* Which u64 bitfield refers to this page? */
+	bitfield_idx = page_num / PAGES_PER_BITFIELD_ELEM;
+
+	alloc_pages_bitmap_size = ALLOC_PAGES_BITFIELD_ARR_SIZE(epma_dev->rmem_size);
+
+	/* Is the allocation within expected bounds? */
+	WARN_ON((bitfield_idx + num_bitfield_elems_used_by_alloc) >= alloc_pages_bitmap_size);
+
+	spin_lock(&epma_dev->rmem_lock);
+
+	if (pma->order < ORDER_OF_PAGES_PER_BITFIELD_ELEM) {
+		bitfield = &epma_dev->allocated_pages_bitfield_arr[bitfield_idx];
+
+		/* Which bit within that u64 bitfield is the lsb covering this allocation?  */
+		bitfield_start_bit = page_num % PAGES_PER_BITFIELD_ELEM;
+
+		/* Clear the bits for the pages we're now freeing */
+		*bitfield &= ~(((1ULL << num_pages_in_allocation) - 1) << bitfield_start_bit);
+	} else {
+		WARN(page_num % PAGES_PER_BITFIELD_ELEM,
+		     "%s: Expecting allocs of order >= %d to be %zu-page aligned\n",
+		     __func__, ORDER_OF_PAGES_PER_BITFIELD_ELEM, PAGES_PER_BITFIELD_ELEM);
+
+		for (i = 0; i < num_bitfield_elems_used_by_alloc; i++) {
+			bitfield = &epma_dev->allocated_pages_bitfield_arr[bitfield_idx + i];
+
+			/* We expect all bits to be set (all pages allocated) */
+			WARN((*bitfield != ~0),
+			     "%s: alloc being freed is not fully allocated: of=%zu np=%zu bf=%.16llx\n",
+			     __func__, offset, num_pages_in_allocation, *bitfield);
+
+			/*
+			 * Now clear all the bits in the bitfield element to mark all the pages
+			 * it refers to as free.
+			 */
+			*bitfield = 0ULL;
+		}
+	}
+
+	epma_dev->num_free_pages += num_pages_in_allocation;
+	spin_unlock(&epma_dev->rmem_lock);
+	devm_kfree(epma_dev->dev, pma);
+}
+
+static int protected_memory_allocator_probe(struct platform_device *pdev)
+{
+	struct simple_pma_device *epma_dev;
+	struct device_node *np;
+	phys_addr_t rmem_base;
+	size_t rmem_size;
+	size_t alloc_bitmap_pages_arr_size;
+#if (KERNEL_VERSION(4, 15, 0) <= LINUX_VERSION_CODE)
+	struct reserved_mem *rmem;
+#endif
+
+	np = pdev->dev.of_node;
+
+	if (!np) {
+		dev_err(&pdev->dev, "device node pointer not set\n");
+		return -ENODEV;
+	}
+
+	np = of_parse_phandle(np, "memory-region", 0);
+	if (!np) {
+		dev_err(&pdev->dev, "memory-region node not set\n");
+		return -ENODEV;
+	}
+
+#if (KERNEL_VERSION(4, 15, 0) <= LINUX_VERSION_CODE)
+	rmem = of_reserved_mem_lookup(np);
+	if (rmem) {
+		rmem_base = rmem->base;
+		rmem_size = rmem->size >> PAGE_SHIFT;
+	} else
+#endif
+	{
+		of_node_put(np);
+		dev_err(&pdev->dev, "could not read reserved memory-region\n");
+		return -ENODEV;
+	}
+
+	of_node_put(np);
+	epma_dev = devm_kzalloc(&pdev->dev, sizeof(*epma_dev), GFP_KERNEL);
+	if (!epma_dev)
+		return -ENOMEM;
+
+	epma_dev->pma_dev.ops.pma_alloc_page = simple_pma_alloc_page;
+	epma_dev->pma_dev.ops.pma_get_phys_addr = simple_pma_get_phys_addr;
+	epma_dev->pma_dev.ops.pma_free_page = simple_pma_free_page;
+	epma_dev->pma_dev.owner = THIS_MODULE;
+	epma_dev->dev = &pdev->dev;
+	epma_dev->rmem_base = rmem_base;
+	epma_dev->rmem_size = rmem_size;
+	epma_dev->num_free_pages = rmem_size;
+	spin_lock_init(&epma_dev->rmem_lock);
+
+	alloc_bitmap_pages_arr_size = ALLOC_PAGES_BITFIELD_ARR_SIZE(epma_dev->rmem_size);
+
+	epma_dev->allocated_pages_bitfield_arr = devm_kzalloc(&pdev->dev,
+		alloc_bitmap_pages_arr_size * BITFIELD_ELEM_SIZE, GFP_KERNEL);
+
+	if (!epma_dev->allocated_pages_bitfield_arr) {
+		dev_err(&pdev->dev, "failed to allocate resources\n");
+		devm_kfree(&pdev->dev, epma_dev);
+		return -ENOMEM;
+	}
+
+	if (epma_dev->rmem_size % PAGES_PER_BITFIELD_ELEM) {
+		size_t extra_pages =
+			alloc_bitmap_pages_arr_size * PAGES_PER_BITFIELD_ELEM -
+			epma_dev->rmem_size;
+		size_t last_bitfield_index = alloc_bitmap_pages_arr_size - 1;
+
+		/* Mark the extra pages (that lie outside the reserved range) as
+		 * always in use.
+		 */
+		epma_dev->allocated_pages_bitfield_arr[last_bitfield_index] =
+			((1ULL << extra_pages) - 1) <<
+			(PAGES_PER_BITFIELD_ELEM - extra_pages);
+	}
+
+	platform_set_drvdata(pdev, &epma_dev->pma_dev);
+	dev_info(&pdev->dev,
+		"Protected memory allocator probed successfully\n");
+	dev_info(&pdev->dev, "Protected memory region: base=%llx num pages=%zu\n",
+		(unsigned long long)rmem_base, rmem_size);
+
+	return 0;
+}
+
+static int protected_memory_allocator_remove(struct platform_device *pdev)
+{
+	struct protected_memory_allocator_device *pma_dev =
+		platform_get_drvdata(pdev);
+	struct simple_pma_device *epma_dev;
+	struct device *dev;
+
+	if (!pma_dev)
+		return -EINVAL;
+
+	epma_dev = container_of(pma_dev, struct simple_pma_device, pma_dev);
+	dev = epma_dev->dev;
+
+	if (epma_dev->num_free_pages < epma_dev->rmem_size) {
+		dev_warn(&pdev->dev, "Leaking %zu pages of protected memory\n",
+			epma_dev->rmem_size - epma_dev->num_free_pages);
+	}
+
+	platform_set_drvdata(pdev, NULL);
+	devm_kfree(dev, epma_dev->allocated_pages_bitfield_arr);
+	devm_kfree(dev, epma_dev);
+
+	dev_info(&pdev->dev,
+		"Protected memory allocator removed successfully\n");
+
+	return 0;
+}
+
+static const struct of_device_id protected_memory_allocator_dt_ids[] = {
+	{ .compatible = "arm,protected-memory-allocator" },
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, protected_memory_allocator_dt_ids);
+
+static struct platform_driver protected_memory_allocator_driver = {
+	.probe = protected_memory_allocator_probe,
+	.remove = protected_memory_allocator_remove,
+	.driver = {
+		.name = "simple_protected_memory_allocator",
+		.of_match_table = of_match_ptr(protected_memory_allocator_dt_ids),
+	}
+};
+
+module_platform_driver(protected_memory_allocator_driver);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("ARM Ltd.");
+MODULE_VERSION("1.0");

diff --git a/dvalin/kernel/drivers/gpu/arm/Kbuild b/bifrost/r38p2/kernel/drivers/gpu/arm/Kbuild
similarity index 100%
copy from dvalin/kernel/drivers/gpu/arm/Kbuild
copy to bifrost/r38p2/kernel/drivers/gpu/arm/Kbuild


diff --git a/dvalin/kernel/drivers/gpu/arm/Kconfig b/bifrost/r38p2/kernel/drivers/gpu/arm/Kconfig
similarity index 100%
copy from dvalin/kernel/drivers/gpu/arm/Kconfig
copy to bifrost/r38p2/kernel/drivers/gpu/arm/Kconfig


diff --git a/dvalin/kernel/drivers/gpu/arm/Makefile b/bifrost/r38p2/kernel/drivers/gpu/arm/Makefile
similarity index 100%
copy from dvalin/kernel/drivers/gpu/arm/Makefile
copy to bifrost/r38p2/kernel/drivers/gpu/arm/Makefile


diff --git a/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/Kbuild b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/Kbuild
new file mode 100644
index 0000000..a962ed0
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/Kbuild

@@ -0,0 +1,264 @@
+# SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
+#
+# (C) COPYRIGHT 2012-2021 ARM Limited. All rights reserved.
+#
+# This program is free software and is provided to you under the terms of the
+# GNU General Public License version 2 as published by the Free Software
+# Foundation, and any use by you of this program is subject to the terms
+# of such GNU license.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, you can access it online at
+# http://www.gnu.org/licenses/gpl-2.0.html.
+#
+#
+
+# make $(src) as absolute path if it is not already, by prefixing $(srctree)
+# This is to prevent any build issue due to wrong path.
+src:=$(if $(patsubst /%,,$(src)),$(srctree)/$(src),$(src))
+
+#
+# Prevent misuse when Kernel configurations are not present by default
+# in out-of-tree builds
+#
+ifneq ($(CONFIG_ANDROID),n)
+ifeq ($(CONFIG_GPU_TRACEPOINTS),n)
+    $(error CONFIG_GPU_TRACEPOINTS must be set in Kernel configuration)
+endif
+endif
+
+ifeq ($(CONFIG_DMA_SHARED_BUFFER),n)
+    $(error CONFIG_DMA_SHARED_BUFFER must be set in Kernel configuration)
+endif
+
+ifeq ($(CONFIG_PM_DEVFREQ),n)
+    $(error CONFIG_PM_DEVFREQ must be set in Kernel configuration)
+endif
+
+ifeq ($(CONFIG_DEVFREQ_THERMAL),n)
+    $(error CONFIG_DEVFREQ_THERMAL must be set in Kernel configuration)
+endif
+
+ifeq ($(CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND),n)
+    $(error CONFIG_DEVFREQ_GOV_SIMPLE_ONDEMAND must be set in Kernel configuration)
+endif
+
+ifeq ($(CONFIG_FW_LOADER), n)
+    $(error CONFIG_FW_LOADER must be set in Kernel configuration)
+endif
+
+ifeq ($(CONFIG_MALI_PRFCNT_SET_SELECT_VIA_DEBUG_FS), y)
+    ifneq ($(CONFIG_DEBUG_FS), y)
+        $(error CONFIG_MALI_PRFCNT_SET_SELECT_VIA_DEBUG_FS depends on CONFIG_DEBUG_FS to be set in Kernel configuration)
+    endif
+endif
+
+ifeq ($(CONFIG_MALI_FENCE_DEBUG), y)
+    ifneq ($(CONFIG_SYNC), y)
+        ifneq ($(CONFIG_SYNC_FILE), y)
+            $(error CONFIG_MALI_FENCE_DEBUG depends on CONFIG_SYNC || CONFIG_SYNC_FILE to be set in Kernel configuration)
+        endif
+    endif
+endif
+
+#
+# Configurations
+#
+
+# Driver version string which is returned to userspace via an ioctl
+MALI_RELEASE_NAME ?= '"r38p2-01eac0"'
+# Set up defaults if not defined by build system
+ifeq ($(CONFIG_MALI_DEBUG), y)
+    MALI_UNIT_TEST = 1
+    MALI_CUSTOMER_RELEASE ?= 0
+else
+    MALI_UNIT_TEST ?= 0
+    MALI_CUSTOMER_RELEASE ?= 1
+endif
+MALI_COVERAGE ?= 0
+
+# Kconfig passes in the name with quotes for in-tree builds - remove them.
+MALI_PLATFORM_DIR := $(shell echo $(CONFIG_MALI_PLATFORM_NAME))
+
+ifeq ($(CONFIG_MALI_CSF_SUPPORT),y)
+    MALI_JIT_PRESSURE_LIMIT_BASE = 0
+    MALI_USE_CSF = 1
+else
+    MALI_JIT_PRESSURE_LIMIT_BASE ?= 1
+    MALI_USE_CSF ?= 0
+endif
+
+
+ifneq ($(CONFIG_MALI_KUTF), n)
+    MALI_KERNEL_TEST_API ?= 1
+else
+    MALI_KERNEL_TEST_API ?= 0
+endif
+
+# Experimental features (corresponding -D definition should be appended to
+# ccflags-y below, e.g. for MALI_EXPERIMENTAL_FEATURE,
+# -DMALI_EXPERIMENTAL_FEATURE=$(MALI_EXPERIMENTAL_FEATURE) should be appended)
+#
+# Experimental features must default to disabled, e.g.:
+# MALI_EXPERIMENTAL_FEATURE ?= 0
+MALI_INCREMENTAL_RENDERING_JM ?= 0
+
+#
+# ccflags
+#
+ccflags-y = \
+    -DMALI_CUSTOMER_RELEASE=$(MALI_CUSTOMER_RELEASE) \
+    -DMALI_USE_CSF=$(MALI_USE_CSF) \
+    -DMALI_KERNEL_TEST_API=$(MALI_KERNEL_TEST_API) \
+    -DMALI_UNIT_TEST=$(MALI_UNIT_TEST) \
+    -DMALI_COVERAGE=$(MALI_COVERAGE) \
+    -DMALI_RELEASE_NAME=$(MALI_RELEASE_NAME) \
+    -DMALI_JIT_PRESSURE_LIMIT_BASE=$(MALI_JIT_PRESSURE_LIMIT_BASE) \
+    -DMALI_INCREMENTAL_RENDERING_JM=$(MALI_INCREMENTAL_RENDERING_JM) \
+    -DMALI_PLATFORM_DIR=$(MALI_PLATFORM_DIR)
+
+
+ifeq ($(KBUILD_EXTMOD),)
+# in-tree
+    ccflags-y +=-DMALI_KBASE_PLATFORM_PATH=../../$(src)/platform/$(CONFIG_MALI_PLATFORM_NAME)
+else
+# out-of-tree
+    ccflags-y +=-DMALI_KBASE_PLATFORM_PATH=$(src)/platform/$(CONFIG_MALI_PLATFORM_NAME)
+endif
+
+ccflags-y += \
+    -I$(srctree)/include/linux \
+    -I$(srctree)/drivers/staging/android \
+    -I$(src) \
+    -I$(src)/platform/$(MALI_PLATFORM_DIR) \
+    -I$(src)/../../../base \
+    -I$(src)/../../../../include
+
+subdir-ccflags-y += $(ccflags-y)
+
+#
+# Kernel Modules
+#
+obj-$(CONFIG_MALI_MIDGARD) += mali_kbase.o
+obj-$(CONFIG_MALI_ARBITRATION) += arbitration/
+obj-$(CONFIG_MALI_KUTF)    += tests/
+
+mali_kbase-y := \
+    mali_kbase_cache_policy.o \
+    mali_kbase_ccswe.o \
+    mali_kbase_mem.o \
+    mali_kbase_mem_pool_group.o \
+    mali_kbase_native_mgm.o \
+    mali_kbase_ctx_sched.o \
+    mali_kbase_gpuprops.o \
+    mali_kbase_pm.o \
+    mali_kbase_config.o \
+    mali_kbase_kinstr_prfcnt.o \
+    mali_kbase_vinstr.o \
+    mali_kbase_hwcnt.o \
+    mali_kbase_hwcnt_gpu.o \
+    mali_kbase_hwcnt_gpu_narrow.o \
+    mali_kbase_hwcnt_types.o \
+    mali_kbase_hwcnt_virtualizer.o \
+    mali_kbase_hwcnt_watchdog_if_timer.o \
+    mali_kbase_softjobs.o \
+    mali_kbase_hw.o \
+    mali_kbase_debug.o \
+    mali_kbase_gpu_memory_debugfs.o \
+    mali_kbase_mem_linux.o \
+    mali_kbase_core_linux.o \
+    mali_kbase_mem_profile_debugfs.o \
+    mali_kbase_disjoint_events.o \
+    mali_kbase_debug_mem_view.o \
+    mali_kbase_debug_mem_zones.o \
+    mali_kbase_smc.o \
+    mali_kbase_mem_pool.o \
+    mali_kbase_mem_pool_debugfs.o \
+    mali_kbase_debugfs_helper.o \
+    mali_kbase_strings.o \
+    mali_kbase_as_fault_debugfs.o \
+    mali_kbase_regs_history_debugfs.o \
+    mali_kbase_dvfs_debugfs.o \
+    mali_power_gpu_frequency_trace.o \
+    mali_kbase_trace_gpu_mem.o \
+    mali_kbase_pbha.o
+
+mali_kbase-$(CONFIG_DEBUG_FS) += mali_kbase_pbha_debugfs.o
+
+mali_kbase-$(CONFIG_MALI_CINSTR_GWT) += mali_kbase_gwt.o
+
+mali_kbase-$(CONFIG_SYNC) += \
+    mali_kbase_sync_android.o \
+    mali_kbase_sync_common.o
+
+mali_kbase-$(CONFIG_SYNC_FILE) += \
+    mali_kbase_fence_ops.o \
+    mali_kbase_sync_file.o \
+    mali_kbase_sync_common.o
+
+ifeq ($(CONFIG_MALI_CSF_SUPPORT),y)
+    mali_kbase-y += \
+        mali_kbase_hwcnt_backend_csf.o \
+        mali_kbase_hwcnt_backend_csf_if_fw.o
+else
+    mali_kbase-y += \
+        mali_kbase_jm.o \
+        mali_kbase_hwcnt_backend_jm.o \
+        mali_kbase_hwcnt_backend_jm_watchdog.o \
+        mali_kbase_dummy_job_wa.o \
+        mali_kbase_debug_job_fault.o \
+        mali_kbase_event.o \
+        mali_kbase_jd.o \
+        mali_kbase_jd_debugfs.o \
+        mali_kbase_js.o \
+        mali_kbase_js_ctx_attr.o \
+        mali_kbase_kinstr_jm.o
+
+    mali_kbase-$(CONFIG_MALI_DMA_FENCE) += \
+        mali_kbase_fence_ops.o \
+        mali_kbase_dma_fence.o \
+        mali_kbase_fence.o
+
+    mali_kbase-$(CONFIG_SYNC_FILE) += \
+        mali_kbase_fence_ops.o \
+        mali_kbase_fence.o
+endif
+
+
+INCLUDE_SUBDIR = \
+    $(src)/context/Kbuild \
+    $(src)/debug/Kbuild \
+    $(src)/device/Kbuild \
+    $(src)/backend/gpu/Kbuild \
+    $(src)/mmu/Kbuild \
+    $(src)/tl/Kbuild \
+    $(src)/gpu/Kbuild \
+    $(src)/thirdparty/Kbuild \
+    $(src)/platform/$(MALI_PLATFORM_DIR)/Kbuild
+
+ifeq ($(CONFIG_MALI_CSF_SUPPORT),y)
+    INCLUDE_SUBDIR += $(src)/csf/Kbuild
+endif
+
+ifeq ($(CONFIG_MALI_ARBITER_SUPPORT),y)
+    INCLUDE_SUBDIR += $(src)/arbiter/Kbuild
+endif
+
+ifeq ($(CONFIG_MALI_DEVFREQ),y)
+    ifeq ($(CONFIG_DEVFREQ_THERMAL),y)
+        INCLUDE_SUBDIR += $(src)/ipa/Kbuild
+    endif
+endif
+
+ifeq ($(KBUILD_EXTMOD),)
+# in-tree
+    -include $(INCLUDE_SUBDIR)
+else
+# out-of-tree
+    include $(INCLUDE_SUBDIR)
+endif

diff --git a/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/Kconfig b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/Kconfig
new file mode 100644
index 0000000..3534ee8
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/Kconfig

@@ -0,0 +1,397 @@
+# SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
+#
+# (C) COPYRIGHT 2012-2021 ARM Limited. All rights reserved.
+#
+# This program is free software and is provided to you under the terms of the
+# GNU General Public License version 2 as published by the Free Software
+# Foundation, and any use by you of this program is subject to the terms
+# of such GNU license.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, you can access it online at
+# http://www.gnu.org/licenses/gpl-2.0.html.
+#
+#
+
+menuconfig MALI_MIDGARD
+	tristate "Mali Midgard series support"
+	select GPU_TRACEPOINTS if ANDROID
+	select DMA_SHARED_BUFFER
+	select PM_DEVFREQ
+	select DEVFREQ_THERMAL
+	select FW_LOADER
+	default n
+	help
+	  Enable this option to build support for a ARM Mali Midgard GPU.
+
+	  To compile this driver as a module, choose M here:
+	  this will generate a single module, called mali_kbase.
+
+if MALI_MIDGARD
+
+config MALI_PLATFORM_NAME
+	depends on MALI_MIDGARD
+	string "Platform name"
+	default "devicetree"
+	help
+	  Enter the name of the desired platform configuration directory to
+	  include in the build. 'platform/$(MALI_PLATFORM_NAME)/Kbuild' must
+	  exist.
+
+config MALI_REAL_HW
+	depends on MALI_MIDGARD
+	def_bool !MALI_NO_MALI
+
+menu "Platform specific options"
+source "drivers/gpu/arm/midgard/platform/Kconfig"
+endmenu
+
+config MALI_CSF_SUPPORT
+	bool "Enable Mali CSF based GPU support"
+	depends on MALI_MIDGARD=m
+	default n
+	help
+	  Enables support for CSF based GPUs.
+
+config MALI_DEVFREQ
+	bool "Enable devfreq support for Mali"
+	depends on MALI_MIDGARD && PM_DEVFREQ
+	select DEVFREQ_GOV_SIMPLE_ONDEMAND
+	default y
+	help
+	  Support devfreq for Mali.
+
+	  Using the devfreq framework and, by default, the simple on-demand
+	  governor, the frequency of Mali will be dynamically selected from the
+	  available OPPs.
+
+config MALI_MIDGARD_DVFS
+	bool "Enable legacy DVFS"
+	depends on MALI_MIDGARD && !MALI_DEVFREQ
+	default n
+	help
+	  Choose this option to enable legacy DVFS in the Mali Midgard DDK.
+
+config MALI_GATOR_SUPPORT
+	bool "Enable Streamline tracing support"
+	depends on MALI_MIDGARD
+	default y
+	help
+	  Enables kbase tracing used by the Arm Streamline Performance Analyzer.
+	  The tracepoints are used to derive GPU activity charts in Streamline.
+
+config MALI_MIDGARD_ENABLE_TRACE
+	bool "Enable kbase tracing"
+	depends on MALI_MIDGARD
+	default y if MALI_DEBUG
+	default n
+	help
+	  Enables tracing in kbase. Trace log available through
+	  the "mali_trace" debugfs file, when the CONFIG_DEBUG_FS is enabled
+
+config MALI_DMA_FENCE
+	bool "Enable DMA_BUF fence support for Mali"
+	depends on MALI_MIDGARD
+	default n
+	help
+	  Support DMA_BUF fences for Mali.
+
+	  This option should only be enabled if the Linux Kernel has built in
+	  support for DMA_BUF fences.
+
+config MALI_ARBITER_SUPPORT
+	bool "Enable arbiter support for Mali"
+	depends on MALI_MIDGARD && !MALI_CSF_SUPPORT
+	default n
+	help
+	  Enable support for the arbiter interface in the driver.
+	  This allows an external arbiter to manage driver access
+	  to GPU hardware in a virtualized environment
+
+	  If unsure, say N.
+
+config MALI_DMA_BUF_MAP_ON_DEMAND
+	bool "Enable map imported dma-bufs on demand"
+	depends on MALI_MIDGARD
+	default n
+	help
+	  This option caused kbase to set up the GPU mapping of imported
+	  dma-buf when needed to run atoms. This is the legacy behavior.
+
+	  This is intended for testing and the option will get removed in the
+	  future.
+
+config MALI_DMA_BUF_LEGACY_COMPAT
+	bool "Enable legacy compatibility cache flush on dma-buf map"
+	depends on MALI_MIDGARD && !MALI_DMA_BUF_MAP_ON_DEMAND
+	default n
+	help
+	  This option enables compatibility with legacy dma-buf mapping
+	  behavior, then the dma-buf is mapped on import, by adding cache
+	  maintenance where MALI_DMA_BUF_MAP_ON_DEMAND would do the mapping,
+	  including a cache flush.
+
+	  This option might work-around issues related to missing cache
+	  flushes in other drivers. This only has an effect for clients using
+	  UK 11.18 or older. For later UK versions it is not possible.
+
+menuconfig MALI_EXPERT
+	depends on MALI_MIDGARD
+	bool "Enable Expert Settings"
+	default n
+	help
+	  Enabling this option and modifying the default settings may produce
+	  a driver with performance or other limitations.
+
+if MALI_EXPERT
+
+config MALI_2MB_ALLOC
+	bool "Attempt to allocate 2MB pages"
+	depends on MALI_MIDGARD && MALI_EXPERT
+	default n
+	help
+	  Rather than allocating all GPU memory page-by-page, attempt to
+	  allocate 2MB pages from the kernel. This reduces TLB pressure and
+	  helps to prevent memory fragmentation.
+
+	  If in doubt, say N
+
+config MALI_MEMORY_FULLY_BACKED
+	bool "Enable memory fully physically-backed"
+	depends on MALI_MIDGARD && MALI_EXPERT
+	default n
+	help
+	  This option enables full physical backing of all virtual
+	  memory allocations in the kernel. Notice that this build
+	  option only affects allocations of grow-on-GPU-page-fault
+	  memory.
+
+config MALI_CORESTACK
+	bool "Enable support of GPU core stack power control"
+	depends on MALI_MIDGARD && MALI_EXPERT
+	default n
+	help
+	  Enabling this feature on supported GPUs will let the driver powering
+	  on/off the GPU core stack independently without involving the Power
+	  Domain Controller. This should only be enabled on platforms which
+	  integration of the PDC to the Mali GPU is known to be problematic.
+	  This feature is currently only supported on t-Six and t-HEx GPUs.
+
+	  If unsure, say N.
+
+comment "Platform options"
+	depends on MALI_MIDGARD && MALI_EXPERT
+
+config MALI_NO_MALI
+	bool "Enable No Mali"
+	depends on MALI_MIDGARD && MALI_EXPERT
+	default n
+	help
+	  This can be used to test the driver in a simulated environment
+	  whereby the hardware is not physically present. If the hardware is physically
+	  present it will not be used. This can be used to test the majority of the
+	  driver without needing actual hardware or for software benchmarking.
+	  All calls to the simulated hardware will complete immediately as if the hardware
+	  completed the task.
+
+config MALI_ERROR_INJECT
+	bool "Enable No Mali error injection"
+	depends on MALI_MIDGARD && MALI_EXPERT && MALI_NO_MALI
+	default n
+	help
+	  Enables insertion of errors to test module failure and recovery mechanisms.
+
+config MALI_GEM5_BUILD
+	bool "Enable build of Mali kernel driver for GEM5"
+	depends on MALI_MIDGARD && MALI_EXPERT
+	default n
+	help
+	  This option is to do a Mali GEM5 build.
+	  If unsure, say N.
+
+comment "Debug options"
+	depends on MALI_MIDGARD && MALI_EXPERT
+
+config MALI_FW_CORE_DUMP
+        bool "Enable support for FW core dump"
+        depends on MALI_MIDGARD && MALI_EXPERT && MALI_CSF_SUPPORT
+        default n
+        help
+          Adds ability to request firmware core dump
+
+          Example:
+          * To explicitly request core dump:
+                echo 1 >/sys/kernel/debug/mali0/fw_core_dump
+          * To output current core dump (after explicitly requesting a core dump,
+            or kernel driver reported an internal firmware error):
+                cat /sys/kernel/debug/mali0/fw_core_dump
+
+config MALI_DEBUG
+	bool "Enable debug build"
+	depends on MALI_MIDGARD && MALI_EXPERT
+	default n
+	help
+	  Select this option for increased checking and reporting of errors.
+
+config MALI_FENCE_DEBUG
+	bool "Enable debug sync fence usage"
+	depends on MALI_MIDGARD && MALI_EXPERT && (SYNC || SYNC_FILE)
+	default y if MALI_DEBUG
+	help
+	  Select this option to enable additional checking and reporting on the
+	  use of sync fences in the Mali driver.
+
+	  This will add a 3s timeout to all sync fence waits in the Mali
+	  driver, so that when work for Mali has been waiting on a sync fence
+	  for a long time a debug message will be printed, detailing what fence
+	  is causing the block, and which dependent Mali atoms are blocked as a
+	  result of this.
+
+	  The timeout can be changed at runtime through the js_soft_timeout
+	  device attribute, where the timeout is specified in milliseconds.
+
+config MALI_SYSTEM_TRACE
+	bool "Enable system event tracing support"
+	depends on MALI_MIDGARD && MALI_EXPERT
+	default y if MALI_DEBUG
+	default n
+	help
+	  Choose this option to enable system trace events for each
+	  kbase event. This is typically used for debugging but has
+	  minimal overhead when not in use. Enable only if you know what
+	  you are doing.
+
+comment "Instrumentation options"
+	depends on MALI_MIDGARD && MALI_EXPERT
+
+choice
+	prompt "Select Performance counters set"
+	default MALI_PRFCNT_SET_PRIMARY
+	depends on MALI_MIDGARD && MALI_EXPERT
+
+config MALI_PRFCNT_SET_PRIMARY
+	bool "Primary"
+	depends on MALI_MIDGARD && MALI_EXPERT
+	help
+	  Select this option to use primary set of performance counters.
+
+config MALI_PRFCNT_SET_SECONDARY
+	bool "Secondary"
+	depends on MALI_MIDGARD && MALI_EXPERT
+	help
+	  Select this option to use secondary set of performance counters. Kernel
+	  features that depend on an access to the primary set of counters may
+	  become unavailable. Enabling this option will prevent power management
+	  from working optimally and may cause instrumentation tools to return
+	  bogus results.
+
+	  If unsure, use MALI_PRFCNT_SET_PRIMARY.
+
+config MALI_PRFCNT_SET_TERTIARY
+	bool "Tertiary"
+	depends on MALI_MIDGARD && MALI_EXPERT
+	help
+	  Select this option to use tertiary set of performance counters. Kernel
+	  features that depend on an access to the primary set of counters may
+	  become unavailable. Enabling this option will prevent power management
+	  from working optimally and may cause instrumentation tools to return
+	  bogus results.
+
+	  If unsure, use MALI_PRFCNT_SET_PRIMARY.
+
+endchoice
+
+config MALI_PRFCNT_SET_SELECT_VIA_DEBUG_FS
+	bool "Enable runtime selection of performance counters set via debugfs"
+	depends on MALI_MIDGARD && MALI_EXPERT && DEBUG_FS
+	default n
+	help
+	  Select this option to make the secondary set of performance counters
+	  available at runtime via debugfs. Kernel features that depend on an
+	  access to the primary set of counters may become unavailable.
+
+	  If no runtime debugfs option is set, the build time counter set
+	  choice will be used.
+
+	  This feature is unsupported and unstable, and may break at any time.
+	  Enabling this option will prevent power management from working
+	  optimally and may cause instrumentation tools to return bogus results.
+
+	  No validation is done on the debugfs input. Invalid input could cause
+	  performance counter errors. Valid inputs are the values accepted by
+	  the SET_SELECT bits of the PRFCNT_CONFIG register as defined in the
+	  architecture specification.
+
+	  If unsure, say N.
+
+config MALI_JOB_DUMP
+	bool "Enable system level support needed for job dumping"
+	depends on MALI_MIDGARD && MALI_EXPERT
+	default n
+	help
+	  Choose this option to enable system level support needed for
+	  job dumping. This is typically used for instrumentation but has
+	  minimal overhead when not in use. Enable only if you know what
+	  you are doing.
+
+comment "Workarounds"
+	depends on MALI_MIDGARD && MALI_EXPERT
+
+config MALI_PWRSOFT_765
+	bool "Enable workaround for PWRSOFT-765"
+	depends on MALI_MIDGARD && MALI_EXPERT
+	default n
+	help
+	  PWRSOFT-765 fixes devfreq cooling devices issues. The fix was merged
+	  in kernel v4.10, however if backported into the kernel then this
+	  option must be manually selected.
+
+	  If using kernel >= v4.10 then say N, otherwise if devfreq cooling
+	  changes have been backported say Y to avoid compilation errors.
+
+config MALI_HW_ERRATA_1485982_NOT_AFFECTED
+	bool "Disable workaround for BASE_HW_ISSUE_GPU2017_1336"
+	depends on MALI_MIDGARD && MALI_EXPERT
+	default n
+	help
+	  This option disables the default workaround for GPU2017-1336. The
+	  workaround keeps the L2 cache powered up except for powerdown and reset.
+
+	  The workaround introduces a limitation that will prevent the running of
+	  protected mode content on fully coherent platforms, as the switch to IO
+	  coherency mode requires the L2 to be turned off.
+
+config MALI_HW_ERRATA_1485982_USE_CLOCK_ALTERNATIVE
+	bool "Use alternative workaround for BASE_HW_ISSUE_GPU2017_1336"
+	depends on MALI_MIDGARD && MALI_EXPERT && !MALI_HW_ERRATA_1485982_NOT_AFFECTED
+	default n
+	help
+	  This option uses an alternative workaround for GPU2017-1336. Lowering
+	  the GPU clock to a, platform specific, known good frequency before
+	  powering down the L2 cache. The clock can be specified in the device
+	  tree using the property, opp-mali-errata-1485982. Otherwise the
+	  slowest clock will be selected.
+
+endif
+
+config MALI_ARBITRATION
+	tristate "Enable Virtualization reference code"
+	depends on MALI_MIDGARD
+	default n
+	help
+	  Enables the build of several reference modules used in the reference
+	  virtualization setup for Mali
+	  If unsure, say N.
+
+if MALI_ARBITRATION
+source "drivers/gpu/arm/midgard/arbitration/Kconfig"
+endif
+
+source "drivers/gpu/arm/midgard/tests/Kconfig"
+
+endif

diff --git a/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/Makefile b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/Makefile
new file mode 100644
index 0000000..d0a7650
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/Makefile

@@ -0,0 +1,263 @@
+# SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
+#
+# (C) COPYRIGHT 2010-2022 ARM Limited. All rights reserved.
+#
+# This program is free software and is provided to you under the terms of the
+# GNU General Public License version 2 as published by the Free Software
+# Foundation, and any use by you of this program is subject to the terms
+# of such GNU license.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, you can access it online at
+# http://www.gnu.org/licenses/gpl-2.0.html.
+#
+#
+
+KERNEL_SRC ?= /lib/modules/$(shell uname -r)/build
+KDIR ?= $(KERNEL_SRC)
+
+ifeq ($(KDIR),)
+    $(error Must specify KDIR to point to the kernel to target))
+endif
+
+#
+# Default configuration values
+#
+# Dependency resolution is done through statements as Kconfig
+# is not supported for out-of-tree builds.
+#
+
+CONFIG_MALI_MIDGARD ?= m
+ifeq ($(CONFIG_MALI_MIDGARD),m)
+    CONFIG_MALI_PLATFORM_NAME ?= "devicetree"
+    CONFIG_MALI_GATOR_SUPPORT ?= y
+    CONFIG_MALI_ARBITRATION ?= n
+    CONFIG_MALI_PARTITION_MANAGER ?= n
+
+    ifeq ($(origin CONFIG_MALI_ABITER_MODULES), undefined)
+        CONFIG_MALI_ARBITER_MODULES := $(CONFIG_MALI_ARBITRATION)
+    endif
+
+    ifeq ($(origin CONFIG_MALI_GPU_POWER_MODULES), undefined)
+        CONFIG_MALI_GPU_POWER_MODULES := $(CONFIG_MALI_ARBITRATION)
+    endif
+
+    ifneq ($(CONFIG_MALI_NO_MALI),y)
+        # Prevent misuse when CONFIG_MALI_NO_MALI=y
+        CONFIG_MALI_REAL_HW ?= y
+    endif
+
+    ifeq ($(CONFIG_MALI_MIDGARD_DVFS),y)
+        # Prevent misuse when CONFIG_MALI_MIDGARD_DVFS=y
+        CONFIG_MALI_DEVFREQ ?= n
+    else
+        CONFIG_MALI_DEVFREQ ?= y
+    endif
+
+    ifeq ($(CONFIG_MALI_DMA_BUF_MAP_ON_DEMAND), y)
+        # Prevent misuse when CONFIG_MALI_DMA_BUF_MAP_ON_DEMAND=y
+        CONFIG_MALI_DMA_BUF_LEGACY_COMPAT = n
+    endif
+
+    ifeq ($(CONFIG_XEN),y)
+        ifneq ($(CONFIG_MALI_ARBITRATION), n)
+            CONFIG_MALI_XEN ?= m
+        endif
+    endif
+
+    #
+    # Expert/Debug/Test released configurations
+    #
+    ifeq ($(CONFIG_MALI_EXPERT), y)
+        ifeq ($(CONFIG_MALI_NO_MALI), y)
+            CONFIG_MALI_REAL_HW = n
+        else
+            # Prevent misuse when CONFIG_MALI_NO_MALI=n
+            CONFIG_MALI_REAL_HW = y
+            CONFIG_MALI_ERROR_INJECT = n
+        endif
+
+        ifeq ($(CONFIG_MALI_HW_ERRATA_1485982_NOT_AFFECTED), y)
+            # Prevent misuse when CONFIG_MALI_HW_ERRATA_1485982_NOT_AFFECTED=y
+            CONFIG_MALI_HW_ERRATA_1485982_USE_CLOCK_ALTERNATIVE = n
+        endif
+
+        ifeq ($(CONFIG_MALI_DEBUG), y)
+            CONFIG_MALI_MIDGARD_ENABLE_TRACE ?= y
+            CONFIG_MALI_SYSTEM_TRACE ?= y
+
+            ifeq ($(CONFIG_SYNC), y)
+                CONFIG_MALI_FENCE_DEBUG ?= y
+            else
+                ifeq ($(CONFIG_SYNC_FILE), y)
+                    CONFIG_MALI_FENCE_DEBUG ?= y
+                else
+                    CONFIG_MALI_FENCE_DEBUG = n
+                endif
+            endif
+        else
+            # Prevent misuse when CONFIG_MALI_DEBUG=n
+            CONFIG_MALI_MIDGARD_ENABLE_TRACE = n
+            CONFIG_MALI_SYSTEM_TRACE = n
+            CONFIG_MALI_FENCE_DEBUG = n
+        endif
+    else
+        # Prevent misuse when CONFIG_MALI_EXPERT=n
+        CONFIG_MALI_CORESTACK = n
+        CONFIG_MALI_2MB_ALLOC = n
+        CONFIG_MALI_PWRSOFT_765 = n
+        CONFIG_MALI_MEMORY_FULLY_BACKED = n
+        CONFIG_MALI_JOB_DUMP = n
+        CONFIG_MALI_NO_MALI = n
+        CONFIG_MALI_REAL_HW = y
+        CONFIG_MALI_ERROR_INJECT = n
+        CONFIG_MALI_HW_ERRATA_1485982_NOT_AFFECTED = n
+        CONFIG_MALI_HW_ERRATA_1485982_USE_CLOCK_ALTERNATIVE = n
+        CONFIG_MALI_PRFCNT_SET_SELECT_VIA_DEBUG_FS = n
+        CONFIG_MALI_DEBUG = n
+        CONFIG_MALI_MIDGARD_ENABLE_TRACE = n
+        CONFIG_MALI_SYSTEM_TRACE = n
+        CONFIG_MALI_FENCE_DEBUG = n
+    endif
+
+    ifeq ($(CONFIG_MALI_DEBUG), y)
+        CONFIG_MALI_KUTF ?= y
+        ifeq ($(CONFIG_MALI_KUTF), y)
+            CONFIG_MALI_KUTF_IRQ_TEST ?= y
+            CONFIG_MALI_KUTF_CLK_RATE_TRACE ?= y
+            CONFIG_MALI_KUTF_MGM_INTEGRATION_TEST ?= y
+        else
+            # Prevent misuse when CONFIG_MALI_KUTF=n
+            CONFIG_MALI_KUTF_IRQ_TEST = n
+            CONFIG_MALI_KUTF_CLK_RATE_TRACE = n
+            CONFIG_MALI_KUTF_MGM_INTEGRATION_TEST = n
+        endif
+    else
+        # Prevent misuse when CONFIG_MALI_DEBUG=n
+        CONFIG_MALI_KUTF = n
+        CONFIG_MALI_KUTF_IRQ_TEST = n
+        CONFIG_MALI_KUTF_CLK_RATE_TRACE = n
+        CONFIG_MALI_KUTF_MGM_INTEGRATION_TEST = n
+    endif
+else
+    # Prevent misuse when CONFIG_MALI_MIDGARD=n
+    CONFIG_MALI_ARBITRATION = n
+    CONFIG_MALI_ARBITER_MODULES = n
+    CONFIG_MALI_GPU_POWER_MODULES = n
+    CONFIG_MALI_KUTF = n
+    CONFIG_MALI_KUTF_IRQ_TEST = n
+    CONFIG_MALI_KUTF_CLK_RATE_TRACE = n
+    CONFIG_MALI_KUTF_MGM_INTEGRATION_TEST = n
+endif
+
+# All Mali CONFIG should be listed here
+CONFIGS := \
+    CONFIG_MALI_MIDGARD \
+    CONFIG_MALI_CSF_SUPPORT \
+    CONFIG_MALI_GATOR_SUPPORT \
+    CONFIG_MALI_DMA_FENCE \
+    CONFIG_MALI_ARBITER_SUPPORT \
+    CONFIG_MALI_ARBITRATION \
+    CONFIG_MALI_ARBITER_MODULES \
+    CONFIG_MALI_GPU_POWER_MODULES \
+    CONFIG_MALI_PARTITION_MANAGER \
+    CONFIG_MALI_REAL_HW \
+    CONFIG_MALI_GEM5_BUILD \
+    CONFIG_MALI_DEVFREQ \
+    CONFIG_MALI_MIDGARD_DVFS \
+    CONFIG_MALI_DMA_BUF_MAP_ON_DEMAND \
+    CONFIG_MALI_DMA_BUF_LEGACY_COMPAT \
+    CONFIG_MALI_EXPERT \
+    CONFIG_MALI_CORESTACK \
+    CONFIG_MALI_2MB_ALLOC \
+    CONFIG_MALI_PWRSOFT_765 \
+    CONFIG_MALI_MEMORY_FULLY_BACKED \
+    CONFIG_MALI_JOB_DUMP \
+    CONFIG_MALI_NO_MALI \
+    CONFIG_MALI_ERROR_INJECT \
+    CONFIG_MALI_HW_ERRATA_1485982_NOT_AFFECTED \
+    CONFIG_MALI_HW_ERRATA_1485982_USE_CLOCK_ALTERNATIVE \
+    CONFIG_MALI_PRFCNT_SET_PRIMARY \
+    CONFIG_MALI_PRFCNT_SET_SECONDARY \
+    CONFIG_MALI_PRFCNT_SET_TERTIARY \
+    CONFIG_MALI_PRFCNT_SET_SELECT_VIA_DEBUG_FS \
+    CONFIG_MALI_DEBUG \
+    CONFIG_MALI_MIDGARD_ENABLE_TRACE \
+    CONFIG_MALI_SYSTEM_TRACE \
+    CONFIG_MALI_FENCE_DEBUG \
+    CONFIG_MALI_KUTF \
+    CONFIG_MALI_KUTF_IRQ_TEST \
+    CONFIG_MALI_KUTF_CLK_RATE_TRACE \
+    CONFIG_MALI_KUTF_MGM_INTEGRATION_TEST \
+    CONFIG_MALI_XEN
+
+
+#
+# MAKE_ARGS to pass the custom CONFIGs on out-of-tree build
+#
+# Generate the list of CONFIGs and values.
+# $(value config) is the name of the CONFIG option.
+# $(value $(value config)) is its value (y, m).
+# When the CONFIG is not set to y or m, it defaults to n.
+MAKE_ARGS := $(foreach config,$(CONFIGS), \
+                    $(if $(filter y m,$(value $(value config))), \
+                        $(value config)=$(value $(value config)), \
+                        $(value config)=n))
+
+MAKE_ARGS += CONFIG_MALI_PLATFORM_NAME=$(CONFIG_MALI_PLATFORM_NAME)
+
+#
+# EXTRA_CFLAGS to define the custom CONFIGs on out-of-tree build
+#
+# Generate the list of CONFIGs defines with values from CONFIGS.
+# $(value config) is the name of the CONFIG option.
+# When set to y or m, the CONFIG gets defined to 1.
+EXTRA_CFLAGS := $(foreach config,$(CONFIGS), \
+                    $(if $(filter y m,$(value $(value config))), \
+                        -D$(value config)=1))
+
+EXTRA_CFLAGS += -DCONFIG_MALI_PLATFORM_NAME=$(CONFIG_MALI_PLATFORM_NAME)
+
+#
+# KBUILD_EXTRA_SYMBOLS to prevent warnings about unknown functions
+#
+
+# The following were added to align with W=1 in scripts/Makefile.extrawarn
+# from the Linux source tree
+KBUILD_CFLAGS += -Wall -Werror
+KBUILD_CFLAGS += -Wextra -Wunused -Wno-unused-parameter
+KBUILD_CFLAGS += -Wmissing-declarations
+KBUILD_CFLAGS += -Wmissing-format-attribute
+KBUILD_CFLAGS += -Wmissing-prototypes
+KBUILD_CFLAGS += -Wold-style-definition
+KBUILD_CFLAGS += -Wmissing-include-dirs
+# An error will be reported when assign the rvalues to KBUILD_CFLAGS directly.
+# So the work-around scheme is adopted, that is: using temporary variables to
+# receive the following four rvalues, and then assigning them to KBUILD_CFLAGS.
+TEMPORARY_CFLAGS := $(call cc-option, -Wunused-but-set-variable)
+TEMPORARY_CFLAGS += $(call cc-option, -Wunused-const-variable)
+TEMPORARY_CFLAGS += $(call cc-option, -Wpacked-not-aligned)
+TEMPORARY_CFLAGS += $(call cc-option, -Wstringop-truncation)
+KBUILD_CFLAGS += $(TEMPORARY_CFLAGS)
+$(info $(KBUILD_CFLAGS))
+
+# The following turn off the warnings enabled by -Wextra
+KBUILD_CFLAGS += -Wno-missing-field-initializers
+KBUILD_CFLAGS += -Wno-sign-compare
+KBUILD_CFLAGS += -Wno-type-limits
+
+KBUILD_CPPFLAGS += -DKBUILD_EXTRA_WARN1
+
+all:
+	$(MAKE) -C $(KDIR) M=$(CURDIR) $(MAKE_ARGS) EXTRA_CFLAGS="$(EXTRA_CFLAGS)" KBUILD_EXTRA_SYMBOLS="$(EXTRA_SYMBOLS)" modules
+
+modules_install:
+	$(MAKE) -C $(KDIR) M=$(CURDIR) $(MAKE_ARGS) modules_install
+
+clean:
+	$(MAKE) -C $(KDIR) M=$(CURDIR) $(MAKE_ARGS) clean

diff --git a/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/Mconfig b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/Mconfig
new file mode 100644
index 0000000..3ec3f55
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/Mconfig

@@ -0,0 +1,347 @@
+# SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
+#
+# (C) COPYRIGHT 2012-2022 ARM Limited. All rights reserved.
+#
+# This program is free software and is provided to you under the terms of the
+# GNU General Public License version 2 as published by the Free Software
+# Foundation, and any use by you of this program is subject to the terms
+# of such GNU license.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, you can access it online at
+# http://www.gnu.org/licenses/gpl-2.0.html.
+#
+#
+
+menuconfig MALI_MIDGARD
+	bool "Mali Midgard series support"
+	default y
+	help
+	  Enable this option to build support for a ARM Mali Midgard GPU.
+
+	  To compile this driver as a module, choose M here:
+	  this will generate a single module, called mali_kbase.
+
+config MALI_PLATFORM_NAME
+	depends on MALI_MIDGARD
+	string "Platform name"
+	default "hisilicon" if PLATFORM_HIKEY960
+	default "hisilicon" if PLATFORM_HIKEY970
+	default "devicetree"
+	help
+	  Enter the name of the desired platform configuration directory to
+	  include in the build. 'platform/$(MALI_PLATFORM_NAME)/Kbuild' must
+	  exist.
+
+	  When PLATFORM_CUSTOM is set, this needs to be set manually to
+	  pick up the desired platform files.
+
+config MALI_REAL_HW
+	bool
+	depends on MALI_MIDGARD
+	default y
+	default n if NO_MALI
+
+config MALI_PLATFORM_DT_PIN_RST
+	bool "Enable Juno GPU Pin reset"
+	depends on MALI_MIDGARD
+	default n
+	default y if BUSLOG
+	help
+	  Enables support for GPUs pin reset on Juno platforms.
+
+config MALI_CSF_SUPPORT
+	bool "Enable Mali CSF based GPU support"
+	depends on MALI_MIDGARD
+	default y if GPU_HAS_CSF
+	help
+	  Enables support for CSF based GPUs.
+
+config MALI_DEVFREQ
+	bool "Enable devfreq support for Mali"
+	depends on MALI_MIDGARD
+	default y
+	help
+	  Support devfreq for Mali.
+
+	  Using the devfreq framework and, by default, the simple on-demand
+	  governor, the frequency of Mali will be dynamically selected from the
+	  available OPPs.
+
+config MALI_MIDGARD_DVFS
+	bool "Enable legacy DVFS"
+	depends on MALI_MIDGARD && !MALI_DEVFREQ
+	default n
+	help
+	  Choose this option to enable legacy DVFS in the Mali Midgard DDK.
+
+config MALI_GATOR_SUPPORT
+	bool "Enable Streamline tracing support"
+	depends on MALI_MIDGARD && !BACKEND_USER
+	default y
+	help
+	  Enables kbase tracing used by the Arm Streamline Performance Analyzer.
+	  The tracepoints are used to derive GPU activity charts in Streamline.
+
+config MALI_MIDGARD_ENABLE_TRACE
+	bool "Enable kbase tracing"
+	depends on MALI_MIDGARD
+	default y if MALI_DEBUG
+	default n
+	help
+	  Enables tracing in kbase. Trace log available through
+	  the "mali_trace" debugfs file, when the CONFIG_DEBUG_FS is enabled
+
+config MALI_DMA_FENCE
+	bool "Enable DMA_BUF fence support for Mali"
+	depends on MALI_MIDGARD
+	default n
+	help
+	  Support DMA_BUF fences for Mali.
+
+	  This option should only be enabled if the Linux Kernel has built in
+	  support for DMA_BUF fences.
+
+config MALI_ARBITER_SUPPORT
+	bool "Enable arbiter support for Mali"
+	depends on MALI_MIDGARD && !MALI_CSF_SUPPORT
+	default n
+	help
+	  Enable support for the arbiter interface in the driver.
+	  This allows an external arbiter to manage driver access
+	  to GPU hardware in a virtualized environment
+
+	  If unsure, say N.
+
+config DMA_BUF_SYNC_IOCTL_SUPPORTED
+	bool "Enable Kernel DMA buffers support DMA_BUF_IOCTL_SYNC"
+	depends on MALI_MIDGARD && BACKEND_KERNEL
+	default y
+
+config MALI_DMA_BUF_MAP_ON_DEMAND
+	bool "Enable map imported dma-bufs on demand"
+	depends on MALI_MIDGARD
+	default n
+	default y if !DMA_BUF_SYNC_IOCTL_SUPPORTED
+	help
+	  This option caused kbase to set up the GPU mapping of imported
+	  dma-buf when needed to run atoms. This is the legacy behavior.
+
+	  This is intended for testing and the option will get removed in the
+	  future.
+
+config MALI_DMA_BUF_LEGACY_COMPAT
+	bool "Enable legacy compatibility cache flush on dma-buf map"
+	depends on MALI_MIDGARD && !MALI_DMA_BUF_MAP_ON_DEMAND
+	default n
+	help
+	  This option enables compatibility with legacy dma-buf mapping
+	  behavior, then the dma-buf is mapped on import, by adding cache
+	  maintenance where MALI_DMA_BUF_MAP_ON_DEMAND would do the mapping,
+	  including a cache flush.
+
+	  This option might work-around issues related to missing cache
+	  flushes in other drivers. This only has an effect for clients using
+	  UK 11.18 or older. For later UK versions it is not possible.
+
+menuconfig MALI_EXPERT
+	depends on MALI_MIDGARD
+	bool "Enable Expert Settings"
+	default y
+	help
+	  Enabling this option and modifying the default settings may produce
+	  a driver with performance or other limitations.
+
+config MALI_2MB_ALLOC
+	bool "Attempt to allocate 2MB pages"
+	depends on MALI_MIDGARD && MALI_EXPERT
+	default n
+	help
+	  Rather than allocating all GPU memory page-by-page, attempt to
+	  allocate 2MB pages from the kernel. This reduces TLB pressure and
+	  helps to prevent memory fragmentation.
+
+	  If in doubt, say N
+
+config MALI_MEMORY_FULLY_BACKED
+	bool "Enable memory fully physically-backed"
+	depends on MALI_MIDGARD && MALI_EXPERT
+	default n
+	help
+	  This option enables full physical backing of all virtual
+	  memory allocations in the kernel. Notice that this build
+	  option only affects allocations of grow-on-GPU-page-fault
+	  memory.
+
+config MALI_CORESTACK
+	bool "Enable support of GPU core stack power control"
+	depends on MALI_MIDGARD && MALI_EXPERT
+	default n
+	help
+	  Enabling this feature on supported GPUs will let the driver powering
+	  on/off the GPU core stack independently without involving the Power
+	  Domain Controller. This should only be enabled on platforms which
+	  integration of the PDC to the Mali GPU is known to be problematic.
+	  This feature is currently only supported on t-Six and t-HEx GPUs.
+
+	  If unsure, say N.
+
+config MALI_FW_CORE_DUMP
+	bool "Enable support for FW core dump"
+	depends on MALI_MIDGARD && MALI_EXPERT && MALI_CSF_SUPPORT
+	default n
+	help
+	  Adds ability to request firmware core dump
+
+	  Example:
+	  * To explicitly request core dump:
+		echo 1 >/sys/kernel/debug/mali0/fw_core_dump
+	  * To output current core dump (after explicitly requesting a core dump,
+	    or kernel driver reported an internal firmware error):
+                cat /sys/kernel/debug/mali0/fw_core_dump
+
+choice
+	prompt "Error injection level"
+	depends on MALI_MIDGARD && MALI_EXPERT
+	default MALI_ERROR_INJECT_NONE
+	help
+	  Enables insertion of errors to test module failure and recovery mechanisms.
+
+config MALI_ERROR_INJECT_NONE
+	bool "disabled"
+	depends on MALI_MIDGARD && MALI_EXPERT
+	help
+	  Error injection is disabled.
+
+config MALI_ERROR_INJECT_TRACK_LIST
+	bool "error track list"
+	depends on MALI_MIDGARD && MALI_EXPERT && NO_MALI
+	help
+	  Errors to inject are pre-configured by the user.
+
+config MALI_ERROR_INJECT_RANDOM
+	bool "random error injection"
+	depends on MALI_MIDGARD && MALI_EXPERT && NO_MALI
+	help
+	  Injected errors are random, rather than user-driven.
+
+endchoice
+
+config MALI_ERROR_INJECT_ON
+	string
+	depends on MALI_MIDGARD && MALI_EXPERT
+	default "0" if MALI_ERROR_INJECT_NONE
+	default "1" if MALI_ERROR_INJECT_TRACK_LIST
+	default "2" if MALI_ERROR_INJECT_RANDOM
+
+config MALI_ERROR_INJECT
+	bool
+	depends on MALI_MIDGARD && MALI_EXPERT
+	default y if !MALI_ERROR_INJECT_NONE
+
+config MALI_GEM5_BUILD
+	bool "Enable build of Mali kernel driver for GEM5"
+	depends on MALI_MIDGARD && MALI_EXPERT
+	default n
+	help
+	  This option is to do a Mali GEM5 build.
+	  If unsure, say N.
+
+config MALI_DEBUG
+	bool "Enable debug build"
+	depends on MALI_MIDGARD && MALI_EXPERT
+	default y if DEBUG
+	default n
+	help
+	  Select this option for increased checking and reporting of errors.
+
+config MALI_FENCE_DEBUG
+	bool "Enable debug sync fence usage"
+	depends on MALI_MIDGARD && MALI_EXPERT
+	default y if MALI_DEBUG
+	help
+	  Select this option to enable additional checking and reporting on the
+	  use of sync fences in the Mali driver.
+
+	  This will add a 3s timeout to all sync fence waits in the Mali
+	  driver, so that when work for Mali has been waiting on a sync fence
+	  for a long time a debug message will be printed, detailing what fence
+	  is causing the block, and which dependent Mali atoms are blocked as a
+	  result of this.
+
+	  The timeout can be changed at runtime through the js_soft_timeout
+	  device attribute, where the timeout is specified in milliseconds.
+
+config MALI_SYSTEM_TRACE
+	bool "Enable system event tracing support"
+	depends on MALI_MIDGARD && MALI_EXPERT
+	default y if MALI_DEBUG
+	default n
+	help
+	  Choose this option to enable system trace events for each
+	  kbase event. This is typically used for debugging but has
+	  minimal overhead when not in use. Enable only if you know what
+	  you are doing.
+
+# Instrumentation options.
+
+# config MALI_PRFCNT_SET_PRIMARY exists in the Kernel Kconfig but is configured using CINSTR_PRIMARY_HWC in Mconfig.
+# config MALI_PRFCNT_SET_SECONDARY exists in the Kernel Kconfig but is configured using CINSTR_SECONDARY_HWC in Mconfig.
+# config MALI_PRFCNT_SET_TERTIARY exists in the Kernel Kconfig but is configured using CINSTR_TERTIARY_HWC in Mconfig.
+# config MALI_PRFCNT_SET_SELECT_VIA_DEBUG_FS exists in the Kernel Kconfig but is configured using CINSTR_HWC_SET_SELECT_VIA_DEBUG_FS in Mconfig.
+
+config MALI_JOB_DUMP
+	bool "Enable system level support needed for job dumping"
+	depends on MALI_MIDGARD && MALI_EXPERT
+	default n
+	help
+	  Choose this option to enable system level support needed for
+	  job dumping. This is typically used for instrumentation but has
+	  minimal overhead when not in use. Enable only if you know what
+	  you are doing.
+
+config MALI_PWRSOFT_765
+	bool "Enable workaround for PWRSOFT-765"
+	depends on MALI_MIDGARD && MALI_EXPERT
+	default n
+	help
+	  PWRSOFT-765 fixes devfreq cooling devices issues. The fix was merged
+	  in kernel v4.10, however if backported into the kernel then this
+	  option must be manually selected.
+
+	  If using kernel >= v4.10 then say N, otherwise if devfreq cooling
+	  changes have been backported say Y to avoid compilation errors.
+
+
+config MALI_HW_ERRATA_1485982_NOT_AFFECTED
+	bool "Disable workaround for BASE_HW_ISSUE_GPU2017_1336"
+	depends on MALI_MIDGARD && MALI_EXPERT
+	default n
+	default y if PLATFORM_JUNO
+	help
+	  This option disables the default workaround for GPU2017-1336. The
+	  workaround keeps the L2 cache powered up except for powerdown and reset.
+
+	  The workaround introduces a limitation that will prevent the running of
+	  protected mode content on fully coherent platforms, as the switch to IO
+	  coherency mode requires the L2 to be turned off.
+
+config MALI_HW_ERRATA_1485982_USE_CLOCK_ALTERNATIVE
+	bool "Use alternative workaround for BASE_HW_ISSUE_GPU2017_1336"
+	depends on MALI_MIDGARD && MALI_EXPERT && !MALI_HW_ERRATA_1485982_NOT_AFFECTED
+	default n
+	help
+	  This option uses an alternative workaround for GPU2017-1336. Lowering
+	  the GPU clock to a, platform specific, known good frequency before
+	  powering down the L2 cache. The clock can be specified in the device
+	  tree using the property, opp-mali-errata-1485982. Otherwise the
+	  slowest clock will be selected.
+
+
+source "kernel/drivers/gpu/arm/midgard/arbitration/Mconfig"
+source "kernel/drivers/gpu/arm/midgard/tests/Mconfig"

diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/arbiter/Kbuild b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/arbiter/Kbuild
similarity index 100%
copy from dvalin/kernel/drivers/gpu/arm/midgard/arbiter/Kbuild
copy to bifrost/r38p2/kernel/drivers/gpu/arm/midgard/arbiter/Kbuild


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbif.c b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbif.c
similarity index 100%
copy from dvalin/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbif.c
copy to bifrost/r38p2/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbif.c


diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbif.h b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbif.h
similarity index 100%
copy from dvalin/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbif.h
copy to bifrost/r38p2/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbif.h


diff --git a/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbiter_defs.h b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbiter_defs.h
new file mode 100644
index 0000000..1c4901b
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbiter_defs.h

@@ -0,0 +1,76 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
+/*
+ *
+ * (C) COPYRIGHT 2019-2022 ARM Limited. All rights reserved.
+ *
+ * This program is free software and is provided to you under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation, and any use by you of this program is subject to the terms
+ * of such GNU license.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, you can access it online at
+ * http://www.gnu.org/licenses/gpl-2.0.html.
+ *
+ */
+
+/**
+ * DOC: Mali structures define to support arbitration feature
+ */
+
+#ifndef _MALI_KBASE_ARBITER_DEFS_H_
+#define _MALI_KBASE_ARBITER_DEFS_H_
+
+#include "mali_kbase_arbiter_pm.h"
+
+/**
+ * struct kbase_arbiter_vm_state - Struct representing the state and containing the
+ *                      data of pm work
+ * @kbdev:           Pointer to kbase device structure (must be a valid pointer)
+ * @vm_state_lock:   The lock protecting the VM state when arbiter is used.
+ *                   This lock must also be held whenever the VM state is being
+ *                   transitioned
+ * @vm_state_wait:   Wait queue set when GPU is granted
+ * @vm_state:        Current state of VM
+ * @vm_arb_wq:       Work queue for resuming or stopping work on the GPU for use
+ *                   with the Arbiter
+ * @vm_suspend_work: Work item for vm_arb_wq to stop current work on GPU
+ * @vm_resume_work:  Work item for vm_arb_wq to resume current work on GPU
+ * @vm_arb_starting: Work queue resume in progress
+ * @vm_arb_stopping: Work queue suspend in progress
+ * @interrupts_installed: Flag set when interrupts are installed
+ * @vm_request_timer: Timer to monitor GPU request
+ */
+struct kbase_arbiter_vm_state {
+	struct kbase_device *kbdev;
+	struct mutex vm_state_lock;
+	wait_queue_head_t vm_state_wait;
+	enum kbase_vm_state vm_state;
+	struct workqueue_struct *vm_arb_wq;
+	struct work_struct vm_suspend_work;
+	struct work_struct vm_resume_work;
+	bool vm_arb_starting;
+	bool vm_arb_stopping;
+	bool interrupts_installed;
+	struct hrtimer vm_request_timer;
+};
+
+/**
+ * struct kbase_arbiter_device - Representing an instance of arbiter device,
+ *                               allocated from the probe method of Mali driver
+ * @arb_if:                 Pointer to the arbiter interface device
+ * @arb_dev:                Pointer to the arbiter device
+ * @arb_freq:               GPU clock frequency retrieved from arbiter.
+ */
+struct kbase_arbiter_device {
+	struct arbiter_if_dev *arb_if;
+	struct device *arb_dev;
+	struct kbase_arbiter_freq arb_freq;
+};
+
+#endif /* _MALI_KBASE_ARBITER_DEFS_H_ */

diff --git a/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbiter_interface.h b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbiter_interface.h
new file mode 100644
index 0000000..a0ca1cc
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbiter_interface.h

@@ -0,0 +1,170 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
+/*
+ *
+ * (C) COPYRIGHT 2019-2022 ARM Limited. All rights reserved.
+ *
+ * This program is free software and is provided to you under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation, and any use by you of this program is subject to the terms
+ * of such GNU license.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, you can access it online at
+ * http://www.gnu.org/licenses/gpl-2.0.html.
+ *
+ */
+
+/**
+ * DOC: Defines the Mali arbiter interface
+ */
+
+#ifndef _MALI_KBASE_ARBITER_INTERFACE_H_
+#define _MALI_KBASE_ARBITER_INTERFACE_H_
+
+/**
+ * DOC: Mali arbiter interface version
+ *
+ * This specifies the current version of the configuration interface. Whenever
+ * the arbiter interface changes, so that integration effort is required, the
+ * version number will be increased. Each configuration must make an effort
+ * to check that it implements the correct version.
+ *
+ * Version history:
+ * 1 - Added the Mali arbiter configuration interface.
+ * 2 - Strip out reference code from header
+ * 3 - Removed DVFS utilization interface (DVFS moved to arbiter side)
+ * 4 - Added max_config support
+ * 5 - Added GPU clock frequency reporting support from arbiter
+ */
+#define MALI_KBASE_ARBITER_INTERFACE_VERSION 5
+
+/**
+ * DOC: NO_FREQ is used in case platform doesn't support reporting frequency
+ */
+#define NO_FREQ 0
+
+struct arbiter_if_dev;
+
+/**
+ * struct arbiter_if_arb_vm_ops - Interface to communicate messages to VM
+ *
+ * @arb_vm_gpu_stop: Callback to ask VM to stop using GPU.
+ *                   dev: The arbif kernel module device.
+ *
+ *                   Informs KBase to stop using the GPU as soon as possible.
+ *                   Note: Once the driver is no longer using the GPU, a call
+ *                   to vm_arb_gpu_stopped is expected by the arbiter.
+ * @arb_vm_gpu_granted: Callback to indicate that GPU has been granted to VM.
+ *                      dev: The arbif kernel module device.
+ *
+ *                      Informs KBase that the GPU can now be used by the VM.
+ * @arb_vm_gpu_lost: Callback to indicate that VM has lost the GPU.
+ *                   dev: The arbif kernel module device.
+ *
+ *                   This is called if KBase takes too long to respond to the
+ *                   arbiter stop request.
+ *                   Once this is called, KBase will assume that access to the
+ *                   GPU has been lost and will fail all running jobs and
+ *                   reset its internal state.
+ *                   If successful, will respond with a vm_arb_gpu_stopped
+ *                   message.
+ * @arb_vm_max_config: Callback to send the max config info to the VM.
+ *                     dev: The arbif kernel module device.
+ *                     max_l2_slices: The maximum number of L2 slices.
+ *                     max_core_mask: The largest core mask.
+ *
+ *                     Informs KBase the maximum resources that can be
+ *                     allocated to the partition in use.
+ * @arb_vm_update_freq: Callback to notify that GPU clock frequency has been
+ *                      updated.
+ *                      dev: The arbif kernel module device.
+ *                      freq: GPU clock frequency value reported from arbiter
+ *
+ *                      Informs KBase that the GPU clock frequency has been updated.
+ *
+ * This struct contains callbacks used to deliver messages
+ * from the arbiter to the corresponding VM.
+ * Note that calls into these callbacks may have synchronous calls back into
+ * the arbiter arbiter_if_vm_arb_ops callbacks below.
+ * For example vm_arb_gpu_stopped() may be called as a side effect of
+ * arb_vm_gpu_stop() being called here.
+ */
+struct arbiter_if_arb_vm_ops {
+	void (*arb_vm_gpu_stop)(struct device *dev);
+	void (*arb_vm_gpu_granted)(struct device *dev);
+	void (*arb_vm_gpu_lost)(struct device *dev);
+	void (*arb_vm_max_config)(struct device *dev, uint32_t max_l2_slices,
+				  uint32_t max_core_mask);
+	void (*arb_vm_update_freq)(struct device *dev, uint32_t freq);
+};
+
+/**
+ * struct arbiter_if_vm_arb_ops - Interface to communicate messages to arbiter
+ *
+ * @vm_arb_register_dev: Callback to register VM device driver callbacks.
+ *                       arbif_dev: The arbiter interface to register
+ *                                  with for device callbacks
+ *                       dev: The device structure to supply in the callbacks.
+ *                       ops: The callbacks that the device driver supports
+ *                            (none are optional).
+ *
+ *                       Returns
+ *                       0		- successful.
+ *                       -EINVAL	- invalid argument.
+ *                       -EPROBE_DEFER	- module dependencies are not yet
+ *                                        available.
+ * @vm_arb_unregister_dev: Callback to unregister VM device driver callbacks.
+ *                         arbif_dev: The arbiter interface to unregistering
+ *                                    from.
+ * @vm_arb_get_max_config: Callback to Request the max config from the Arbiter.
+ *                         arbif_dev: The arbiter interface to issue the
+ *                                    request to.
+ * @vm_arb_gpu_request: Callback to ask the arbiter interface for GPU access.
+ *                      arbif_dev: The arbiter interface to issue the request
+ *                                 to.
+ * @vm_arb_gpu_active: Callback to inform arbiter that driver has gone active.
+ *                     arbif_dev: The arbiter interface device to notify.
+ * @vm_arb_gpu_idle: Callback to inform the arbiter that driver has gone idle.
+ *                   arbif_dev: The arbiter interface device to notify.
+ * @vm_arb_gpu_stopped: Callback to inform arbiter that driver has stopped
+ *                      using the GPU
+ *                      arbif_dev: The arbiter interface device to notify.
+ *                      gpu_required: The GPU is still needed to do more work.
+ *
+ * This struct contains callbacks used to request operations
+ * from the VM to the arbiter.
+ * Note that we must not make any synchronous calls back in to the VM
+ * (via arbiter_if_arb_vm_ops above) in the context of these callbacks.
+ */
+struct arbiter_if_vm_arb_ops {
+	int (*vm_arb_register_dev)(struct arbiter_if_dev *arbif_dev,
+		struct device *dev, struct arbiter_if_arb_vm_ops *ops);
+	void (*vm_arb_unregister_dev)(struct arbiter_if_dev *arbif_dev);
+	void (*vm_arb_get_max_config)(struct arbiter_if_dev *arbif_dev);
+	void (*vm_arb_gpu_request)(struct arbiter_if_dev *arbif_dev);
+	void (*vm_arb_gpu_active)(struct arbiter_if_dev *arbif_dev);
+	void (*vm_arb_gpu_idle)(struct arbiter_if_dev *arbif_dev);
+	void (*vm_arb_gpu_stopped)(struct arbiter_if_dev *arbif_dev,
+		u8 gpu_required);
+};
+
+/**
+ * struct arbiter_if_dev - Arbiter Interface
+ * @vm_ops: Callback functions for connecting KBase with
+ *          arbiter interface device.
+ * @priv_data: Internal arbif data not used by KBASE.
+ *
+ * Arbiter Interface Kernel Module State used for linking KBase
+ * with an arbiter interface platform device
+ */
+struct arbiter_if_dev {
+	struct arbiter_if_vm_arb_ops vm_ops;
+	void *priv_data;
+};
+
+#endif /* _MALI_KBASE_ARBITER_INTERFACE_H_ */

diff --git a/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbiter_pm.c b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbiter_pm.c
new file mode 100644
index 0000000..ede3c3b
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbiter_pm.c

@@ -0,0 +1,1138 @@
+// SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
+/*
+ *
+ * (C) COPYRIGHT 2019-2022 ARM Limited. All rights reserved.
+ *
+ * This program is free software and is provided to you under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation, and any use by you of this program is subject to the terms
+ * of such GNU license.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, you can access it online at
+ * http://www.gnu.org/licenses/gpl-2.0.html.
+ *
+ */
+
+/**
+ * DOC: Mali arbiter power manager state machine and APIs
+ */
+
+#include <mali_kbase.h>
+#include <mali_kbase_pm.h>
+#include <backend/gpu/mali_kbase_irq_internal.h>
+#include <backend/gpu/mali_kbase_pm_internal.h>
+#include <tl/mali_kbase_tracepoints.h>
+#include <mali_kbase_gpuprops.h>
+
+/* A dmesg warning will occur if the GPU is not granted
+ * after the following time (in milliseconds) has elapsed.
+ */
+#define GPU_REQUEST_TIMEOUT 1000
+#define KHZ_TO_HZ 1000
+
+#define MAX_L2_SLICES_MASK		0xFF
+
+/* Maximum time in ms, before deferring probe incase
+ * GPU_GRANTED message is not received
+ */
+static int gpu_req_timeout = 1;
+module_param(gpu_req_timeout, int, 0644);
+MODULE_PARM_DESC(gpu_req_timeout,
+	"On a virtualized platform, if the GPU is not granted within this time(ms) kbase will defer the probe");
+
+static void kbase_arbiter_pm_vm_wait_gpu_assignment(struct kbase_device *kbdev);
+static inline bool kbase_arbiter_pm_vm_gpu_assigned_lockheld(
+	struct kbase_device *kbdev);
+
+/**
+ * kbase_arbiter_pm_vm_state_str() - Helper function to get string
+ *                                   for kbase VM state.(debug)
+ * @state: kbase VM state
+ *
+ * Return: string representation of Kbase_vm_state
+ */
+static inline const char *kbase_arbiter_pm_vm_state_str(
+	enum kbase_vm_state state)
+{
+	switch (state) {
+	case KBASE_VM_STATE_INITIALIZING:
+		return "KBASE_VM_STATE_INITIALIZING";
+	case KBASE_VM_STATE_INITIALIZING_WITH_GPU:
+		return "KBASE_VM_STATE_INITIALIZING_WITH_GPU";
+	case KBASE_VM_STATE_SUSPENDED:
+		return "KBASE_VM_STATE_SUSPENDED";
+	case KBASE_VM_STATE_STOPPED:
+		return "KBASE_VM_STATE_STOPPED";
+	case KBASE_VM_STATE_STOPPED_GPU_REQUESTED:
+		return "KBASE_VM_STATE_STOPPED_GPU_REQUESTED";
+	case KBASE_VM_STATE_STARTING:
+		return "KBASE_VM_STATE_STARTING";
+	case KBASE_VM_STATE_IDLE:
+		return "KBASE_VM_STATE_IDLE";
+	case KBASE_VM_STATE_ACTIVE:
+		return "KBASE_VM_STATE_ACTIVE";
+	case KBASE_VM_STATE_STOPPING_IDLE:
+		return "KBASE_VM_STATE_STOPPING_IDLE";
+	case KBASE_VM_STATE_STOPPING_ACTIVE:
+		return "KBASE_VM_STATE_STOPPING_ACTIVE";
+	case KBASE_VM_STATE_SUSPEND_PENDING:
+		return "KBASE_VM_STATE_SUSPEND_PENDING";
+	case KBASE_VM_STATE_SUSPEND_WAIT_FOR_GRANT:
+		return "KBASE_VM_STATE_SUSPEND_WAIT_FOR_GRANT";
+	default:
+		KBASE_DEBUG_ASSERT(false);
+		return "[UnknownState]";
+	}
+}
+
+/**
+ * kbase_arbiter_pm_vm_event_str() - Helper function to get string
+ *                                   for kbase VM event.(debug)
+ * @evt: kbase VM state
+ *
+ * Return: String representation of Kbase_arbif_event
+ */
+static inline const char *kbase_arbiter_pm_vm_event_str(
+	enum kbase_arbif_evt evt)
+{
+	switch (evt) {
+	case KBASE_VM_GPU_INITIALIZED_EVT:
+		return "KBASE_VM_GPU_INITIALIZED_EVT";
+	case KBASE_VM_GPU_STOP_EVT:
+		return "KBASE_VM_GPU_STOP_EVT";
+	case KBASE_VM_GPU_GRANTED_EVT:
+		return "KBASE_VM_GPU_GRANTED_EVT";
+	case KBASE_VM_GPU_LOST_EVT:
+		return "KBASE_VM_GPU_LOST_EVT";
+	case KBASE_VM_OS_SUSPEND_EVENT:
+		return "KBASE_VM_OS_SUSPEND_EVENT";
+	case KBASE_VM_OS_RESUME_EVENT:
+		return "KBASE_VM_OS_RESUME_EVENT";
+	case KBASE_VM_GPU_IDLE_EVENT:
+		return "KBASE_VM_GPU_IDLE_EVENT";
+	case KBASE_VM_REF_EVENT:
+		return "KBASE_VM_REF_EVENT";
+	default:
+		KBASE_DEBUG_ASSERT(false);
+		return "[UnknownEvent]";
+	}
+}
+
+/**
+ * kbase_arbiter_pm_vm_set_state() - Sets new kbase_arbiter_vm_state
+ * @kbdev: The kbase device structure for the device (must be a valid pointer)
+ * @new_state: kbase VM new state
+ *
+ * This function sets the new state for the VM
+ */
+static void kbase_arbiter_pm_vm_set_state(struct kbase_device *kbdev,
+	enum kbase_vm_state new_state)
+{
+	struct kbase_arbiter_vm_state *arb_vm_state = kbdev->pm.arb_vm_state;
+
+	dev_dbg(kbdev->dev, "VM set_state %s -> %s",
+	kbase_arbiter_pm_vm_state_str(arb_vm_state->vm_state),
+	kbase_arbiter_pm_vm_state_str(new_state));
+
+	lockdep_assert_held(&arb_vm_state->vm_state_lock);
+	arb_vm_state->vm_state = new_state;
+	if (new_state != KBASE_VM_STATE_INITIALIZING_WITH_GPU &&
+		new_state != KBASE_VM_STATE_INITIALIZING)
+		KBASE_KTRACE_ADD(kbdev, ARB_VM_STATE, NULL, new_state);
+	wake_up(&arb_vm_state->vm_state_wait);
+}
+
+/**
+ * kbase_arbiter_pm_suspend_wq() - suspend work queue of the driver.
+ * @data: work queue
+ *
+ * Suspends work queue of the driver, when VM is in SUSPEND_PENDING or
+ * STOPPING_IDLE or STOPPING_ACTIVE state
+ */
+static void kbase_arbiter_pm_suspend_wq(struct work_struct *data)
+{
+	struct kbase_arbiter_vm_state *arb_vm_state = container_of(data,
+				struct kbase_arbiter_vm_state,
+				vm_suspend_work);
+	struct kbase_device *kbdev = arb_vm_state->kbdev;
+
+	mutex_lock(&arb_vm_state->vm_state_lock);
+	dev_dbg(kbdev->dev, ">%s\n", __func__);
+	if (arb_vm_state->vm_state == KBASE_VM_STATE_STOPPING_IDLE ||
+			arb_vm_state->vm_state ==
+					KBASE_VM_STATE_STOPPING_ACTIVE ||
+			arb_vm_state->vm_state ==
+					KBASE_VM_STATE_SUSPEND_PENDING) {
+		mutex_unlock(&arb_vm_state->vm_state_lock);
+		dev_dbg(kbdev->dev, ">kbase_pm_driver_suspend\n");
+		kbase_pm_driver_suspend(kbdev);
+		dev_dbg(kbdev->dev, "<kbase_pm_driver_suspend\n");
+		mutex_lock(&arb_vm_state->vm_state_lock);
+	}
+	mutex_unlock(&arb_vm_state->vm_state_lock);
+	dev_dbg(kbdev->dev, "<%s\n", __func__);
+}
+
+/**
+ * kbase_arbiter_pm_resume_wq() -Kbase resume work queue.
+ * @data: work item
+ *
+ * Resume work queue of the driver when VM is in STARTING state,
+ * else if its in STOPPING_ACTIVE will request a stop event.
+ */
+static void kbase_arbiter_pm_resume_wq(struct work_struct *data)
+{
+	struct kbase_arbiter_vm_state *arb_vm_state = container_of(data,
+				struct kbase_arbiter_vm_state,
+				vm_resume_work);
+	struct kbase_device *kbdev = arb_vm_state->kbdev;
+
+	mutex_lock(&arb_vm_state->vm_state_lock);
+	dev_dbg(kbdev->dev, ">%s\n", __func__);
+	arb_vm_state->vm_arb_starting = true;
+	if (arb_vm_state->vm_state == KBASE_VM_STATE_STARTING) {
+		mutex_unlock(&arb_vm_state->vm_state_lock);
+		dev_dbg(kbdev->dev, ">kbase_pm_driver_resume\n");
+		kbase_pm_driver_resume(kbdev, true);
+		dev_dbg(kbdev->dev, "<kbase_pm_driver_resume\n");
+		mutex_lock(&arb_vm_state->vm_state_lock);
+	} else if (arb_vm_state->vm_state == KBASE_VM_STATE_STOPPING_ACTIVE) {
+		kbase_arbiter_pm_vm_stopped(kbdev);
+	}
+	arb_vm_state->vm_arb_starting = false;
+	mutex_unlock(&arb_vm_state->vm_state_lock);
+	KBASE_TLSTREAM_TL_ARBITER_STARTED(kbdev, kbdev);
+	dev_dbg(kbdev->dev, "<%s\n", __func__);
+}
+
+/**
+ * request_timer_callback() - Issue warning on request timer expiration
+ * @timer: Request hr timer data
+ *
+ * Called when the Arbiter takes too long to grant the GPU after a
+ * request has been made.  Issues a warning in dmesg.
+ *
+ * Return: Always returns HRTIMER_NORESTART
+ */
+static enum hrtimer_restart request_timer_callback(struct hrtimer *timer)
+{
+	struct kbase_arbiter_vm_state *arb_vm_state = container_of(timer,
+			struct kbase_arbiter_vm_state, vm_request_timer);
+
+	KBASE_DEBUG_ASSERT(arb_vm_state);
+	KBASE_DEBUG_ASSERT(arb_vm_state->kbdev);
+
+	dev_warn(arb_vm_state->kbdev->dev,
+		"Still waiting for GPU to be granted from Arbiter after %d ms\n",
+		GPU_REQUEST_TIMEOUT);
+	return HRTIMER_NORESTART;
+}
+
+/**
+ * start_request_timer() - Start a timer after requesting GPU
+ * @kbdev: The kbase device structure for the device (must be a valid pointer)
+ *
+ * Start a timer to track when kbase is waiting for the GPU from the
+ * Arbiter.  If the timer expires before GPU is granted, a warning in
+ * dmesg will be issued.
+ */
+static void start_request_timer(struct kbase_device *kbdev)
+{
+	struct kbase_arbiter_vm_state *arb_vm_state = kbdev->pm.arb_vm_state;
+
+	hrtimer_start(&arb_vm_state->vm_request_timer,
+			HR_TIMER_DELAY_MSEC(GPU_REQUEST_TIMEOUT),
+			HRTIMER_MODE_REL);
+}
+
+/**
+ * cancel_request_timer() - Stop the request timer
+ * @kbdev: The kbase device structure for the device (must be a valid pointer)
+ *
+ * Stops the request timer once GPU has been granted.  Safe to call
+ * even if timer is no longer running.
+ */
+static void cancel_request_timer(struct kbase_device *kbdev)
+{
+	struct kbase_arbiter_vm_state *arb_vm_state = kbdev->pm.arb_vm_state;
+
+	hrtimer_cancel(&arb_vm_state->vm_request_timer);
+}
+
+/**
+ * kbase_arbiter_pm_early_init() - Initialize arbiter for VM
+ *                                 Paravirtualized use.
+ * @kbdev: The kbase device structure for the device (must be a valid pointer)
+ *
+ * Initialize the arbiter and other required resources during the runtime
+ * and request the GPU for the VM for the first time.
+ *
+ * Return: 0 if success, or a Linux error code
+ */
+int kbase_arbiter_pm_early_init(struct kbase_device *kbdev)
+{
+	int err;
+	struct kbase_arbiter_vm_state *arb_vm_state = NULL;
+
+	arb_vm_state = kmalloc(sizeof(struct kbase_arbiter_vm_state),
+				GFP_KERNEL);
+	if (arb_vm_state == NULL)
+		return -ENOMEM;
+
+	arb_vm_state->kbdev = kbdev;
+	arb_vm_state->vm_state = KBASE_VM_STATE_INITIALIZING;
+
+	mutex_init(&arb_vm_state->vm_state_lock);
+	init_waitqueue_head(&arb_vm_state->vm_state_wait);
+	arb_vm_state->vm_arb_wq = alloc_ordered_workqueue("kbase_vm_arb_wq",
+		WQ_HIGHPRI);
+	if (!arb_vm_state->vm_arb_wq) {
+		dev_err(kbdev->dev, "Failed to allocate vm_arb workqueue\n");
+		kfree(arb_vm_state);
+		return -ENOMEM;
+	}
+	INIT_WORK(&arb_vm_state->vm_suspend_work, kbase_arbiter_pm_suspend_wq);
+	INIT_WORK(&arb_vm_state->vm_resume_work, kbase_arbiter_pm_resume_wq);
+	arb_vm_state->vm_arb_starting = false;
+	atomic_set(&kbdev->pm.gpu_users_waiting, 0);
+	hrtimer_init(&arb_vm_state->vm_request_timer, CLOCK_MONOTONIC,
+							HRTIMER_MODE_REL);
+	arb_vm_state->vm_request_timer.function =
+						request_timer_callback;
+	kbdev->pm.arb_vm_state = arb_vm_state;
+
+	err = kbase_arbif_init(kbdev);
+	if (err) {
+		dev_err(kbdev->dev, "Failed to initialise arbif module\n");
+		goto arbif_init_fail;
+	}
+
+	if (kbdev->arb.arb_if) {
+		kbase_arbif_gpu_request(kbdev);
+		dev_dbg(kbdev->dev, "Waiting for initial GPU assignment...\n");
+
+		err = wait_event_timeout(arb_vm_state->vm_state_wait,
+			arb_vm_state->vm_state ==
+					KBASE_VM_STATE_INITIALIZING_WITH_GPU,
+			msecs_to_jiffies(gpu_req_timeout));
+
+		if (!err) {
+			dev_dbg(kbdev->dev,
+			"Kbase probe Deferred after waiting %d ms to receive GPU_GRANT\n",
+			gpu_req_timeout);
+
+			err = -ENODEV;
+			goto arbif_timeout;
+		}
+
+		dev_dbg(kbdev->dev,
+			"Waiting for initial GPU assignment - done\n");
+	}
+	return 0;
+
+arbif_timeout:
+	kbase_arbiter_pm_early_term(kbdev);
+	return err;
+
+arbif_init_fail:
+	destroy_workqueue(arb_vm_state->vm_arb_wq);
+	kfree(arb_vm_state);
+	kbdev->pm.arb_vm_state = NULL;
+	return err;
+}
+
+/**
+ * kbase_arbiter_pm_early_term() - Shutdown arbiter and free resources
+ * @kbdev: The kbase device structure for the device (must be a valid pointer)
+ *
+ * Clean up all the resources
+ */
+void kbase_arbiter_pm_early_term(struct kbase_device *kbdev)
+{
+	struct kbase_arbiter_vm_state *arb_vm_state = kbdev->pm.arb_vm_state;
+
+	cancel_request_timer(kbdev);
+	mutex_lock(&arb_vm_state->vm_state_lock);
+	if (arb_vm_state->vm_state > KBASE_VM_STATE_STOPPED_GPU_REQUESTED) {
+		kbase_pm_set_gpu_lost(kbdev, false);
+		kbase_arbif_gpu_stopped(kbdev, false);
+	}
+	mutex_unlock(&arb_vm_state->vm_state_lock);
+	destroy_workqueue(arb_vm_state->vm_arb_wq);
+	kbase_arbif_destroy(kbdev);
+	arb_vm_state->vm_arb_wq = NULL;
+	kfree(kbdev->pm.arb_vm_state);
+	kbdev->pm.arb_vm_state = NULL;
+}
+
+/**
+ * kbase_arbiter_pm_release_interrupts() - Release the GPU interrupts
+ * @kbdev: The kbase device structure for the device (must be a valid pointer)
+ *
+ * Releases interrupts and set the interrupt flag to false
+ */
+void kbase_arbiter_pm_release_interrupts(struct kbase_device *kbdev)
+{
+	struct kbase_arbiter_vm_state *arb_vm_state = kbdev->pm.arb_vm_state;
+
+	mutex_lock(&arb_vm_state->vm_state_lock);
+	if (arb_vm_state->interrupts_installed == true) {
+		arb_vm_state->interrupts_installed = false;
+		kbase_release_interrupts(kbdev);
+	}
+	mutex_unlock(&arb_vm_state->vm_state_lock);
+}
+
+/**
+ * kbase_arbiter_pm_install_interrupts() - Install the GPU interrupts
+ * @kbdev: The kbase device structure for the device (must be a valid pointer)
+ *
+ * Install interrupts and set the interrupt_install flag to true.
+ *
+ * Return: 0 if success, or a Linux error code
+ */
+int kbase_arbiter_pm_install_interrupts(struct kbase_device *kbdev)
+{
+	struct kbase_arbiter_vm_state *arb_vm_state = kbdev->pm.arb_vm_state;
+	int err;
+
+	mutex_lock(&arb_vm_state->vm_state_lock);
+	arb_vm_state->interrupts_installed = true;
+	err = kbase_install_interrupts(kbdev);
+	mutex_unlock(&arb_vm_state->vm_state_lock);
+	return err;
+}
+
+/**
+ * kbase_arbiter_pm_vm_stopped() - Handle stop state for the VM
+ * @kbdev: The kbase device structure for the device (must be a valid pointer)
+ *
+ * Handles a stop state for the VM
+ */
+void kbase_arbiter_pm_vm_stopped(struct kbase_device *kbdev)
+{
+	bool request_gpu = false;
+	struct kbase_arbiter_vm_state *arb_vm_state = kbdev->pm.arb_vm_state;
+
+	lockdep_assert_held(&arb_vm_state->vm_state_lock);
+
+	if (atomic_read(&kbdev->pm.gpu_users_waiting) > 0 &&
+			arb_vm_state->vm_state == KBASE_VM_STATE_STOPPING_IDLE)
+		kbase_arbiter_pm_vm_set_state(kbdev,
+			 KBASE_VM_STATE_STOPPING_ACTIVE);
+
+	dev_dbg(kbdev->dev, "%s %s\n", __func__,
+		kbase_arbiter_pm_vm_state_str(arb_vm_state->vm_state));
+
+	if (arb_vm_state->interrupts_installed) {
+		arb_vm_state->interrupts_installed = false;
+		kbase_release_interrupts(kbdev);
+	}
+
+	switch (arb_vm_state->vm_state) {
+	case KBASE_VM_STATE_STOPPING_ACTIVE:
+		request_gpu = true;
+		kbase_arbiter_pm_vm_set_state(kbdev,
+			KBASE_VM_STATE_STOPPED_GPU_REQUESTED);
+		break;
+	case KBASE_VM_STATE_STOPPING_IDLE:
+		kbase_arbiter_pm_vm_set_state(kbdev, KBASE_VM_STATE_STOPPED);
+		break;
+	case KBASE_VM_STATE_SUSPEND_PENDING:
+		kbase_arbiter_pm_vm_set_state(kbdev, KBASE_VM_STATE_SUSPENDED);
+		break;
+	default:
+		dev_warn(kbdev->dev, "unexpected pm_stop VM state %u",
+			arb_vm_state->vm_state);
+		break;
+	}
+
+	kbase_pm_set_gpu_lost(kbdev, false);
+	kbase_arbif_gpu_stopped(kbdev, request_gpu);
+	if (request_gpu)
+		start_request_timer(kbdev);
+}
+
+void kbase_arbiter_set_max_config(struct kbase_device *kbdev,
+				  uint32_t max_l2_slices,
+				  uint32_t max_core_mask)
+{
+	struct kbase_arbiter_vm_state *arb_vm_state;
+	struct max_config_props max_config;
+
+	if (!kbdev)
+		return;
+
+	/* Mask the max_l2_slices as it is stored as 8 bits into kbase */
+	max_config.l2_slices = max_l2_slices & MAX_L2_SLICES_MASK;
+	max_config.core_mask = max_core_mask;
+	arb_vm_state = kbdev->pm.arb_vm_state;
+
+	mutex_lock(&arb_vm_state->vm_state_lock);
+	/* Just set the max_props in kbase during initialization. */
+	if (arb_vm_state->vm_state == KBASE_VM_STATE_INITIALIZING)
+		kbase_gpuprops_set_max_config(kbdev, &max_config);
+	else
+		dev_dbg(kbdev->dev, "Unexpected max_config on VM state %s",
+			kbase_arbiter_pm_vm_state_str(arb_vm_state->vm_state));
+
+	mutex_unlock(&arb_vm_state->vm_state_lock);
+}
+
+int kbase_arbiter_pm_gpu_assigned(struct kbase_device *kbdev)
+{
+	struct kbase_arbiter_vm_state *arb_vm_state;
+	int result = -EINVAL;
+
+	if (!kbdev)
+		return result;
+
+	/* First check the GPU_LOST state */
+	kbase_pm_lock(kbdev);
+	if (kbase_pm_is_gpu_lost(kbdev)) {
+		kbase_pm_unlock(kbdev);
+		return 0;
+	}
+	kbase_pm_unlock(kbdev);
+
+	/* Then the arbitration state machine */
+	arb_vm_state = kbdev->pm.arb_vm_state;
+
+	mutex_lock(&arb_vm_state->vm_state_lock);
+	switch (arb_vm_state->vm_state) {
+	case KBASE_VM_STATE_INITIALIZING:
+	case KBASE_VM_STATE_SUSPENDED:
+	case KBASE_VM_STATE_STOPPED:
+	case KBASE_VM_STATE_STOPPED_GPU_REQUESTED:
+	case KBASE_VM_STATE_SUSPEND_WAIT_FOR_GRANT:
+		result = 0;
+		break;
+	default:
+		result = 1;
+		break;
+	}
+	mutex_unlock(&arb_vm_state->vm_state_lock);
+
+	return result;
+}
+
+/**
+ * kbase_arbiter_pm_vm_gpu_start() - Handles the start state of the VM
+ * @kbdev: The kbase device structure for the device (must be a valid pointer)
+ *
+ * Handles the start state of the VM
+ */
+static void kbase_arbiter_pm_vm_gpu_start(struct kbase_device *kbdev)
+{
+	struct kbase_arbiter_vm_state *arb_vm_state = kbdev->pm.arb_vm_state;
+	bool freq_updated = false;
+
+	lockdep_assert_held(&arb_vm_state->vm_state_lock);
+	mutex_lock(&kbdev->arb.arb_freq.arb_freq_lock);
+	if (kbdev->arb.arb_freq.freq_updated) {
+		kbdev->arb.arb_freq.freq_updated = false;
+		freq_updated = true;
+	}
+	mutex_unlock(&kbdev->arb.arb_freq.arb_freq_lock);
+
+	cancel_request_timer(kbdev);
+	switch (arb_vm_state->vm_state) {
+	case KBASE_VM_STATE_INITIALIZING:
+		kbase_arbiter_pm_vm_set_state(kbdev,
+			KBASE_VM_STATE_INITIALIZING_WITH_GPU);
+		break;
+	case KBASE_VM_STATE_STOPPED_GPU_REQUESTED:
+		kbase_arbiter_pm_vm_set_state(kbdev, KBASE_VM_STATE_STARTING);
+		arb_vm_state->interrupts_installed = true;
+		kbase_install_interrupts(kbdev);
+		/*
+		 * GPU GRANTED received while in stop can be a result of a
+		 * repartition.
+		 */
+		kbase_gpuprops_req_curr_config_update(kbdev);
+		/* curr_config will be updated while resuming the PM. */
+		queue_work(arb_vm_state->vm_arb_wq,
+			&arb_vm_state->vm_resume_work);
+		break;
+	case KBASE_VM_STATE_SUSPEND_WAIT_FOR_GRANT:
+		kbase_pm_set_gpu_lost(kbdev, false);
+		kbase_arbif_gpu_stopped(kbdev, false);
+		kbase_arbiter_pm_vm_set_state(kbdev, KBASE_VM_STATE_SUSPENDED);
+		break;
+	default:
+		/*
+		 * GPU_GRANTED can be received when there is a frequency update
+		 * Only show a warning if received in an unexpected state
+		 * without a frequency update
+		 */
+		if (!freq_updated)
+			dev_warn(kbdev->dev,
+				"GPU_GRANTED when not expected - state %s\n",
+				kbase_arbiter_pm_vm_state_str(
+					arb_vm_state->vm_state));
+		break;
+	}
+}
+
+/**
+ * kbase_arbiter_pm_vm_gpu_stop() - Handles the stop state of the VM
+ * @kbdev: The kbase device structure for the device (must be a valid pointer)
+ *
+ * Handles the start state of the VM
+ */
+static void kbase_arbiter_pm_vm_gpu_stop(struct kbase_device *kbdev)
+{
+	struct kbase_arbiter_vm_state *arb_vm_state = kbdev->pm.arb_vm_state;
+
+	lockdep_assert_held(&arb_vm_state->vm_state_lock);
+	if (arb_vm_state->vm_state == KBASE_VM_STATE_INITIALIZING_WITH_GPU) {
+		mutex_unlock(&arb_vm_state->vm_state_lock);
+		kbase_arbiter_pm_vm_wait_gpu_assignment(kbdev);
+		mutex_lock(&arb_vm_state->vm_state_lock);
+	}
+
+	switch (arb_vm_state->vm_state) {
+	case KBASE_VM_STATE_IDLE:
+		kbase_arbiter_pm_vm_set_state(kbdev,
+			KBASE_VM_STATE_STOPPING_IDLE);
+		queue_work(arb_vm_state->vm_arb_wq,
+			&arb_vm_state->vm_suspend_work);
+		break;
+	case KBASE_VM_STATE_ACTIVE:
+		kbase_arbiter_pm_vm_set_state(kbdev,
+			KBASE_VM_STATE_STOPPING_ACTIVE);
+		queue_work(arb_vm_state->vm_arb_wq,
+			&arb_vm_state->vm_suspend_work);
+		break;
+	case KBASE_VM_STATE_STARTING:
+		dev_dbg(kbdev->dev, "Got GPU_STOP event while STARTING.");
+		kbase_arbiter_pm_vm_set_state(kbdev,
+			KBASE_VM_STATE_STOPPING_ACTIVE);
+		if (arb_vm_state->vm_arb_starting)
+			queue_work(arb_vm_state->vm_arb_wq,
+				&arb_vm_state->vm_suspend_work);
+		break;
+	case KBASE_VM_STATE_SUSPEND_PENDING:
+		/* Suspend finishes with a stop so nothing else to do */
+		break;
+	default:
+		dev_warn(kbdev->dev, "GPU_STOP when not expected - state %s\n",
+			kbase_arbiter_pm_vm_state_str(arb_vm_state->vm_state));
+		break;
+	}
+}
+
+/**
+ * kbase_gpu_lost() - Kbase signals GPU is lost on a lost event signal
+ * @kbdev: The kbase device structure for the device (must be a valid pointer)
+ *
+ * On GPU lost event signals GPU_LOST to the arbiter
+ */
+static void kbase_gpu_lost(struct kbase_device *kbdev)
+{
+	struct kbase_arbiter_vm_state *arb_vm_state = kbdev->pm.arb_vm_state;
+	bool handle_gpu_lost = false;
+
+	lockdep_assert_held(&arb_vm_state->vm_state_lock);
+
+	switch (arb_vm_state->vm_state) {
+	case KBASE_VM_STATE_STARTING:
+	case KBASE_VM_STATE_ACTIVE:
+	case KBASE_VM_STATE_IDLE:
+		dev_warn(kbdev->dev, "GPU lost in state %s",
+		kbase_arbiter_pm_vm_state_str(arb_vm_state->vm_state));
+		kbase_arbiter_pm_vm_gpu_stop(kbdev);
+		handle_gpu_lost = true;
+		break;
+	case KBASE_VM_STATE_STOPPING_IDLE:
+	case KBASE_VM_STATE_STOPPING_ACTIVE:
+	case KBASE_VM_STATE_SUSPEND_PENDING:
+		dev_dbg(kbdev->dev, "GPU lost while stopping");
+		handle_gpu_lost = true;
+		break;
+	case KBASE_VM_STATE_SUSPENDED:
+	case KBASE_VM_STATE_STOPPED:
+	case KBASE_VM_STATE_STOPPED_GPU_REQUESTED:
+		dev_dbg(kbdev->dev, "GPU lost while already stopped");
+		break;
+	case KBASE_VM_STATE_SUSPEND_WAIT_FOR_GRANT:
+		dev_dbg(kbdev->dev, "GPU lost while waiting to suspend");
+		kbase_arbiter_pm_vm_set_state(kbdev, KBASE_VM_STATE_SUSPENDED);
+		break;
+	default:
+		break;
+	}
+	if (handle_gpu_lost) {
+		/* Releasing the VM state lock here is safe because
+		 * we are guaranteed to be in either STOPPING_IDLE,
+		 * STOPPING_ACTIVE or SUSPEND_PENDING at this point.
+		 * The only transitions that are valid from here are to
+		 * STOPPED, STOPPED_GPU_REQUESTED or SUSPENDED which can
+		 * only happen at the completion of the GPU lost handling.
+		 */
+		mutex_unlock(&arb_vm_state->vm_state_lock);
+		kbase_pm_handle_gpu_lost(kbdev);
+		mutex_lock(&arb_vm_state->vm_state_lock);
+	}
+}
+
+/**
+ * kbase_arbiter_pm_vm_os_suspend_ready_state() - checks if VM is ready
+ *			to be moved to suspended state.
+ * @kbdev: The kbase device structure for the device (must be a valid pointer)
+ *
+ * Return: True if its ready to be suspended else False.
+ */
+static inline bool kbase_arbiter_pm_vm_os_suspend_ready_state(
+	struct kbase_device *kbdev)
+{
+	switch (kbdev->pm.arb_vm_state->vm_state) {
+	case KBASE_VM_STATE_SUSPENDED:
+	case KBASE_VM_STATE_STOPPED:
+	case KBASE_VM_STATE_IDLE:
+	case KBASE_VM_STATE_ACTIVE:
+		return true;
+	default:
+		return false;
+	}
+}
+
+/**
+ * kbase_arbiter_pm_vm_os_prepare_suspend() - Prepare OS to be in suspend state
+ *                             until it receives the grant message from arbiter
+ * @kbdev: The kbase device structure for the device (must be a valid pointer)
+ *
+ * Prepares OS to be in suspend state until it receives GRANT message
+ * from Arbiter asynchronously.
+ */
+static void kbase_arbiter_pm_vm_os_prepare_suspend(struct kbase_device *kbdev)
+{
+	struct kbase_arbiter_vm_state *arb_vm_state = kbdev->pm.arb_vm_state;
+	enum kbase_vm_state prev_state;
+
+	lockdep_assert_held(&arb_vm_state->vm_state_lock);
+	if (kbdev->arb.arb_if) {
+		if (kbdev->pm.arb_vm_state->vm_state ==
+					KBASE_VM_STATE_SUSPENDED)
+			return;
+	}
+	/* Block suspend OS function until we are in a stable state
+	 * with vm_state_lock
+	 */
+	while (!kbase_arbiter_pm_vm_os_suspend_ready_state(kbdev)) {
+		prev_state = arb_vm_state->vm_state;
+		switch (arb_vm_state->vm_state) {
+		case KBASE_VM_STATE_STOPPING_ACTIVE:
+		case KBASE_VM_STATE_STOPPING_IDLE:
+			kbase_arbiter_pm_vm_set_state(kbdev,
+				KBASE_VM_STATE_SUSPEND_PENDING);
+			break;
+		case KBASE_VM_STATE_STOPPED_GPU_REQUESTED:
+			kbase_arbiter_pm_vm_set_state(kbdev,
+				KBASE_VM_STATE_SUSPEND_WAIT_FOR_GRANT);
+			break;
+		case KBASE_VM_STATE_STARTING:
+			if (!arb_vm_state->vm_arb_starting) {
+				kbase_arbiter_pm_vm_set_state(kbdev,
+					KBASE_VM_STATE_SUSPEND_PENDING);
+				kbase_arbiter_pm_vm_stopped(kbdev);
+			}
+			break;
+		default:
+			break;
+		}
+		mutex_unlock(&arb_vm_state->vm_state_lock);
+		wait_event(arb_vm_state->vm_state_wait,
+			arb_vm_state->vm_state != prev_state);
+		mutex_lock(&arb_vm_state->vm_state_lock);
+	}
+
+	switch (arb_vm_state->vm_state) {
+	case KBASE_VM_STATE_STOPPED:
+		kbase_arbiter_pm_vm_set_state(kbdev,
+			KBASE_VM_STATE_SUSPENDED);
+		break;
+	case KBASE_VM_STATE_IDLE:
+	case KBASE_VM_STATE_ACTIVE:
+		kbase_arbiter_pm_vm_set_state(kbdev,
+			KBASE_VM_STATE_SUSPEND_PENDING);
+		mutex_unlock(&arb_vm_state->vm_state_lock);
+		/* Ensure resume has completed fully before starting suspend */
+		flush_work(&arb_vm_state->vm_resume_work);
+		kbase_pm_driver_suspend(kbdev);
+		mutex_lock(&arb_vm_state->vm_state_lock);
+		break;
+	case KBASE_VM_STATE_SUSPENDED:
+		break;
+	default:
+		KBASE_DEBUG_ASSERT_MSG(false, "Unexpected state to suspend");
+		break;
+	}
+}
+
+/**
+ * kbase_arbiter_pm_vm_os_resume() - Resume OS function once it receives
+ *                                   a grant message from arbiter
+ * @kbdev: The kbase device structure for the device (must be a valid pointer)
+ *
+ * Resume OS function once it receives GRANT message
+ * from Arbiter asynchronously.
+ */
+static void kbase_arbiter_pm_vm_os_resume(struct kbase_device *kbdev)
+{
+	struct kbase_arbiter_vm_state *arb_vm_state = kbdev->pm.arb_vm_state;
+
+	lockdep_assert_held(&arb_vm_state->vm_state_lock);
+	KBASE_DEBUG_ASSERT_MSG(arb_vm_state->vm_state ==
+						KBASE_VM_STATE_SUSPENDED,
+		"Unexpected state to resume");
+
+	kbase_arbiter_pm_vm_set_state(kbdev,
+		KBASE_VM_STATE_STOPPED_GPU_REQUESTED);
+	kbase_arbif_gpu_request(kbdev);
+	start_request_timer(kbdev);
+
+	/* Release lock and block resume OS function until we have
+	 * asynchronously received the GRANT message from the Arbiter and
+	 * fully resumed
+	 */
+	mutex_unlock(&arb_vm_state->vm_state_lock);
+	kbase_arbiter_pm_vm_wait_gpu_assignment(kbdev);
+	flush_work(&arb_vm_state->vm_resume_work);
+	mutex_lock(&arb_vm_state->vm_state_lock);
+}
+
+/**
+ * kbase_arbiter_pm_vm_event() - Dispatch VM event to the state machine.
+ * @kbdev: The kbase device structure for the device (must be a valid pointer)
+ * @evt: VM event
+ *
+ * The state machine function. Receives events and transitions states
+ * according the event received and the current state
+ */
+void kbase_arbiter_pm_vm_event(struct kbase_device *kbdev,
+	enum kbase_arbif_evt evt)
+{
+	struct kbase_arbiter_vm_state *arb_vm_state = kbdev->pm.arb_vm_state;
+
+	if (!kbdev->arb.arb_if)
+		return;
+
+	mutex_lock(&arb_vm_state->vm_state_lock);
+	dev_dbg(kbdev->dev, "%s %s\n", __func__,
+		kbase_arbiter_pm_vm_event_str(evt));
+	if (arb_vm_state->vm_state != KBASE_VM_STATE_INITIALIZING_WITH_GPU &&
+		arb_vm_state->vm_state != KBASE_VM_STATE_INITIALIZING)
+		KBASE_KTRACE_ADD(kbdev, ARB_VM_EVT, NULL, evt);
+	switch (evt) {
+	case KBASE_VM_GPU_GRANTED_EVT:
+		kbase_arbiter_pm_vm_gpu_start(kbdev);
+		break;
+	case KBASE_VM_GPU_STOP_EVT:
+		kbase_arbiter_pm_vm_gpu_stop(kbdev);
+		break;
+	case KBASE_VM_GPU_LOST_EVT:
+		dev_dbg(kbdev->dev, "KBASE_ARBIF_GPU_LOST_EVT!");
+		kbase_gpu_lost(kbdev);
+		break;
+	case KBASE_VM_OS_SUSPEND_EVENT:
+		kbase_arbiter_pm_vm_os_prepare_suspend(kbdev);
+		break;
+	case KBASE_VM_OS_RESUME_EVENT:
+		kbase_arbiter_pm_vm_os_resume(kbdev);
+		break;
+	case KBASE_VM_GPU_IDLE_EVENT:
+		switch (arb_vm_state->vm_state) {
+		case KBASE_VM_STATE_ACTIVE:
+			kbase_arbiter_pm_vm_set_state(kbdev,
+				KBASE_VM_STATE_IDLE);
+			kbase_arbif_gpu_idle(kbdev);
+			break;
+		default:
+			break;
+		}
+		break;
+
+	case KBASE_VM_REF_EVENT:
+		switch (arb_vm_state->vm_state) {
+		case KBASE_VM_STATE_STARTING:
+		case KBASE_VM_STATE_IDLE:
+			kbase_arbiter_pm_vm_set_state(kbdev,
+			KBASE_VM_STATE_ACTIVE);
+			kbase_arbif_gpu_active(kbdev);
+			break;
+		case KBASE_VM_STATE_STOPPING_IDLE:
+			kbase_arbiter_pm_vm_set_state(kbdev,
+				KBASE_VM_STATE_STOPPING_ACTIVE);
+			break;
+		default:
+			break;
+		}
+		break;
+
+	case KBASE_VM_GPU_INITIALIZED_EVT:
+		switch (arb_vm_state->vm_state) {
+		case KBASE_VM_STATE_INITIALIZING_WITH_GPU:
+			lockdep_assert_held(&kbdev->pm.lock);
+			if (kbdev->pm.active_count > 0) {
+				kbase_arbiter_pm_vm_set_state(kbdev,
+					KBASE_VM_STATE_ACTIVE);
+				kbase_arbif_gpu_active(kbdev);
+			} else {
+				kbase_arbiter_pm_vm_set_state(kbdev,
+					KBASE_VM_STATE_IDLE);
+				kbase_arbif_gpu_idle(kbdev);
+			}
+			break;
+		default:
+			break;
+		}
+		break;
+
+	default:
+		dev_alert(kbdev->dev, "Got Unknown Event!");
+		break;
+	}
+	mutex_unlock(&arb_vm_state->vm_state_lock);
+}
+
+KBASE_EXPORT_TEST_API(kbase_arbiter_pm_vm_event);
+
+/**
+ * kbase_arbiter_pm_vm_wait_gpu_assignment() - VM wait for a GPU assignment.
+ * @kbdev: The kbase device structure for the device (must be a valid pointer)
+ *
+ * VM waits for a GPU assignment.
+ */
+static void kbase_arbiter_pm_vm_wait_gpu_assignment(struct kbase_device *kbdev)
+{
+	struct kbase_arbiter_vm_state *arb_vm_state = kbdev->pm.arb_vm_state;
+
+	dev_dbg(kbdev->dev, "Waiting for GPU assignment...\n");
+	wait_event(arb_vm_state->vm_state_wait,
+		arb_vm_state->vm_state == KBASE_VM_STATE_IDLE ||
+		arb_vm_state->vm_state == KBASE_VM_STATE_ACTIVE);
+	dev_dbg(kbdev->dev, "Waiting for GPU assignment - done\n");
+}
+
+/**
+ * kbase_arbiter_pm_vm_gpu_assigned_lockheld() - Check if VM holds VM state lock
+ * @kbdev: The kbase device structure for the device (must be a valid pointer)
+ *
+ * Checks if the virtual machine holds VM state lock.
+ *
+ * Return: true if GPU is assigned, else false.
+ */
+static inline bool kbase_arbiter_pm_vm_gpu_assigned_lockheld(
+	struct kbase_device *kbdev)
+{
+	struct kbase_arbiter_vm_state *arb_vm_state = kbdev->pm.arb_vm_state;
+
+	lockdep_assert_held(&arb_vm_state->vm_state_lock);
+	return (arb_vm_state->vm_state == KBASE_VM_STATE_IDLE ||
+		arb_vm_state->vm_state == KBASE_VM_STATE_ACTIVE);
+}
+
+/**
+ * kbase_arbiter_pm_ctx_active_handle_suspend() - Handle suspend operation for
+ *                                                arbitration mode
+ * @kbdev: The kbase device structure for the device (must be a valid pointer)
+ * @suspend_handler: The handler code for how to handle a suspend
+ *                   that might occur
+ *
+ * This function handles a suspend event from the driver,
+ * communicating with the arbiter and waiting synchronously for the GPU
+ * to be granted again depending on the VM state.
+ *
+ * Return: 0 on success else 1 suspend handler isn not possible.
+ */
+int kbase_arbiter_pm_ctx_active_handle_suspend(struct kbase_device *kbdev,
+	enum kbase_pm_suspend_handler suspend_handler)
+{
+	struct kbase_arbiter_vm_state *arb_vm_state = kbdev->pm.arb_vm_state;
+	int res = 0;
+
+	if (kbdev->arb.arb_if) {
+		mutex_lock(&arb_vm_state->vm_state_lock);
+		while (!kbase_arbiter_pm_vm_gpu_assigned_lockheld(kbdev)) {
+			/* Update VM state since we have GPU work to do */
+			if (arb_vm_state->vm_state ==
+						KBASE_VM_STATE_STOPPING_IDLE)
+				kbase_arbiter_pm_vm_set_state(kbdev,
+					KBASE_VM_STATE_STOPPING_ACTIVE);
+			else if (arb_vm_state->vm_state ==
+						KBASE_VM_STATE_STOPPED) {
+				kbase_arbiter_pm_vm_set_state(kbdev,
+					KBASE_VM_STATE_STOPPED_GPU_REQUESTED);
+				kbase_arbif_gpu_request(kbdev);
+				start_request_timer(kbdev);
+			} else if (arb_vm_state->vm_state ==
+					KBASE_VM_STATE_INITIALIZING_WITH_GPU)
+				break;
+
+			if (suspend_handler !=
+				KBASE_PM_SUSPEND_HANDLER_NOT_POSSIBLE) {
+
+				/* In case of GPU lost, even if
+				 * active_count > 0, we no longer have GPU
+				 * access
+				 */
+				if (kbase_pm_is_gpu_lost(kbdev))
+					res = 1;
+
+				switch (suspend_handler) {
+				case KBASE_PM_SUSPEND_HANDLER_DONT_INCREASE:
+					res = 1;
+					break;
+				case KBASE_PM_SUSPEND_HANDLER_DONT_REACTIVATE:
+					if (kbdev->pm.active_count == 0)
+						res = 1;
+					break;
+				case KBASE_PM_SUSPEND_HANDLER_VM_GPU_GRANTED:
+					break;
+				default:
+					WARN(1, "Unknown suspend_handler\n");
+					res = 1;
+					break;
+				}
+				break;
+			}
+
+			/* Need to synchronously wait for GPU assignment */
+			atomic_inc(&kbdev->pm.gpu_users_waiting);
+			mutex_unlock(&arb_vm_state->vm_state_lock);
+			kbase_pm_unlock(kbdev);
+			kbase_arbiter_pm_vm_wait_gpu_assignment(kbdev);
+			kbase_pm_lock(kbdev);
+			mutex_lock(&arb_vm_state->vm_state_lock);
+			atomic_dec(&kbdev->pm.gpu_users_waiting);
+		}
+		mutex_unlock(&arb_vm_state->vm_state_lock);
+	}
+	return res;
+}
+
+/**
+ * kbase_arbiter_pm_update_gpu_freq() - Updates GPU clock frequency received
+ * from arbiter.
+ * @arb_freq: Pointer to structure holding GPU clock frequency data
+ * @freq: New frequency value in KHz
+ */
+void kbase_arbiter_pm_update_gpu_freq(struct kbase_arbiter_freq *arb_freq,
+	uint32_t freq)
+{
+	struct kbase_gpu_clk_notifier_data ndata;
+
+	mutex_lock(&arb_freq->arb_freq_lock);
+	if (arb_freq->arb_freq != freq) {
+		ndata.new_rate = (unsigned long)freq * KHZ_TO_HZ;
+		ndata.old_rate = (unsigned long)arb_freq->arb_freq * KHZ_TO_HZ;
+		ndata.gpu_clk_handle = arb_freq;
+		arb_freq->arb_freq = freq;
+		arb_freq->freq_updated = true;
+		if (arb_freq->nb)
+			arb_freq->nb->notifier_call(arb_freq->nb,
+						    POST_RATE_CHANGE, &ndata);
+	}
+
+	mutex_unlock(&arb_freq->arb_freq_lock);
+}
+
+/**
+ * get_arb_gpu_clk() - Enumerate a GPU clock on the given index
+ * @kbdev: kbase_device pointer
+ * @index: GPU clock index
+ *
+ * Return: Pointer to structure holding GPU clock frequency data reported from
+ * arbiter, only index 0 is valid.
+ */
+static void *get_arb_gpu_clk(struct kbase_device *kbdev,
+		unsigned int index)
+{
+	if (index == 0)
+		return &kbdev->arb.arb_freq;
+	return NULL;
+}
+
+/**
+ * get_arb_gpu_clk_rate() - Get the current rate of GPU clock frequency value
+ * @kbdev:          kbase_device pointer
+ * @gpu_clk_handle: Handle unique to the enumerated GPU clock
+ *
+ * Return: The GPU clock frequency value saved when gpu is granted from arbiter
+ */
+static unsigned long get_arb_gpu_clk_rate(struct kbase_device *kbdev,
+		void *gpu_clk_handle)
+{
+	uint32_t freq;
+	struct kbase_arbiter_freq *arb_dev_freq =
+			(struct kbase_arbiter_freq *) gpu_clk_handle;
+
+	mutex_lock(&arb_dev_freq->arb_freq_lock);
+	/* Convert from KHz to Hz */
+	freq = arb_dev_freq->arb_freq * KHZ_TO_HZ;
+	mutex_unlock(&arb_dev_freq->arb_freq_lock);
+	return freq;
+}
+
+/**
+ * arb_gpu_clk_notifier_register() - Register a clock rate change notifier.
+ * @kbdev:           kbase_device pointer
+ * @gpu_clk_handle:  Handle unique to the enumerated GPU clock
+ * @nb:              notifier block containing the callback function pointer
+ *
+ * This function registers a callback function that is invoked whenever the
+ * frequency of the clock corresponding to @gpu_clk_handle changes.
+ *
+ * Return: 0 on success, negative error code otherwise.
+ */
+static int arb_gpu_clk_notifier_register(struct kbase_device *kbdev,
+	void *gpu_clk_handle, struct notifier_block *nb)
+{
+	int ret = 0;
+	struct kbase_arbiter_freq *arb_dev_freq =
+		(struct kbase_arbiter_freq *)gpu_clk_handle;
+
+	if (!arb_dev_freq->nb)
+		arb_dev_freq->nb = nb;
+	else
+		ret = -EBUSY;
+
+	return ret;
+}
+
+/**
+ * arb_gpu_clk_notifier_unregister() - Unregister clock rate change notifier
+ * @kbdev:           kbase_device pointer
+ * @gpu_clk_handle:  Handle unique to the enumerated GPU clock
+ * @nb:              notifier block containing the callback function pointer
+ *
+ * This function pointer is used to unregister a callback function that
+ * was previously registered to get notified of a frequency change of the
+ * clock corresponding to @gpu_clk_handle.
+ */
+static void arb_gpu_clk_notifier_unregister(struct kbase_device *kbdev,
+	void *gpu_clk_handle, struct notifier_block *nb)
+{
+	struct kbase_arbiter_freq *arb_dev_freq =
+		(struct kbase_arbiter_freq *)gpu_clk_handle;
+	if (arb_dev_freq->nb == nb) {
+		arb_dev_freq->nb = NULL;
+	} else {
+		dev_err(kbdev->dev, "%s - notifier did not match\n",
+			 __func__);
+	}
+}
+
+struct kbase_clk_rate_trace_op_conf arb_clk_rate_trace_ops = {
+	.get_gpu_clk_rate = get_arb_gpu_clk_rate,
+	.enumerate_gpu_clk = get_arb_gpu_clk,
+	.gpu_clk_notifier_register = arb_gpu_clk_notifier_register,
+	.gpu_clk_notifier_unregister = arb_gpu_clk_notifier_unregister
+};

diff --git a/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbiter_pm.h b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbiter_pm.h
new file mode 100644
index 0000000..f863f88
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/arbiter/mali_kbase_arbiter_pm.h

@@ -0,0 +1,196 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
+/*
+ *
+ * (C) COPYRIGHT 2019-2022 ARM Limited. All rights reserved.
+ *
+ * This program is free software and is provided to you under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation, and any use by you of this program is subject to the terms
+ * of such GNU license.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, you can access it online at
+ * http://www.gnu.org/licenses/gpl-2.0.html.
+ *
+ */
+
+/**
+ * DOC: Mali arbiter power manager state machine and APIs
+ */
+
+#ifndef _MALI_KBASE_ARBITER_PM_H_
+#define _MALI_KBASE_ARBITER_PM_H_
+
+#include "mali_kbase_arbif.h"
+
+/**
+ * enum kbase_vm_state - Current PM Arbitration state.
+ *
+ * @KBASE_VM_STATE_INITIALIZING: Special state before arbiter is initialized.
+ * @KBASE_VM_STATE_INITIALIZING_WITH_GPU: Initialization after GPU
+ *                                        has been granted.
+ * @KBASE_VM_STATE_SUSPENDED: KBase is suspended by OS and GPU is not assigned.
+ * @KBASE_VM_STATE_STOPPED: GPU is not assigned to KBase and is not required.
+ * @KBASE_VM_STATE_STOPPED_GPU_REQUESTED: GPU is not assigned to KBase
+ *                                        but a request has been made.
+ * @KBASE_VM_STATE_STARTING: GPU is assigned and KBase is getting ready to run.
+ * @KBASE_VM_STATE_IDLE: GPU is assigned but KBase has no work to do
+ * @KBASE_VM_STATE_ACTIVE: GPU is assigned and KBase is busy using it
+ * @KBASE_VM_STATE_SUSPEND_PENDING: OS is going into suspend mode.
+ * @KBASE_VM_STATE_SUSPEND_WAIT_FOR_GRANT: OS is going into suspend mode but GPU
+ *                                         has already been requested.
+ *                                         In this situation we must wait for
+ *                                         the Arbiter to send a GRANTED message
+ *                                         and respond immediately with
+ *                                         a STOPPED message before entering
+ *                                         the suspend mode.
+ * @KBASE_VM_STATE_STOPPING_IDLE: Arbiter has sent a stopped message and there
+ *                                is currently no work to do on the GPU.
+ * @KBASE_VM_STATE_STOPPING_ACTIVE: Arbiter has sent a stopped message when
+ *                                  KBase has work to do.
+ */
+enum kbase_vm_state {
+	KBASE_VM_STATE_INITIALIZING,
+	KBASE_VM_STATE_INITIALIZING_WITH_GPU,
+	KBASE_VM_STATE_SUSPENDED,
+	KBASE_VM_STATE_STOPPED,
+	KBASE_VM_STATE_STOPPED_GPU_REQUESTED,
+	KBASE_VM_STATE_STARTING,
+	KBASE_VM_STATE_IDLE,
+	KBASE_VM_STATE_ACTIVE,
+	KBASE_VM_STATE_SUSPEND_PENDING,
+	KBASE_VM_STATE_SUSPEND_WAIT_FOR_GRANT,
+	KBASE_VM_STATE_STOPPING_IDLE,
+	KBASE_VM_STATE_STOPPING_ACTIVE
+};
+
+/**
+ * kbase_arbiter_pm_early_init() - Initialize arbiter for VM Paravirtualized use
+ * @kbdev: The kbase device structure for the device (must be a valid pointer)
+ *
+ * Initialize the arbiter and other required resources during the runtime
+ * and request the GPU for the VM for the first time.
+ *
+ * Return: 0 if successful, otherwise a standard Linux error code
+ */
+int kbase_arbiter_pm_early_init(struct kbase_device *kbdev);
+
+/**
+ * kbase_arbiter_pm_early_term() - Shutdown arbiter and free resources.
+ * @kbdev: The kbase device structure for the device (must be a valid pointer)
+ *
+ * Clean up all the resources
+ */
+void kbase_arbiter_pm_early_term(struct kbase_device *kbdev);
+
+/**
+ * kbase_arbiter_pm_release_interrupts() - Release the GPU interrupts
+ * @kbdev: The kbase device structure for the device (must be a valid pointer)
+ *
+ * Releases interrupts and set the interrupt flag to false
+ */
+void kbase_arbiter_pm_release_interrupts(struct kbase_device *kbdev);
+
+/**
+ * kbase_arbiter_pm_install_interrupts() - Install the GPU interrupts
+ * @kbdev: The kbase device structure for the device (must be a valid pointer)
+ *
+ * Install interrupts and set the interrupt_install flag to true.
+ *
+ * Return: 0 if success, or a Linux error code
+ */
+int kbase_arbiter_pm_install_interrupts(struct kbase_device *kbdev);
+
+/**
+ * kbase_arbiter_pm_vm_event() - Dispatch VM event to the state machine
+ * @kbdev: The kbase device structure for the device (must be a valid pointer)
+ * @event: The event to dispatch
+ *
+ * The state machine function. Receives events and transitions states
+ * according the event received and the current state
+ */
+void kbase_arbiter_pm_vm_event(struct kbase_device *kbdev,
+	enum kbase_arbif_evt event);
+
+/**
+ * kbase_arbiter_pm_ctx_active_handle_suspend() - Handle suspend operation for
+ *                                                arbitration mode
+ * @kbdev: The kbase device structure for the device (must be a valid pointer)
+ * @suspend_handler: The handler code for how to handle a suspend
+ *                   that might occur
+ *
+ * This function handles a suspend event from the driver,
+ * communicating with the arbiter and waiting synchronously for the GPU
+ * to be granted again depending on the VM state.
+ *
+ * Return: 0 if success, 1 if failure due to system suspending/suspended
+ */
+int kbase_arbiter_pm_ctx_active_handle_suspend(struct kbase_device *kbdev,
+	enum kbase_pm_suspend_handler suspend_handler);
+
+
+/**
+ * kbase_arbiter_pm_vm_stopped() - Handle stop event for the VM
+ * @kbdev: The kbase device structure for the device (must be a valid pointer)
+ *
+ * This function handles a stop event for the VM.
+ * It will update the VM state and forward the stop event to the driver.
+ */
+void kbase_arbiter_pm_vm_stopped(struct kbase_device *kbdev);
+
+/**
+ * kbase_arbiter_set_max_config() - Set the max config data in kbase device.
+ * @kbdev: The kbase device structure for the device (must be a valid pointer).
+ * @max_l2_slices: The maximum number of L2 slices.
+ * @max_core_mask: The largest core mask.
+ *
+ * This function handles a stop event for the VM.
+ * It will update the VM state and forward the stop event to the driver.
+ */
+void kbase_arbiter_set_max_config(struct kbase_device *kbdev,
+				  uint32_t max_l2_slices,
+				  uint32_t max_core_mask);
+
+/**
+ * kbase_arbiter_pm_gpu_assigned() - Determine if this VM has access to the GPU
+ * @kbdev: The kbase device structure for the device (must be a valid pointer)
+ *
+ * Return: 0 if the VM does not have access, 1 if it does, and a negative number
+ * if an error occurred
+ */
+int kbase_arbiter_pm_gpu_assigned(struct kbase_device *kbdev);
+
+extern struct kbase_clk_rate_trace_op_conf arb_clk_rate_trace_ops;
+
+/**
+ * struct kbase_arbiter_freq - Holding the GPU clock frequency data retrieved
+ * from arbiter
+ * @arb_freq:      GPU clock frequency value
+ * @arb_freq_lock: Mutex protecting access to arbfreq value
+ * @nb:            Notifier block to receive rate change callbacks
+ * @freq_updated:  Flag to indicate whether a frequency changed has just been
+ *                 communicated to avoid "GPU_GRANTED when not expected" warning
+ */
+struct kbase_arbiter_freq {
+	uint32_t arb_freq;
+	struct mutex arb_freq_lock;
+	struct notifier_block *nb;
+	bool freq_updated;
+};
+
+/**
+ * kbase_arbiter_pm_update_gpu_freq() - Update GPU frequency
+ * @arb_freq: Pointer to GPU clock frequency data
+ * @freq:     The new frequency
+ *
+ * Updates the GPU frequency and triggers any notifications
+ */
+void kbase_arbiter_pm_update_gpu_freq(struct kbase_arbiter_freq *arb_freq,
+	uint32_t freq);
+
+#endif /*_MALI_KBASE_ARBITER_PM_H_ */

diff --git a/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/arbitration/Kconfig b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/arbitration/Kconfig
new file mode 100644
index 0000000..1935c81
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/arbitration/Kconfig

@@ -0,0 +1,49 @@
+# SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note OR MIT
+#
+# (C) COPYRIGHT 2012-2021 ARM Limited. All rights reserved.
+#
+# This program is free software and is provided to you under the terms of the
+# GNU General Public License version 2 as published by the Free Software
+# Foundation, and any use by you of this program is subject to the terms
+# of such GNU license.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, you can access it online at
+# http://www.gnu.org/licenses/gpl-2.0.html.
+#
+#
+
+config MALI_XEN
+	tristate "Enable Xen Interface reference code"
+	depends on MALI_ARBITRATION && XEN
+	default n
+	help
+	  Enables the build of xen interface modules used in the reference
+	  virtualization setup for Mali
+	  If unsure, say N.
+
+config MALI_ARBITER_MODULES
+	tristate "Enable mali arbiter modules"
+	depends on MALI_ARBITRATION
+	default y
+	help
+	  Enables the build of the arbiter modules used in the reference
+	  virtualization setup for Mali
+	  If unsure, say N
+
+config MALI_GPU_POWER_MODULES
+	tristate "Enable gpu power modules"
+	depends on MALI_ARBITRATION
+	default y
+	help
+	  Enables the build of the gpu power modules used in the reference
+	  virtualization setup for Mali
+	  If unsure, say N
+
+
+source "drivers/gpu/arm/midgard/arbitration/ptm/Kconfig"

diff --git a/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/arbitration/ptm/Kconfig b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/arbitration/ptm/Kconfig
new file mode 100644
index 0000000..074ebd5
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/arbitration/ptm/Kconfig

@@ -0,0 +1,28 @@
+# SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note OR MIT
+#
+# (C) COPYRIGHT 2021 ARM Limited. All rights reserved.
+#
+# This program is free software and is provided to you under the terms of the
+# GNU General Public License version 2 as published by the Free Software
+# Foundation, and any use by you of this program is subject to the terms
+# of such GNU license.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, you can access it online at
+# http://www.gnu.org/licenses/gpl-2.0.html.
+#
+#
+
+config MALI_PARTITION_MANAGER
+	tristate "Enable compilation of partition manager modules"
+	depends on MALI_ARBITRATION
+	default n
+	help
+	  This option enables the compilation of the partition manager
+	  modules used to configure the Mali-G78AE GPU.
+

diff --git a/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/Kbuild b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/Kbuild
new file mode 100644
index 0000000..90bf6cd
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/Kbuild

@@ -0,0 +1,54 @@
+# SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
+#
+# (C) COPYRIGHT 2014-2021 ARM Limited. All rights reserved.
+#
+# This program is free software and is provided to you under the terms of the
+# GNU General Public License version 2 as published by the Free Software
+# Foundation, and any use by you of this program is subject to the terms
+# of such GNU license.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, you can access it online at
+# http://www.gnu.org/licenses/gpl-2.0.html.
+#
+#
+
+mali_kbase-y += \
+    backend/gpu/mali_kbase_cache_policy_backend.o \
+    backend/gpu/mali_kbase_gpuprops_backend.o \
+    backend/gpu/mali_kbase_irq_linux.o \
+    backend/gpu/mali_kbase_js_backend.o \
+    backend/gpu/mali_kbase_pm_backend.o \
+    backend/gpu/mali_kbase_pm_driver.o \
+    backend/gpu/mali_kbase_pm_metrics.o \
+    backend/gpu/mali_kbase_pm_ca.o \
+    backend/gpu/mali_kbase_pm_always_on.o \
+    backend/gpu/mali_kbase_pm_coarse_demand.o \
+    backend/gpu/mali_kbase_pm_policy.o \
+    backend/gpu/mali_kbase_time.o \
+    backend/gpu/mali_kbase_l2_mmu_config.o \
+    backend/gpu/mali_kbase_clk_rate_trace_mgr.o
+
+ifeq ($(MALI_USE_CSF),0)
+    mali_kbase-y += \
+        backend/gpu/mali_kbase_instr_backend.o \
+        backend/gpu/mali_kbase_jm_as.o \
+        backend/gpu/mali_kbase_debug_job_fault_backend.o \
+        backend/gpu/mali_kbase_jm_hw.o \
+        backend/gpu/mali_kbase_jm_rb.o
+endif
+
+
+mali_kbase-$(CONFIG_MALI_DEVFREQ) += \
+    backend/gpu/mali_kbase_devfreq.o
+
+# Dummy model
+mali_kbase-$(CONFIG_MALI_NO_MALI) += backend/gpu/mali_kbase_model_dummy.o
+mali_kbase-$(CONFIG_MALI_NO_MALI) += backend/gpu/mali_kbase_model_linux.o
+# HW error simulation
+mali_kbase-$(CONFIG_MALI_NO_MALI) += backend/gpu/mali_kbase_model_error_generator.o

diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_backend_config.h b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_backend_config.h
similarity index 100%
copy from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_backend_config.h
copy to bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_backend_config.h


diff --git a/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_cache_policy_backend.c b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_cache_policy_backend.c
new file mode 100644
index 0000000..9587c70
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_cache_policy_backend.c

@@ -0,0 +1,43 @@
+// SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
+/*
+ *
+ * (C) COPYRIGHT 2014-2016, 2018, 2020-2021 ARM Limited. All rights reserved.
+ *
+ * This program is free software and is provided to you under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation, and any use by you of this program is subject to the terms
+ * of such GNU license.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, you can access it online at
+ * http://www.gnu.org/licenses/gpl-2.0.html.
+ *
+ */
+
+#include "backend/gpu/mali_kbase_cache_policy_backend.h"
+#include <device/mali_kbase_device.h>
+
+
+void kbase_cache_set_coherency_mode(struct kbase_device *kbdev,
+		u32 mode)
+{
+	kbdev->current_gpu_coherency_mode = mode;
+
+		kbase_reg_write(kbdev, COHERENCY_ENABLE, mode);
+}
+
+u32 kbase_cache_get_coherency_features(struct kbase_device *kbdev)
+{
+	u32 coherency_features;
+
+		coherency_features = kbase_reg_read(
+			kbdev, GPU_CONTROL_REG(COHERENCY_FEATURES));
+
+	return coherency_features;
+}
+

diff --git a/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_cache_policy_backend.h b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_cache_policy_backend.h
new file mode 100644
index 0000000..13c79d6
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_cache_policy_backend.h

@@ -0,0 +1,46 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
+/*
+ *
+ * (C) COPYRIGHT 2014-2016, 2020-2021 ARM Limited. All rights reserved.
+ *
+ * This program is free software and is provided to you under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation, and any use by you of this program is subject to the terms
+ * of such GNU license.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, you can access it online at
+ * http://www.gnu.org/licenses/gpl-2.0.html.
+ *
+ */
+
+#ifndef _KBASE_CACHE_POLICY_BACKEND_H_
+#define _KBASE_CACHE_POLICY_BACKEND_H_
+
+#include "mali_kbase.h"
+#include <uapi/gpu/arm/midgard/mali_base_kernel.h>
+
+/**
+ * kbase_cache_set_coherency_mode() - Sets the system coherency mode
+ *                                    in the GPU.
+ * @kbdev:    Device pointer
+ * @mode:     Coherency mode. COHERENCY_ACE/ACE_LITE
+ */
+void kbase_cache_set_coherency_mode(struct kbase_device *kbdev,
+		u32 mode);
+
+/**
+ * kbase_cache_get_coherency_features() - Get the coherency features
+ *                                        in the GPU.
+ * @kbdev:    Device pointer
+ *
+ * Return:    Register value to be returned
+ */
+u32 kbase_cache_get_coherency_features(struct kbase_device *kbdev);
+
+#endif /* _KBASE_CACHE_POLICY_BACKEND_H_ */

diff --git a/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_clk_rate_trace_mgr.c b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_clk_rate_trace_mgr.c
new file mode 100644
index 0000000..ddd03ca
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_clk_rate_trace_mgr.c

@@ -0,0 +1,326 @@
+// SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
+/*
+ *
+ * (C) COPYRIGHT 2020-2022 ARM Limited. All rights reserved.
+ *
+ * This program is free software and is provided to you under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation, and any use by you of this program is subject to the terms
+ * of such GNU license.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, you can access it online at
+ * http://www.gnu.org/licenses/gpl-2.0.html.
+ *
+ */
+
+/*
+ * Implementation of the GPU clock rate trace manager.
+ */
+
+#include <mali_kbase.h>
+#include <mali_kbase_config_defaults.h>
+#include <linux/clk.h>
+#include <linux/pm_opp.h>
+#include <asm/div64.h>
+#include "backend/gpu/mali_kbase_clk_rate_trace_mgr.h"
+
+#ifdef CONFIG_TRACE_POWER_GPU_FREQUENCY
+#include <trace/events/power_gpu_frequency.h>
+#else
+#include "mali_power_gpu_frequency_trace.h"
+#endif
+
+#ifndef CLK_RATE_TRACE_OPS
+#define CLK_RATE_TRACE_OPS (NULL)
+#endif
+
+/**
+ * get_clk_rate_trace_callbacks() - Returns pointer to clk trace ops.
+ * @kbdev: Pointer to kbase device, used to check if arbitration is enabled
+ *         when compiled with arbiter support.
+ * Return: Pointer to clk trace ops if supported or NULL.
+ */
+static struct kbase_clk_rate_trace_op_conf *
+get_clk_rate_trace_callbacks(__maybe_unused struct kbase_device *kbdev)
+{
+	/* base case */
+	struct kbase_clk_rate_trace_op_conf *callbacks =
+		(struct kbase_clk_rate_trace_op_conf *)CLK_RATE_TRACE_OPS;
+#if defined(CONFIG_MALI_ARBITER_SUPPORT) && defined(CONFIG_OF)
+	const void *arbiter_if_node;
+
+	if (WARN_ON(!kbdev) || WARN_ON(!kbdev->dev))
+		return callbacks;
+
+	arbiter_if_node =
+		of_get_property(kbdev->dev->of_node, "arbiter_if", NULL);
+	/* Arbitration enabled, override the callback pointer.*/
+	if (arbiter_if_node)
+		callbacks = &arb_clk_rate_trace_ops;
+	else
+		dev_dbg(kbdev->dev,
+			"Arbitration supported but disabled by platform. Leaving clk rate callbacks as default.\n");
+
+#endif
+
+	return callbacks;
+}
+
+static int gpu_clk_rate_change_notifier(struct notifier_block *nb,
+			unsigned long event, void *data)
+{
+	struct kbase_gpu_clk_notifier_data *ndata = data;
+	struct kbase_clk_data *clk_data =
+		container_of(nb, struct kbase_clk_data, clk_rate_change_nb);
+	struct kbase_clk_rate_trace_manager *clk_rtm = clk_data->clk_rtm;
+	unsigned long flags;
+
+	if (WARN_ON_ONCE(clk_data->gpu_clk_handle != ndata->gpu_clk_handle))
+		return NOTIFY_BAD;
+
+	spin_lock_irqsave(&clk_rtm->lock, flags);
+	if (event == POST_RATE_CHANGE) {
+		if (!clk_rtm->gpu_idle &&
+		    (clk_data->clock_val != ndata->new_rate)) {
+			kbase_clk_rate_trace_manager_notify_all(
+				clk_rtm, clk_data->index, ndata->new_rate);
+		}
+
+		clk_data->clock_val = ndata->new_rate;
+	}
+	spin_unlock_irqrestore(&clk_rtm->lock, flags);
+
+	return NOTIFY_DONE;
+}
+
+static int gpu_clk_data_init(struct kbase_device *kbdev,
+		void *gpu_clk_handle, unsigned int index)
+{
+	struct kbase_clk_rate_trace_op_conf *callbacks;
+	struct kbase_clk_data *clk_data;
+	struct kbase_clk_rate_trace_manager *clk_rtm = &kbdev->pm.clk_rtm;
+	int ret = 0;
+
+	callbacks = get_clk_rate_trace_callbacks(kbdev);
+
+	if (WARN_ON(!callbacks) ||
+	    WARN_ON(!gpu_clk_handle) ||
+	    WARN_ON(index >= BASE_MAX_NR_CLOCKS_REGULATORS))
+		return -EINVAL;
+
+	clk_data = kzalloc(sizeof(*clk_data), GFP_KERNEL);
+	if (!clk_data) {
+		dev_err(kbdev->dev, "Failed to allocate data for clock enumerated at index %u", index);
+		return -ENOMEM;
+	}
+
+	clk_data->index = (u8)index;
+	clk_data->gpu_clk_handle = gpu_clk_handle;
+	/* Store the initial value of clock */
+	clk_data->clock_val =
+		callbacks->get_gpu_clk_rate(kbdev, gpu_clk_handle);
+
+	{
+		/* At the initialization time, GPU is powered off. */
+		unsigned long flags;
+
+		spin_lock_irqsave(&clk_rtm->lock, flags);
+		kbase_clk_rate_trace_manager_notify_all(
+			clk_rtm, clk_data->index, 0);
+		spin_unlock_irqrestore(&clk_rtm->lock, flags);
+	}
+
+	clk_data->clk_rtm = clk_rtm;
+	clk_rtm->clks[index] = clk_data;
+
+	clk_data->clk_rate_change_nb.notifier_call =
+			gpu_clk_rate_change_notifier;
+
+	if (callbacks->gpu_clk_notifier_register)
+		ret = callbacks->gpu_clk_notifier_register(kbdev,
+				gpu_clk_handle, &clk_data->clk_rate_change_nb);
+	if (ret) {
+		dev_err(kbdev->dev, "Failed to register notifier for clock enumerated at index %u", index);
+		kfree(clk_data);
+	}
+
+	return ret;
+}
+
+int kbase_clk_rate_trace_manager_init(struct kbase_device *kbdev)
+{
+	struct kbase_clk_rate_trace_op_conf *callbacks;
+	struct kbase_clk_rate_trace_manager *clk_rtm = &kbdev->pm.clk_rtm;
+	unsigned int i;
+	int ret = 0;
+
+	callbacks = get_clk_rate_trace_callbacks(kbdev);
+
+	spin_lock_init(&clk_rtm->lock);
+	INIT_LIST_HEAD(&clk_rtm->listeners);
+
+	/* Return early if no callbacks provided for clock rate tracing */
+	if (!callbacks) {
+		WRITE_ONCE(clk_rtm->clk_rate_trace_ops, NULL);
+		return 0;
+	}
+
+	clk_rtm->gpu_idle = true;
+
+	for (i = 0; i < BASE_MAX_NR_CLOCKS_REGULATORS; i++) {
+		void *gpu_clk_handle =
+			callbacks->enumerate_gpu_clk(kbdev, i);
+
+		if (!gpu_clk_handle)
+			break;
+
+		ret = gpu_clk_data_init(kbdev, gpu_clk_handle, i);
+		if (ret)
+			goto error;
+	}
+
+	/* Activate clock rate trace manager if at least one GPU clock was
+	 * enumerated.
+	 */
+	if (i) {
+		WRITE_ONCE(clk_rtm->clk_rate_trace_ops, callbacks);
+	} else {
+		dev_info(kbdev->dev, "No clock(s) available for rate tracing");
+		WRITE_ONCE(clk_rtm->clk_rate_trace_ops, NULL);
+	}
+
+	return 0;
+
+error:
+	while (i--) {
+		clk_rtm->clk_rate_trace_ops->gpu_clk_notifier_unregister(
+				kbdev, clk_rtm->clks[i]->gpu_clk_handle,
+				&clk_rtm->clks[i]->clk_rate_change_nb);
+		kfree(clk_rtm->clks[i]);
+	}
+
+	return ret;
+}
+
+void kbase_clk_rate_trace_manager_term(struct kbase_device *kbdev)
+{
+	struct kbase_clk_rate_trace_manager *clk_rtm = &kbdev->pm.clk_rtm;
+	unsigned int i;
+
+	WARN_ON(!list_empty(&clk_rtm->listeners));
+
+	if (!clk_rtm->clk_rate_trace_ops)
+		return;
+
+	for (i = 0; i < BASE_MAX_NR_CLOCKS_REGULATORS; i++) {
+		if (!clk_rtm->clks[i])
+			break;
+
+		if (clk_rtm->clk_rate_trace_ops->gpu_clk_notifier_unregister)
+			clk_rtm->clk_rate_trace_ops->gpu_clk_notifier_unregister
+			(kbdev, clk_rtm->clks[i]->gpu_clk_handle,
+			&clk_rtm->clks[i]->clk_rate_change_nb);
+		kfree(clk_rtm->clks[i]);
+	}
+
+	WRITE_ONCE(clk_rtm->clk_rate_trace_ops, NULL);
+}
+
+void kbase_clk_rate_trace_manager_gpu_active(struct kbase_device *kbdev)
+{
+	struct kbase_clk_rate_trace_manager *clk_rtm = &kbdev->pm.clk_rtm;
+	unsigned int i;
+	unsigned long flags;
+
+	if (!clk_rtm->clk_rate_trace_ops)
+		return;
+
+	spin_lock_irqsave(&clk_rtm->lock, flags);
+
+	for (i = 0; i < BASE_MAX_NR_CLOCKS_REGULATORS; i++) {
+		struct kbase_clk_data *clk_data = clk_rtm->clks[i];
+
+		if (!clk_data)
+			break;
+
+		if (unlikely(!clk_data->clock_val))
+			continue;
+
+		kbase_clk_rate_trace_manager_notify_all(
+			clk_rtm, clk_data->index, clk_data->clock_val);
+	}
+
+	clk_rtm->gpu_idle = false;
+	spin_unlock_irqrestore(&clk_rtm->lock, flags);
+}
+
+void kbase_clk_rate_trace_manager_gpu_idle(struct kbase_device *kbdev)
+{
+	struct kbase_clk_rate_trace_manager *clk_rtm = &kbdev->pm.clk_rtm;
+	unsigned int i;
+	unsigned long flags;
+
+	if (!clk_rtm->clk_rate_trace_ops)
+		return;
+
+	spin_lock_irqsave(&clk_rtm->lock, flags);
+
+	for (i = 0; i < BASE_MAX_NR_CLOCKS_REGULATORS; i++) {
+		struct kbase_clk_data *clk_data = clk_rtm->clks[i];
+
+		if (!clk_data)
+			break;
+
+		if (unlikely(!clk_data->clock_val))
+			continue;
+
+		kbase_clk_rate_trace_manager_notify_all(
+			clk_rtm, clk_data->index, 0);
+	}
+
+	clk_rtm->gpu_idle = true;
+	spin_unlock_irqrestore(&clk_rtm->lock, flags);
+}
+
+void kbase_clk_rate_trace_manager_notify_all(
+	struct kbase_clk_rate_trace_manager *clk_rtm,
+	u32 clk_index,
+	unsigned long new_rate)
+{
+	struct kbase_clk_rate_listener *pos;
+	struct kbase_device *kbdev;
+
+	lockdep_assert_held(&clk_rtm->lock);
+
+	kbdev = container_of(clk_rtm, struct kbase_device, pm.clk_rtm);
+
+	dev_dbg(kbdev->dev, "%s - GPU clock %u rate changed to %lu, pid: %d",
+		__func__, clk_index, new_rate, current->pid);
+
+	/* Raise standard `power/gpu_frequency` ftrace event */
+	{
+		unsigned long new_rate_khz = new_rate;
+
+#if BITS_PER_LONG == 64
+		do_div(new_rate_khz, 1000);
+#elif BITS_PER_LONG == 32
+		new_rate_khz /= 1000;
+#else
+#error "unsigned long division is not supported for this architecture"
+#endif
+
+		trace_gpu_frequency(new_rate_khz, clk_index);
+	}
+
+	/* Notify the listeners. */
+	list_for_each_entry(pos, &clk_rtm->listeners, node) {
+		pos->notify(pos, clk_index, new_rate);
+	}
+}
+KBASE_EXPORT_TEST_API(kbase_clk_rate_trace_manager_notify_all);

diff --git a/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_clk_rate_trace_mgr.h b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_clk_rate_trace_mgr.h
new file mode 100644
index 0000000..35b3b8d
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_clk_rate_trace_mgr.h

@@ -0,0 +1,154 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
+/*
+ *
+ * (C) COPYRIGHT 2020-2022 ARM Limited. All rights reserved.
+ *
+ * This program is free software and is provided to you under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation, and any use by you of this program is subject to the terms
+ * of such GNU license.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, you can access it online at
+ * http://www.gnu.org/licenses/gpl-2.0.html.
+ *
+ */
+
+#ifndef _KBASE_CLK_RATE_TRACE_MGR_
+#define _KBASE_CLK_RATE_TRACE_MGR_
+
+/* The index of top clock domain in kbase_clk_rate_trace_manager:clks. */
+#define KBASE_CLOCK_DOMAIN_TOP (0)
+
+/* The index of shader-cores clock domain in
+ * kbase_clk_rate_trace_manager:clks.
+ */
+#define KBASE_CLOCK_DOMAIN_SHADER_CORES (1)
+
+/**
+ * struct kbase_clk_data - Data stored per enumerated GPU clock.
+ *
+ * @clk_rtm:            Pointer to clock rate trace manager object.
+ * @gpu_clk_handle:     Handle unique to the enumerated GPU clock.
+ * @plat_private:       Private data for the platform to store into
+ * @clk_rate_change_nb: notifier block containing the pointer to callback
+ *                      function that is invoked whenever the rate of
+ *                      enumerated GPU clock changes.
+ * @clock_val:          Current rate of the enumerated GPU clock.
+ * @index:              Index at which the GPU clock was enumerated.
+ */
+struct kbase_clk_data {
+	struct kbase_clk_rate_trace_manager *clk_rtm;
+	void *gpu_clk_handle;
+	void *plat_private;
+	struct notifier_block clk_rate_change_nb;
+	unsigned long clock_val;
+	u8 index;
+};
+
+/**
+ * kbase_clk_rate_trace_manager_init - Initialize GPU clock rate trace manager.
+ *
+ * @kbdev:      Device pointer
+ *
+ * Return: 0 if success, or an error code on failure.
+ */
+int kbase_clk_rate_trace_manager_init(struct kbase_device *kbdev);
+
+/**
+ * kbase_clk_rate_trace_manager_term - Terminate GPU clock rate trace manager.
+ *
+ *  @kbdev:      Device pointer
+ */
+void kbase_clk_rate_trace_manager_term(struct kbase_device *kbdev);
+
+/**
+ * kbase_clk_rate_trace_manager_gpu_active - Inform GPU clock rate trace
+ *                                           manager of GPU becoming active.
+ *
+ * @kbdev:      Device pointer
+ */
+void kbase_clk_rate_trace_manager_gpu_active(struct kbase_device *kbdev);
+
+/**
+ * kbase_clk_rate_trace_manager_gpu_idle - Inform GPU clock rate trace
+ *                                         manager of GPU becoming idle.
+ * @kbdev:      Device pointer
+ */
+void kbase_clk_rate_trace_manager_gpu_idle(struct kbase_device *kbdev);
+
+/**
+ * kbase_clk_rate_trace_manager_subscribe_no_lock() - Add freq change listener.
+ *
+ * @clk_rtm:    Clock rate manager instance.
+ * @listener:   Listener handle
+ *
+ * kbase_clk_rate_trace_manager:lock must be held by the caller.
+ */
+static inline void kbase_clk_rate_trace_manager_subscribe_no_lock(
+	struct kbase_clk_rate_trace_manager *clk_rtm,
+	struct kbase_clk_rate_listener *listener)
+{
+	lockdep_assert_held(&clk_rtm->lock);
+	list_add(&listener->node, &clk_rtm->listeners);
+}
+
+/**
+ * kbase_clk_rate_trace_manager_subscribe() - Add freq change listener.
+ *
+ * @clk_rtm:    Clock rate manager instance.
+ * @listener:   Listener handle
+ */
+static inline void kbase_clk_rate_trace_manager_subscribe(
+	struct kbase_clk_rate_trace_manager *clk_rtm,
+	struct kbase_clk_rate_listener *listener)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&clk_rtm->lock, flags);
+	kbase_clk_rate_trace_manager_subscribe_no_lock(
+		clk_rtm, listener);
+	spin_unlock_irqrestore(&clk_rtm->lock, flags);
+}
+
+/**
+ * kbase_clk_rate_trace_manager_unsubscribe() - Remove freq change listener.
+ *
+ * @clk_rtm:    Clock rate manager instance.
+ * @listener:   Listener handle
+ */
+static inline void kbase_clk_rate_trace_manager_unsubscribe(
+	struct kbase_clk_rate_trace_manager *clk_rtm,
+	struct kbase_clk_rate_listener *listener)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&clk_rtm->lock, flags);
+	list_del(&listener->node);
+	spin_unlock_irqrestore(&clk_rtm->lock, flags);
+}
+
+/**
+ * kbase_clk_rate_trace_manager_notify_all() - Notify all clock \
+ *                                             rate listeners.
+ *
+ * @clk_rtm:     Clock rate manager instance.
+ * @clock_index:   Clock index.
+ * @new_rate:    New clock frequency(Hz)
+ *
+ * kbase_clk_rate_trace_manager:lock must be locked.
+ * This function is exported to be used by clock rate trace test
+ * portal.
+ */
+void kbase_clk_rate_trace_manager_notify_all(
+	struct kbase_clk_rate_trace_manager *clk_rtm,
+	u32 clock_index,
+	unsigned long new_rate);
+
+#endif /* _KBASE_CLK_RATE_TRACE_MGR_ */
+

diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_debug_job_fault_backend.c b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_debug_job_fault_backend.c
similarity index 100%
copy from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_debug_job_fault_backend.c
copy to bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_debug_job_fault_backend.c


diff --git a/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c
new file mode 100644
index 0000000..7c99e60
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.c

@@ -0,0 +1,804 @@
+// SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
+/*
+ *
+ * (C) COPYRIGHT 2014-2022 ARM Limited. All rights reserved.
+ *
+ * This program is free software and is provided to you under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation, and any use by you of this program is subject to the terms
+ * of such GNU license.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, you can access it online at
+ * http://www.gnu.org/licenses/gpl-2.0.html.
+ *
+ */
+
+#include <mali_kbase.h>
+#include <tl/mali_kbase_tracepoints.h>
+#include <backend/gpu/mali_kbase_pm_internal.h>
+
+#include <linux/of.h>
+#include <linux/clk.h>
+#include <linux/devfreq.h>
+#if IS_ENABLED(CONFIG_DEVFREQ_THERMAL)
+#include <linux/devfreq_cooling.h>
+#endif
+
+#include <linux/version.h>
+#include <linux/pm_opp.h>
+#include "mali_kbase_devfreq.h"
+
+/**
+ * get_voltage() - Get the voltage value corresponding to the nominal frequency
+ *                 used by devfreq.
+ * @kbdev:    Device pointer
+ * @freq:     Nominal frequency in Hz passed by devfreq.
+ *
+ * This function will be called only when the opp table which is compatible with
+ * "operating-points-v2-mali", is not present in the devicetree for GPU device.
+ *
+ * Return: Voltage value in micro volts, 0 in case of error.
+ */
+static unsigned long get_voltage(struct kbase_device *kbdev, unsigned long freq)
+{
+	struct dev_pm_opp *opp;
+	unsigned long voltage = 0;
+
+#if KERNEL_VERSION(4, 11, 0) > LINUX_VERSION_CODE
+	rcu_read_lock();
+#endif
+
+	opp = dev_pm_opp_find_freq_exact(kbdev->dev, freq, true);
+
+	if (IS_ERR_OR_NULL(opp))
+		dev_err(kbdev->dev, "Failed to get opp (%d)\n", PTR_ERR_OR_ZERO(opp));
+	else {
+		voltage = dev_pm_opp_get_voltage(opp);
+#if KERNEL_VERSION(4, 11, 0) <= LINUX_VERSION_CODE
+		dev_pm_opp_put(opp);
+#endif
+	}
+
+#if KERNEL_VERSION(4, 11, 0) > LINUX_VERSION_CODE
+	rcu_read_unlock();
+#endif
+
+	/* Return the voltage in micro volts */
+	return voltage;
+}
+
+void kbase_devfreq_opp_translate(struct kbase_device *kbdev, unsigned long freq,
+	u64 *core_mask, unsigned long *freqs, unsigned long *volts)
+{
+	unsigned int i;
+
+	for (i = 0; i < kbdev->num_opps; i++) {
+		if (kbdev->devfreq_table[i].opp_freq == freq) {
+			unsigned int j;
+
+			*core_mask = kbdev->devfreq_table[i].core_mask;
+			for (j = 0; j < kbdev->nr_clocks; j++) {
+				freqs[j] =
+					kbdev->devfreq_table[i].real_freqs[j];
+				volts[j] =
+					kbdev->devfreq_table[i].opp_volts[j];
+			}
+
+			break;
+		}
+	}
+
+	/* If failed to find OPP, return all cores enabled
+	 * and nominal frequency and the corresponding voltage.
+	 */
+	if (i == kbdev->num_opps) {
+		unsigned long voltage = get_voltage(kbdev, freq);
+
+		*core_mask = kbdev->gpu_props.props.raw_props.shader_present;
+
+		for (i = 0; i < kbdev->nr_clocks; i++) {
+			freqs[i] = freq;
+			volts[i] = voltage;
+		}
+	}
+}
+
+static int
+kbase_devfreq_target(struct device *dev, unsigned long *target_freq, u32 flags)
+{
+	struct kbase_device *kbdev = dev_get_drvdata(dev);
+	struct dev_pm_opp *opp;
+	unsigned long nominal_freq;
+	unsigned long freqs[BASE_MAX_NR_CLOCKS_REGULATORS] = {0};
+#if IS_ENABLED(CONFIG_REGULATOR)
+	unsigned long original_freqs[BASE_MAX_NR_CLOCKS_REGULATORS] = {0};
+#endif
+	unsigned long volts[BASE_MAX_NR_CLOCKS_REGULATORS] = {0};
+	unsigned int i;
+	u64 core_mask;
+
+	nominal_freq = *target_freq;
+
+#if KERNEL_VERSION(4, 11, 0) > LINUX_VERSION_CODE
+	rcu_read_lock();
+#endif
+	opp = devfreq_recommended_opp(dev, &nominal_freq, flags);
+#if KERNEL_VERSION(4, 11, 0) > LINUX_VERSION_CODE
+	rcu_read_unlock();
+#endif
+	if (IS_ERR_OR_NULL(opp)) {
+		dev_err(dev, "Failed to get opp (%d)\n", PTR_ERR_OR_ZERO(opp));
+		return IS_ERR(opp) ? PTR_ERR(opp) : -ENODEV;
+	}
+#if KERNEL_VERSION(4, 11, 0) <= LINUX_VERSION_CODE
+	dev_pm_opp_put(opp);
+#endif
+
+	/*
+	 * Only update if there is a change of frequency
+	 */
+	if (kbdev->current_nominal_freq == nominal_freq) {
+		*target_freq = nominal_freq;
+		return 0;
+	}
+
+	kbase_devfreq_opp_translate(kbdev, nominal_freq, &core_mask,
+				    freqs, volts);
+
+#if IS_ENABLED(CONFIG_REGULATOR)
+	/* Regulators and clocks work in pairs: every clock has a regulator,
+	 * and we never expect to have more regulators than clocks.
+	 *
+	 * We always need to increase the voltage before increasing the number
+	 * of shader cores and the frequency of a regulator/clock pair,
+	 * otherwise the clock wouldn't have enough power to perform
+	 * the transition.
+	 *
+	 * It's always safer to decrease the number of shader cores and
+	 * the frequency before decreasing voltage of a regulator/clock pair,
+	 * otherwise the clock could have problematic operation if it is
+	 * deprived of the necessary power to sustain its current frequency
+	 * (even if that happens for a short transition interval).
+	 */
+	for (i = 0; i < kbdev->nr_clocks; i++) {
+		if (kbdev->regulators[i] &&
+				kbdev->current_voltages[i] != volts[i] &&
+				kbdev->current_freqs[i] < freqs[i]) {
+			int err;
+
+			err = regulator_set_voltage(kbdev->regulators[i],
+				volts[i], volts[i]);
+			if (!err) {
+				kbdev->current_voltages[i] = volts[i];
+			} else {
+				dev_err(dev, "Failed to increase voltage (%d) (target %lu)\n",
+					err, volts[i]);
+				return err;
+			}
+		}
+	}
+#endif
+
+	for (i = 0; i < kbdev->nr_clocks; i++) {
+		if (kbdev->clocks[i]) {
+			int err;
+
+			err = clk_set_rate(kbdev->clocks[i], freqs[i]);
+			if (!err) {
+#if IS_ENABLED(CONFIG_REGULATOR)
+				original_freqs[i] = kbdev->current_freqs[i];
+#endif
+				kbdev->current_freqs[i] = freqs[i];
+			} else {
+				dev_err(dev, "Failed to set clock %lu (target %lu)\n",
+					freqs[i], *target_freq);
+				return err;
+			}
+		}
+	}
+
+	kbase_devfreq_set_core_mask(kbdev, core_mask);
+
+#if IS_ENABLED(CONFIG_REGULATOR)
+	for (i = 0; i < kbdev->nr_clocks; i++) {
+		if (kbdev->regulators[i] &&
+				kbdev->current_voltages[i] != volts[i] &&
+				original_freqs[i] > freqs[i]) {
+			int err;
+
+			err = regulator_set_voltage(kbdev->regulators[i],
+				volts[i], volts[i]);
+			if (!err) {
+				kbdev->current_voltages[i] = volts[i];
+			} else {
+				dev_err(dev, "Failed to decrease voltage (%d) (target %lu)\n",
+					err, volts[i]);
+				return err;
+			}
+		}
+	}
+#endif
+
+	*target_freq = nominal_freq;
+	kbdev->current_nominal_freq = nominal_freq;
+	kbdev->current_core_mask = core_mask;
+
+	KBASE_TLSTREAM_AUX_DEVFREQ_TARGET(kbdev, (u64)nominal_freq);
+
+	return 0;
+}
+
+void kbase_devfreq_force_freq(struct kbase_device *kbdev, unsigned long freq)
+{
+	unsigned long target_freq = freq;
+
+	kbase_devfreq_target(kbdev->dev, &target_freq, 0);
+}
+
+static int
+kbase_devfreq_cur_freq(struct device *dev, unsigned long *freq)
+{
+	struct kbase_device *kbdev = dev_get_drvdata(dev);
+
+	*freq = kbdev->current_nominal_freq;
+
+	return 0;
+}
+
+static int
+kbase_devfreq_status(struct device *dev, struct devfreq_dev_status *stat)
+{
+	struct kbase_device *kbdev = dev_get_drvdata(dev);
+	struct kbasep_pm_metrics diff;
+#if !defined(CONFIG_MALI_MIDGARD_DVFS) && defined(CONFIG_AMLOGIC_MODIFY)
+	int utilisation, util_gl_share;
+	int util_cl_share[2];
+	int busy;
+#endif
+
+	kbase_pm_get_dvfs_metrics(kbdev, &kbdev->last_devfreq_metrics, &diff);
+
+	stat->busy_time = diff.time_busy;
+	stat->total_time = diff.time_busy + diff.time_idle;
+	stat->current_frequency = kbdev->current_nominal_freq;
+	stat->private_data = NULL;
+
+#if MALI_USE_CSF && defined CONFIG_DEVFREQ_THERMAL
+	kbase_ipa_reset_data(kbdev);
+#endif
+
+#if !defined(CONFIG_MALI_MIDGARD_DVFS) && defined(CONFIG_AMLOGIC_MODIFY)
+	utilisation = (100 * diff.time_busy) /
+			max(diff.time_busy + diff.time_idle, 1u);
+
+	busy = max(diff.busy_gl + diff.busy_cl[0] + diff.busy_cl[1], 1u);
+	util_gl_share = (100 * diff.busy_gl) / busy;
+	util_cl_share[0] = (100 * diff.busy_cl[0]) / busy;
+	util_cl_share[1] = (100 * diff.busy_cl[1]) / busy;
+
+	kbase_platform_dvfs_event(kbdev, utilisation, util_gl_share, util_cl_share);
+#endif
+
+	return 0;
+}
+
+static int kbase_devfreq_init_freq_table(struct kbase_device *kbdev,
+		struct devfreq_dev_profile *dp)
+{
+	int count;
+	int i = 0;
+	unsigned long freq;
+	struct dev_pm_opp *opp;
+
+#if KERNEL_VERSION(4, 11, 0) > LINUX_VERSION_CODE
+	rcu_read_lock();
+#endif
+	count = dev_pm_opp_get_opp_count(kbdev->dev);
+#if KERNEL_VERSION(4, 11, 0) > LINUX_VERSION_CODE
+	rcu_read_unlock();
+#endif
+	if (count < 0)
+		return count;
+
+	dp->freq_table = kmalloc_array(count, sizeof(dp->freq_table[0]),
+				GFP_KERNEL);
+	if (!dp->freq_table)
+		return -ENOMEM;
+
+#if KERNEL_VERSION(4, 11, 0) > LINUX_VERSION_CODE
+	rcu_read_lock();
+#endif
+	for (i = 0, freq = ULONG_MAX; i < count; i++, freq--) {
+		opp = dev_pm_opp_find_freq_floor(kbdev->dev, &freq);
+		if (IS_ERR(opp))
+			break;
+#if KERNEL_VERSION(4, 11, 0) <= LINUX_VERSION_CODE
+		dev_pm_opp_put(opp);
+#endif /* KERNEL_VERSION(4, 11, 0) <= LINUX_VERSION_CODE */
+
+		dp->freq_table[i] = freq;
+	}
+#if KERNEL_VERSION(4, 11, 0) > LINUX_VERSION_CODE
+	rcu_read_unlock();
+#endif
+
+	if (count != i)
+		dev_warn(kbdev->dev, "Unable to enumerate all OPPs (%d!=%d\n",
+				count, i);
+
+	dp->max_state = i;
+
+
+	/* Have the lowest clock as suspend clock.
+	 * It may be overridden by 'opp-mali-errata-1485982'.
+	 */
+	if (kbdev->pm.backend.gpu_clock_slow_down_wa) {
+		freq = 0;
+		opp = dev_pm_opp_find_freq_ceil(kbdev->dev, &freq);
+		if (IS_ERR(opp)) {
+			dev_err(kbdev->dev, "failed to find slowest clock");
+			return 0;
+		}
+		dev_info(kbdev->dev, "suspend clock %lu from slowest", freq);
+		kbdev->pm.backend.gpu_clock_suspend_freq = freq;
+	}
+
+	return 0;
+}
+
+static void kbase_devfreq_term_freq_table(struct kbase_device *kbdev)
+{
+	struct devfreq_dev_profile *dp = &kbdev->devfreq_profile;
+
+	kfree(dp->freq_table);
+	dp->freq_table = NULL;
+}
+
+static void kbase_devfreq_term_core_mask_table(struct kbase_device *kbdev)
+{
+	kfree(kbdev->devfreq_table);
+	kbdev->devfreq_table = NULL;
+}
+
+static void kbase_devfreq_exit(struct device *dev)
+{
+	struct kbase_device *kbdev = dev_get_drvdata(dev);
+
+	if (kbdev)
+		kbase_devfreq_term_freq_table(kbdev);
+}
+
+static void kbasep_devfreq_read_suspend_clock(struct kbase_device *kbdev,
+		struct device_node *node)
+{
+	u64 freq = 0;
+	int err = 0;
+
+	/* Check if this node is the opp entry having 'opp-mali-errata-1485982'
+	 * to get the suspend clock, otherwise skip it.
+	 */
+	if (!of_property_read_bool(node, "opp-mali-errata-1485982"))
+		return;
+
+	/* In kbase DevFreq, the clock will be read from 'opp-hz'
+	 * and translated into the actual clock by opp_translate.
+	 *
+	 * In customer DVFS, the clock will be read from 'opp-hz-real'
+	 * for clk driver. If 'opp-hz-real' does not exist,
+	 * read from 'opp-hz'.
+	 */
+	if (IS_ENABLED(CONFIG_MALI_DEVFREQ))
+		err = of_property_read_u64(node, "opp-hz", &freq);
+	else {
+		if (of_property_read_u64(node, "opp-hz-real", &freq))
+			err = of_property_read_u64(node, "opp-hz", &freq);
+	}
+
+	if (WARN_ON(err || !freq))
+		return;
+
+	kbdev->pm.backend.gpu_clock_suspend_freq = freq;
+	dev_info(kbdev->dev,
+		"suspend clock %llu by opp-mali-errata-1485982", freq);
+}
+
+static int kbase_devfreq_init_core_mask_table(struct kbase_device *kbdev)
+{
+#ifndef CONFIG_OF
+	/* OPP table initialization requires at least the capability to get
+	 * regulators and clocks from the device tree, as well as parsing
+	 * arrays of unsigned integer values.
+	 *
+	 * The whole initialization process shall simply be skipped if the
+	 * minimum capability is not available.
+	 */
+	return 0;
+#else
+	struct device_node *opp_node = of_parse_phandle(kbdev->dev->of_node,
+			"operating-points-v2", 0);
+	struct device_node *node;
+	int i = 0;
+	int count;
+	u64 shader_present = kbdev->gpu_props.props.raw_props.shader_present;
+
+	if (!opp_node)
+		return 0;
+	if (!of_device_is_compatible(opp_node, "operating-points-v2-mali"))
+		return 0;
+
+	count = dev_pm_opp_get_opp_count(kbdev->dev);
+	kbdev->devfreq_table = kmalloc_array(count,
+			sizeof(struct kbase_devfreq_opp), GFP_KERNEL);
+	if (!kbdev->devfreq_table)
+		return -ENOMEM;
+
+	for_each_available_child_of_node(opp_node, node) {
+		const void *core_count_p;
+		u64 core_mask, opp_freq,
+			real_freqs[BASE_MAX_NR_CLOCKS_REGULATORS];
+		int err;
+#if IS_ENABLED(CONFIG_REGULATOR)
+		u32 opp_volts[BASE_MAX_NR_CLOCKS_REGULATORS];
+#endif
+
+		/* Read suspend clock from opp table */
+		if (kbdev->pm.backend.gpu_clock_slow_down_wa)
+			kbasep_devfreq_read_suspend_clock(kbdev, node);
+
+		err = of_property_read_u64(node, "opp-hz", &opp_freq);
+		if (err) {
+			dev_warn(kbdev->dev, "Failed to read opp-hz property with error %d\n",
+					err);
+			continue;
+		}
+
+
+#if BASE_MAX_NR_CLOCKS_REGULATORS > 1
+		err = of_property_read_u64_array(node, "opp-hz-real",
+				real_freqs, kbdev->nr_clocks);
+#else
+		WARN_ON(kbdev->nr_clocks != 1);
+		err = of_property_read_u64(node, "opp-hz-real", real_freqs);
+#endif
+		if (err < 0) {
+			dev_warn(kbdev->dev, "Failed to read opp-hz-real property with error %d\n",
+					err);
+			continue;
+		}
+#if IS_ENABLED(CONFIG_REGULATOR)
+		err = of_property_read_u32_array(node,
+			"opp-microvolt", opp_volts, kbdev->nr_regulators);
+		if (err < 0) {
+			dev_warn(kbdev->dev, "Failed to read opp-microvolt property with error %d\n",
+					err);
+			continue;
+		}
+#endif
+
+		if (of_property_read_u64(node, "opp-core-mask", &core_mask))
+			core_mask = shader_present;
+		if (core_mask != shader_present && corestack_driver_control) {
+
+			dev_warn(kbdev->dev, "Ignoring OPP %llu - Dynamic Core Scaling not supported on this GPU\n",
+					opp_freq);
+			continue;
+		}
+
+		core_count_p = of_get_property(node, "opp-core-count", NULL);
+		if (core_count_p) {
+			u64 remaining_core_mask =
+				kbdev->gpu_props.props.raw_props.shader_present;
+			int core_count = be32_to_cpup(core_count_p);
+
+			core_mask = 0;
+
+			for (; core_count > 0; core_count--) {
+				int core = ffs(remaining_core_mask);
+
+				if (!core) {
+					dev_err(kbdev->dev, "OPP has more cores than GPU\n");
+					return -ENODEV;
+				}
+
+				core_mask |= (1ull << (core-1));
+				remaining_core_mask &= ~(1ull << (core-1));
+			}
+		}
+
+		if (!core_mask) {
+			dev_err(kbdev->dev, "OPP has invalid core mask of 0\n");
+			return -ENODEV;
+		}
+
+		kbdev->devfreq_table[i].opp_freq = opp_freq;
+		kbdev->devfreq_table[i].core_mask = core_mask;
+		if (kbdev->nr_clocks > 0) {
+			int j;
+
+			for (j = 0; j < kbdev->nr_clocks; j++)
+				kbdev->devfreq_table[i].real_freqs[j] =
+					real_freqs[j];
+		}
+#if IS_ENABLED(CONFIG_REGULATOR)
+		if (kbdev->nr_regulators > 0) {
+			int j;
+
+			for (j = 0; j < kbdev->nr_regulators; j++)
+				kbdev->devfreq_table[i].opp_volts[j] =
+						opp_volts[j];
+		}
+#endif
+
+		dev_info(kbdev->dev, "OPP %d : opp_freq=%llu core_mask=%llx\n",
+				i, opp_freq, core_mask);
+
+		i++;
+	}
+
+	kbdev->num_opps = i;
+
+	return 0;
+#endif /* CONFIG_OF */
+}
+
+static const char *kbase_devfreq_req_type_name(enum kbase_devfreq_work_type type)
+{
+	const char *p;
+
+	switch (type) {
+	case DEVFREQ_WORK_NONE:
+		p = "devfreq_none";
+		break;
+	case DEVFREQ_WORK_SUSPEND:
+		p = "devfreq_suspend";
+		break;
+	case DEVFREQ_WORK_RESUME:
+		p = "devfreq_resume";
+		break;
+	default:
+		p = "Unknown devfreq_type";
+	}
+	return p;
+}
+
+static void kbase_devfreq_suspend_resume_worker(struct work_struct *work)
+{
+	struct kbase_devfreq_queue_info *info = container_of(work,
+			struct kbase_devfreq_queue_info, work);
+	struct kbase_device *kbdev = container_of(info, struct kbase_device,
+			devfreq_queue);
+	unsigned long flags;
+	enum kbase_devfreq_work_type type, acted_type;
+
+	spin_lock_irqsave(&kbdev->hwaccess_lock, flags);
+	type = kbdev->devfreq_queue.req_type;
+	spin_unlock_irqrestore(&kbdev->hwaccess_lock, flags);
+
+	acted_type = kbdev->devfreq_queue.acted_type;
+	dev_dbg(kbdev->dev, "Worker handles queued req: %s (acted: %s)\n",
+		kbase_devfreq_req_type_name(type),
+		kbase_devfreq_req_type_name(acted_type));
+	switch (type) {
+	case DEVFREQ_WORK_SUSPEND:
+	case DEVFREQ_WORK_RESUME:
+		if (type != acted_type) {
+			if (type == DEVFREQ_WORK_RESUME)
+				devfreq_resume_device(kbdev->devfreq);
+			else
+				devfreq_suspend_device(kbdev->devfreq);
+			dev_dbg(kbdev->dev, "Devfreq transition occured: %s => %s\n",
+				kbase_devfreq_req_type_name(acted_type),
+				kbase_devfreq_req_type_name(type));
+			kbdev->devfreq_queue.acted_type = type;
+		}
+		break;
+	default:
+		WARN_ON(1);
+	}
+}
+
+void kbase_devfreq_enqueue_work(struct kbase_device *kbdev,
+				       enum kbase_devfreq_work_type work_type)
+{
+	unsigned long flags;
+
+	WARN_ON(work_type == DEVFREQ_WORK_NONE);
+	spin_lock_irqsave(&kbdev->hwaccess_lock, flags);
+	/* Skip enqueuing a work if workqueue has already been terminated. */
+	if (likely(kbdev->devfreq_queue.workq)) {
+		kbdev->devfreq_queue.req_type = work_type;
+		queue_work(kbdev->devfreq_queue.workq,
+			   &kbdev->devfreq_queue.work);
+	}
+	spin_unlock_irqrestore(&kbdev->hwaccess_lock, flags);
+	dev_dbg(kbdev->dev, "Enqueuing devfreq req: %s\n",
+		kbase_devfreq_req_type_name(work_type));
+}
+
+static int kbase_devfreq_work_init(struct kbase_device *kbdev)
+{
+	kbdev->devfreq_queue.req_type = DEVFREQ_WORK_NONE;
+	kbdev->devfreq_queue.acted_type = DEVFREQ_WORK_RESUME;
+
+	kbdev->devfreq_queue.workq = alloc_ordered_workqueue("devfreq_workq", 0);
+	if (!kbdev->devfreq_queue.workq)
+		return -ENOMEM;
+
+	INIT_WORK(&kbdev->devfreq_queue.work,
+			kbase_devfreq_suspend_resume_worker);
+	return 0;
+}
+
+static void kbase_devfreq_work_term(struct kbase_device *kbdev)
+{
+	unsigned long flags;
+	struct workqueue_struct *workq;
+
+	spin_lock_irqsave(&kbdev->hwaccess_lock, flags);
+	workq = kbdev->devfreq_queue.workq;
+	kbdev->devfreq_queue.workq = NULL;
+	spin_unlock_irqrestore(&kbdev->hwaccess_lock, flags);
+
+	destroy_workqueue(workq);
+}
+
+
+int kbase_devfreq_init(struct kbase_device *kbdev)
+{
+	struct devfreq_dev_profile *dp;
+	int err;
+	unsigned int i;
+	bool free_devfreq_freq_table = true;
+
+	if (kbdev->nr_clocks == 0) {
+		dev_err(kbdev->dev, "Clock not available for devfreq\n");
+		return -ENODEV;
+	}
+
+	for (i = 0; i < kbdev->nr_clocks; i++) {
+		if (kbdev->clocks[i])
+			kbdev->current_freqs[i] =
+				clk_get_rate(kbdev->clocks[i]);
+		else
+			kbdev->current_freqs[i] = 0;
+	}
+	kbdev->current_nominal_freq = kbdev->current_freqs[0];
+
+	dp = &kbdev->devfreq_profile;
+
+	dp->initial_freq = kbdev->current_freqs[0];
+	dp->polling_ms = 100;
+	dp->target = kbase_devfreq_target;
+	dp->get_dev_status = kbase_devfreq_status;
+	dp->get_cur_freq = kbase_devfreq_cur_freq;
+	dp->exit = kbase_devfreq_exit;
+
+	if (kbase_devfreq_init_freq_table(kbdev, dp))
+		return -EFAULT;
+
+	if (dp->max_state > 0) {
+		/* Record the maximum frequency possible */
+		kbdev->gpu_props.props.core_props.gpu_freq_khz_max =
+			dp->freq_table[0] / 1000;
+	}
+
+#if IS_ENABLED(CONFIG_DEVFREQ_THERMAL)
+	err = kbase_ipa_init(kbdev);
+	if (err) {
+		dev_err(kbdev->dev, "IPA initialization failed");
+		goto ipa_init_failed;
+	}
+#endif
+
+	err = kbase_devfreq_init_core_mask_table(kbdev);
+	if (err)
+		goto init_core_mask_table_failed;
+
+	kbdev->devfreq = devfreq_add_device(kbdev->dev, dp,
+				"simple_ondemand", NULL);
+	if (IS_ERR(kbdev->devfreq)) {
+		err = PTR_ERR(kbdev->devfreq);
+		kbdev->devfreq = NULL;
+		dev_err(kbdev->dev, "Fail to add devfreq device(%d)", err);
+		goto devfreq_add_dev_failed;
+	}
+
+	/* Explicit free of freq table isn't needed after devfreq_add_device() */
+	free_devfreq_freq_table = false;
+
+	/* Initialize devfreq suspend/resume workqueue */
+	err = kbase_devfreq_work_init(kbdev);
+	if (err) {
+		dev_err(kbdev->dev, "Fail to init devfreq workqueue");
+		goto devfreq_work_init_failed;
+	}
+
+	/* devfreq_add_device only copies a few of kbdev->dev's fields, so
+	 * set drvdata explicitly so IPA models can access kbdev.
+	 */
+	dev_set_drvdata(&kbdev->devfreq->dev, kbdev);
+
+	err = devfreq_register_opp_notifier(kbdev->dev, kbdev->devfreq);
+	if (err) {
+		dev_err(kbdev->dev,
+			"Failed to register OPP notifier (%d)", err);
+		goto opp_notifier_failed;
+	}
+
+#if IS_ENABLED(CONFIG_DEVFREQ_THERMAL)
+	kbdev->devfreq_cooling = of_devfreq_cooling_register_power(
+			kbdev->dev->of_node,
+			kbdev->devfreq,
+			&kbase_ipa_power_model_ops);
+	if (IS_ERR_OR_NULL(kbdev->devfreq_cooling)) {
+		err = PTR_ERR_OR_ZERO(kbdev->devfreq_cooling);
+		dev_err(kbdev->dev,
+			"Failed to register cooling device (%d)", err);
+		err = err == 0 ? -ENODEV : err;
+		goto cooling_reg_failed;
+	}
+#endif
+
+	return 0;
+
+#if IS_ENABLED(CONFIG_DEVFREQ_THERMAL)
+cooling_reg_failed:
+	devfreq_unregister_opp_notifier(kbdev->dev, kbdev->devfreq);
+#endif /* CONFIG_DEVFREQ_THERMAL */
+
+opp_notifier_failed:
+	kbase_devfreq_work_term(kbdev);
+
+devfreq_work_init_failed:
+	if (devfreq_remove_device(kbdev->devfreq))
+		dev_err(kbdev->dev, "Failed to terminate devfreq (%d)", err);
+
+	kbdev->devfreq = NULL;
+
+devfreq_add_dev_failed:
+	kbase_devfreq_term_core_mask_table(kbdev);
+
+init_core_mask_table_failed:
+#if IS_ENABLED(CONFIG_DEVFREQ_THERMAL)
+	kbase_ipa_term(kbdev);
+ipa_init_failed:
+#endif
+	if (free_devfreq_freq_table)
+		kbase_devfreq_term_freq_table(kbdev);
+
+	return err;
+}
+
+void kbase_devfreq_term(struct kbase_device *kbdev)
+{
+	int err;
+
+	dev_dbg(kbdev->dev, "Term Mali devfreq\n");
+
+#if IS_ENABLED(CONFIG_DEVFREQ_THERMAL)
+	if (kbdev->devfreq_cooling)
+		devfreq_cooling_unregister(kbdev->devfreq_cooling);
+#endif
+
+	devfreq_unregister_opp_notifier(kbdev->dev, kbdev->devfreq);
+
+	kbase_devfreq_work_term(kbdev);
+
+	err = devfreq_remove_device(kbdev->devfreq);
+	if (err)
+		dev_err(kbdev->dev, "Failed to terminate devfreq (%d)\n", err);
+	else
+		kbdev->devfreq = NULL;
+
+	kbase_devfreq_term_core_mask_table(kbdev);
+
+#if IS_ENABLED(CONFIG_DEVFREQ_THERMAL)
+	kbase_ipa_term(kbdev);
+#endif
+}

diff --git a/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.h b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.h
new file mode 100644
index 0000000..ac88b02
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_devfreq.h

@@ -0,0 +1,62 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
+/*
+ *
+ * (C) COPYRIGHT 2014, 2019-2021 ARM Limited. All rights reserved.
+ *
+ * This program is free software and is provided to you under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation, and any use by you of this program is subject to the terms
+ * of such GNU license.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, you can access it online at
+ * http://www.gnu.org/licenses/gpl-2.0.html.
+ *
+ */
+
+#ifndef _BASE_DEVFREQ_H_
+#define _BASE_DEVFREQ_H_
+
+int kbase_devfreq_init(struct kbase_device *kbdev);
+
+void kbase_devfreq_term(struct kbase_device *kbdev);
+
+/**
+ * kbase_devfreq_force_freq - Set GPU frequency on L2 power on/off.
+ * @kbdev:      Device pointer
+ * @freq:       GPU frequency in HZ to be set when
+ *              MALI_HW_ERRATA_1485982_USE_CLOCK_ALTERNATIVE is enabled
+ */
+void kbase_devfreq_force_freq(struct kbase_device *kbdev, unsigned long freq);
+
+/**
+ * kbase_devfreq_enqueue_work - Enqueue a work item for suspend/resume devfreq.
+ * @kbdev:      Device pointer
+ * @work_type:  The type of the devfreq work item, i.e. suspend or resume
+ */
+void kbase_devfreq_enqueue_work(struct kbase_device *kbdev,
+				enum kbase_devfreq_work_type work_type);
+
+/**
+ * kbase_devfreq_opp_translate - Translate nominal OPP frequency from devicetree
+ *                               into real frequency & voltage pair, along with
+ *                               core mask
+ * @kbdev:     Device pointer
+ * @freq:      Nominal frequency
+ * @core_mask: Pointer to u64 to store core mask to
+ * @freqs:     Pointer to array of frequencies
+ * @volts:     Pointer to array of voltages
+ *
+ * This function will only perform translation if an operating-points-v2-mali
+ * table is present in devicetree. If one is not present then it will return an
+ * untranslated frequency (and corresponding voltage) and all cores enabled.
+ * The voltages returned are in micro Volts (uV).
+ */
+void kbase_devfreq_opp_translate(struct kbase_device *kbdev, unsigned long freq,
+	u64 *core_mask, unsigned long *freqs, unsigned long *volts);
+#endif /* _BASE_DEVFREQ_H_ */

diff --git a/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_gpuprops_backend.c b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_gpuprops_backend.c
new file mode 100644
index 0000000..10e92ec
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_gpuprops_backend.c

@@ -0,0 +1,200 @@
+// SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
+/*
+ *
+ * (C) COPYRIGHT 2014-2022 ARM Limited. All rights reserved.
+ *
+ * This program is free software and is provided to you under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation, and any use by you of this program is subject to the terms
+ * of such GNU license.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, you can access it online at
+ * http://www.gnu.org/licenses/gpl-2.0.html.
+ *
+ */
+
+/*
+ * Base kernel property query backend APIs
+ */
+
+#include <mali_kbase.h>
+#include <device/mali_kbase_device.h>
+#include <backend/gpu/mali_kbase_pm_internal.h>
+#include <backend/gpu/mali_kbase_cache_policy_backend.h>
+#include <mali_kbase_hwaccess_gpuprops.h>
+
+int kbase_backend_gpuprops_get(struct kbase_device *kbdev,
+					struct kbase_gpuprops_regdump *regdump)
+{
+	int i;
+	struct kbase_gpuprops_regdump registers = { 0 };
+
+	/* Fill regdump with the content of the relevant registers */
+	registers.gpu_id = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_ID));
+
+	registers.l2_features = kbase_reg_read(kbdev,
+				GPU_CONTROL_REG(L2_FEATURES));
+
+	registers.tiler_features = kbase_reg_read(kbdev,
+				GPU_CONTROL_REG(TILER_FEATURES));
+	registers.mem_features = kbase_reg_read(kbdev,
+				GPU_CONTROL_REG(MEM_FEATURES));
+	registers.mmu_features = kbase_reg_read(kbdev,
+				GPU_CONTROL_REG(MMU_FEATURES));
+	registers.as_present = kbase_reg_read(kbdev,
+				GPU_CONTROL_REG(AS_PRESENT));
+#if !MALI_USE_CSF
+	registers.js_present = kbase_reg_read(kbdev,
+				GPU_CONTROL_REG(JS_PRESENT));
+#else /* !MALI_USE_CSF */
+	registers.js_present = 0;
+#endif /* !MALI_USE_CSF */
+
+	for (i = 0; i < GPU_MAX_JOB_SLOTS; i++)
+#if !MALI_USE_CSF
+		registers.js_features[i] = kbase_reg_read(kbdev,
+				GPU_CONTROL_REG(JS_FEATURES_REG(i)));
+#else /* !MALI_USE_CSF */
+		registers.js_features[i] = 0;
+#endif /* !MALI_USE_CSF */
+
+	for (i = 0; i < BASE_GPU_NUM_TEXTURE_FEATURES_REGISTERS; i++)
+		registers.texture_features[i] = kbase_reg_read(kbdev,
+				GPU_CONTROL_REG(TEXTURE_FEATURES_REG(i)));
+
+	registers.thread_max_threads = kbase_reg_read(kbdev,
+				GPU_CONTROL_REG(THREAD_MAX_THREADS));
+	registers.thread_max_workgroup_size = kbase_reg_read(kbdev,
+				GPU_CONTROL_REG(THREAD_MAX_WORKGROUP_SIZE));
+	registers.thread_max_barrier_size = kbase_reg_read(kbdev,
+				GPU_CONTROL_REG(THREAD_MAX_BARRIER_SIZE));
+	registers.thread_features = kbase_reg_read(kbdev,
+				GPU_CONTROL_REG(THREAD_FEATURES));
+	registers.thread_tls_alloc = kbase_reg_read(kbdev,
+				GPU_CONTROL_REG(THREAD_TLS_ALLOC));
+
+	registers.shader_present_lo = kbase_reg_read(kbdev,
+				GPU_CONTROL_REG(SHADER_PRESENT_LO));
+	registers.shader_present_hi = kbase_reg_read(kbdev,
+				GPU_CONTROL_REG(SHADER_PRESENT_HI));
+
+	registers.tiler_present_lo = kbase_reg_read(kbdev,
+				GPU_CONTROL_REG(TILER_PRESENT_LO));
+	registers.tiler_present_hi = kbase_reg_read(kbdev,
+				GPU_CONTROL_REG(TILER_PRESENT_HI));
+
+	registers.l2_present_lo = kbase_reg_read(kbdev,
+				GPU_CONTROL_REG(L2_PRESENT_LO));
+	registers.l2_present_hi = kbase_reg_read(kbdev,
+				GPU_CONTROL_REG(L2_PRESENT_HI));
+
+	registers.stack_present_lo = kbase_reg_read(kbdev,
+				GPU_CONTROL_REG(STACK_PRESENT_LO));
+	registers.stack_present_hi = kbase_reg_read(kbdev,
+				GPU_CONTROL_REG(STACK_PRESENT_HI));
+
+	if (registers.gpu_id >= GPU_ID2_PRODUCT_MAKE(11, 8, 5, 2)) {
+		registers.gpu_features_lo = kbase_reg_read(kbdev,
+					GPU_CONTROL_REG(GPU_FEATURES_LO));
+		registers.gpu_features_hi = kbase_reg_read(kbdev,
+					GPU_CONTROL_REG(GPU_FEATURES_HI));
+	} else {
+		registers.gpu_features_lo = 0;
+		registers.gpu_features_hi = 0;
+	}
+
+	if (!kbase_is_gpu_removed(kbdev)) {
+		*regdump = registers;
+		return 0;
+	} else
+		return -EIO;
+}
+
+int kbase_backend_gpuprops_get_curr_config(struct kbase_device *kbdev,
+		struct kbase_current_config_regdump *curr_config_regdump)
+{
+	if (WARN_ON(!kbdev) || WARN_ON(!curr_config_regdump))
+		return -EINVAL;
+
+	curr_config_regdump->mem_features = kbase_reg_read(kbdev,
+					GPU_CONTROL_REG(MEM_FEATURES));
+
+	curr_config_regdump->shader_present_lo = kbase_reg_read(kbdev,
+					GPU_CONTROL_REG(SHADER_PRESENT_LO));
+	curr_config_regdump->shader_present_hi = kbase_reg_read(kbdev,
+					GPU_CONTROL_REG(SHADER_PRESENT_HI));
+
+	curr_config_regdump->l2_present_lo = kbase_reg_read(kbdev,
+					GPU_CONTROL_REG(L2_PRESENT_LO));
+	curr_config_regdump->l2_present_hi = kbase_reg_read(kbdev,
+					GPU_CONTROL_REG(L2_PRESENT_HI));
+
+	if (kbase_is_gpu_removed(kbdev))
+		return -EIO;
+
+	return 0;
+
+}
+
+int kbase_backend_gpuprops_get_features(struct kbase_device *kbdev,
+					struct kbase_gpuprops_regdump *regdump)
+{
+	u32 coherency_features;
+	int error = 0;
+
+	/* Ensure we can access the GPU registers */
+	kbase_pm_register_access_enable(kbdev);
+
+	coherency_features = kbase_cache_get_coherency_features(kbdev);
+
+	if (kbase_is_gpu_removed(kbdev))
+		error = -EIO;
+
+	regdump->coherency_features = coherency_features;
+
+	if (kbase_hw_has_feature(kbdev, BASE_HW_FEATURE_CORE_FEATURES))
+		regdump->core_features = kbase_reg_read(kbdev, GPU_CONTROL_REG(CORE_FEATURES));
+	else
+		regdump->core_features = 0;
+
+	kbase_pm_register_access_disable(kbdev);
+
+	return error;
+}
+
+int kbase_backend_gpuprops_get_l2_features(struct kbase_device *kbdev,
+					struct kbase_gpuprops_regdump *regdump)
+{
+	if (kbase_hw_has_feature(kbdev, BASE_HW_FEATURE_L2_CONFIG)) {
+		u32 l2_features = kbase_reg_read(kbdev,
+				GPU_CONTROL_REG(L2_FEATURES));
+		u32 l2_config =
+			kbase_reg_read(kbdev, GPU_CONTROL_REG(L2_CONFIG));
+		u32 asn_hash[ASN_HASH_COUNT] = {
+			0,
+		};
+		int i;
+
+		if (kbase_hw_has_feature(kbdev, BASE_HW_FEATURE_ASN_HASH)) {
+			for (i = 0; i < ASN_HASH_COUNT; i++)
+				asn_hash[i] = kbase_reg_read(
+					kbdev, GPU_CONTROL_REG(ASN_HASH(i)));
+		}
+
+		if (kbase_is_gpu_removed(kbdev))
+			return -EIO;
+
+		regdump->l2_features = l2_features;
+		regdump->l2_config = l2_config;
+		for (i = 0; i < ASN_HASH_COUNT; i++)
+			regdump->l2_asn_hash[i] = asn_hash[i];
+	}
+
+	return 0;
+}

diff --git a/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_instr_backend.c b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_instr_backend.c
new file mode 100644
index 0000000..b89b917
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_instr_backend.c

@@ -0,0 +1,481 @@
+// SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
+/*
+ *
+ * (C) COPYRIGHT 2014-2022 ARM Limited. All rights reserved.
+ *
+ * This program is free software and is provided to you under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation, and any use by you of this program is subject to the terms
+ * of such GNU license.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, you can access it online at
+ * http://www.gnu.org/licenses/gpl-2.0.html.
+ *
+ */
+
+/*
+ * GPU backend instrumentation APIs.
+ */
+
+#include <mali_kbase.h>
+#include <gpu/mali_kbase_gpu_regmap.h>
+#include <mali_kbase_hwaccess_instr.h>
+#include <device/mali_kbase_device.h>
+#include <backend/gpu/mali_kbase_instr_internal.h>
+
+static int wait_prfcnt_ready(struct kbase_device *kbdev)
+{
+	u32 loops;
+
+	for (loops = 0; loops < KBASE_PRFCNT_ACTIVE_MAX_LOOPS; loops++) {
+		const u32 prfcnt_active = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_STATUS)) &
+								  GPU_STATUS_PRFCNT_ACTIVE;
+		if (!prfcnt_active)
+			return 0;
+	}
+
+	dev_err(kbdev->dev, "PRFCNT_ACTIVE bit stuck\n");
+	return -EBUSY;
+}
+
+int kbase_instr_hwcnt_enable_internal(struct kbase_device *kbdev,
+					struct kbase_context *kctx,
+					struct kbase_instr_hwcnt_enable *enable)
+{
+	unsigned long flags;
+	int err = -EINVAL;
+	u32 irq_mask;
+	u32 prfcnt_config;
+
+	lockdep_assert_held(&kbdev->hwaccess_lock);
+
+	/* alignment failure */
+	if ((enable->dump_buffer == 0ULL) || (enable->dump_buffer & (2048 - 1)))
+		return err;
+
+	spin_lock_irqsave(&kbdev->hwcnt.lock, flags);
+
+	if (kbdev->hwcnt.backend.state != KBASE_INSTR_STATE_DISABLED) {
+		/* Instrumentation is already enabled */
+		spin_unlock_irqrestore(&kbdev->hwcnt.lock, flags);
+		return err;
+	}
+
+	if (kbase_is_gpu_removed(kbdev)) {
+		/* GPU has been removed by Arbiter */
+		spin_unlock_irqrestore(&kbdev->hwcnt.lock, flags);
+		return err;
+	}
+
+	/* Enable interrupt */
+	irq_mask = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_MASK));
+	kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_MASK), irq_mask |
+						PRFCNT_SAMPLE_COMPLETED);
+
+	/* In use, this context is the owner */
+	kbdev->hwcnt.kctx = kctx;
+	/* Remember the dump address so we can reprogram it later */
+	kbdev->hwcnt.addr = enable->dump_buffer;
+	kbdev->hwcnt.addr_bytes = enable->dump_buffer_bytes;
+
+	spin_unlock_irqrestore(&kbdev->hwcnt.lock, flags);
+
+	/* Configure */
+	prfcnt_config = kctx->as_nr << PRFCNT_CONFIG_AS_SHIFT;
+#ifdef CONFIG_MALI_PRFCNT_SET_SELECT_VIA_DEBUG_FS
+	prfcnt_config |= kbdev->hwcnt.backend.override_counter_set
+			 << PRFCNT_CONFIG_SETSELECT_SHIFT;
+#else
+	prfcnt_config |= enable->counter_set << PRFCNT_CONFIG_SETSELECT_SHIFT;
+#endif
+
+	/* Wait until prfcnt config register can be written */
+	err = wait_prfcnt_ready(kbdev);
+	if (err)
+		return err;
+
+	kbase_reg_write(kbdev, GPU_CONTROL_REG(PRFCNT_CONFIG),
+			prfcnt_config | PRFCNT_CONFIG_MODE_OFF);
+
+	/* Wait until prfcnt is disabled before writing configuration registers */
+	err = wait_prfcnt_ready(kbdev);
+	if (err)
+		return err;
+
+	kbase_reg_write(kbdev, GPU_CONTROL_REG(PRFCNT_BASE_LO),
+					enable->dump_buffer & 0xFFFFFFFF);
+	kbase_reg_write(kbdev, GPU_CONTROL_REG(PRFCNT_BASE_HI),
+					enable->dump_buffer >> 32);
+
+	kbase_reg_write(kbdev, GPU_CONTROL_REG(PRFCNT_JM_EN),
+					enable->fe_bm);
+
+	kbase_reg_write(kbdev, GPU_CONTROL_REG(PRFCNT_SHADER_EN),
+					enable->shader_bm);
+	kbase_reg_write(kbdev, GPU_CONTROL_REG(PRFCNT_MMU_L2_EN),
+					enable->mmu_l2_bm);
+
+	kbase_reg_write(kbdev, GPU_CONTROL_REG(PRFCNT_TILER_EN),
+					enable->tiler_bm);
+
+	kbase_reg_write(kbdev, GPU_CONTROL_REG(PRFCNT_CONFIG),
+			prfcnt_config | PRFCNT_CONFIG_MODE_MANUAL);
+
+	spin_lock_irqsave(&kbdev->hwcnt.lock, flags);
+
+	kbdev->hwcnt.backend.state = KBASE_INSTR_STATE_IDLE;
+	kbdev->hwcnt.backend.triggered = 1;
+	wake_up(&kbdev->hwcnt.backend.wait);
+
+	spin_unlock_irqrestore(&kbdev->hwcnt.lock, flags);
+
+	dev_dbg(kbdev->dev, "HW counters dumping set-up for context %pK", kctx);
+	return 0;
+}
+
+static void kbasep_instr_hwc_disable_hw_prfcnt(struct kbase_device *kbdev)
+{
+	u32 irq_mask;
+
+	lockdep_assert_held(&kbdev->hwaccess_lock);
+	lockdep_assert_held(&kbdev->hwcnt.lock);
+
+	if (kbase_is_gpu_removed(kbdev))
+		/* GPU has been removed by Arbiter */
+		return;
+
+	/* Disable interrupt */
+	irq_mask = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_MASK));
+
+	kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_IRQ_MASK), irq_mask & ~PRFCNT_SAMPLE_COMPLETED);
+
+	/* Wait until prfcnt config register can be written, then disable the counters.
+	 * Return value is ignored as we are disabling anyway.
+	 */
+	wait_prfcnt_ready(kbdev);
+	kbase_reg_write(kbdev, GPU_CONTROL_REG(PRFCNT_CONFIG), 0);
+
+	kbdev->hwcnt.kctx = NULL;
+	kbdev->hwcnt.addr = 0ULL;
+	kbdev->hwcnt.addr_bytes = 0ULL;
+}
+
+int kbase_instr_hwcnt_disable_internal(struct kbase_context *kctx)
+{
+	unsigned long flags, pm_flags;
+	struct kbase_device *kbdev = kctx->kbdev;
+
+	while (1) {
+		spin_lock_irqsave(&kbdev->hwaccess_lock, pm_flags);
+		spin_lock_irqsave(&kbdev->hwcnt.lock, flags);
+
+		if (kbdev->hwcnt.backend.state == KBASE_INSTR_STATE_UNRECOVERABLE_ERROR) {
+			/* Instrumentation is in unrecoverable error state,
+			 * there is nothing for us to do.
+			 */
+			spin_unlock_irqrestore(&kbdev->hwcnt.lock, flags);
+			spin_unlock_irqrestore(&kbdev->hwaccess_lock, pm_flags);
+			/* Already disabled, return no error. */
+			return 0;
+		}
+
+		if (kbdev->hwcnt.backend.state == KBASE_INSTR_STATE_DISABLED) {
+			/* Instrumentation is not enabled */
+			spin_unlock_irqrestore(&kbdev->hwcnt.lock, flags);
+			spin_unlock_irqrestore(&kbdev->hwaccess_lock, pm_flags);
+			return -EINVAL;
+		}
+
+		if (kbdev->hwcnt.kctx != kctx) {
+			/* Instrumentation has been setup for another context */
+			spin_unlock_irqrestore(&kbdev->hwcnt.lock, flags);
+			spin_unlock_irqrestore(&kbdev->hwaccess_lock, pm_flags);
+			return -EINVAL;
+		}
+
+		if (kbdev->hwcnt.backend.state == KBASE_INSTR_STATE_IDLE)
+			break;
+
+		spin_unlock_irqrestore(&kbdev->hwcnt.lock, flags);
+		spin_unlock_irqrestore(&kbdev->hwaccess_lock, pm_flags);
+
+		/* Ongoing dump/setup - wait for its completion */
+		wait_event(kbdev->hwcnt.backend.wait,
+					kbdev->hwcnt.backend.triggered != 0);
+	}
+
+	kbdev->hwcnt.backend.state = KBASE_INSTR_STATE_DISABLED;
+	kbdev->hwcnt.backend.triggered = 0;
+
+	kbasep_instr_hwc_disable_hw_prfcnt(kbdev);
+
+	spin_unlock_irqrestore(&kbdev->hwcnt.lock, flags);
+	spin_unlock_irqrestore(&kbdev->hwaccess_lock, pm_flags);
+
+	dev_dbg(kbdev->dev, "HW counters dumping disabled for context %pK",
+									kctx);
+
+	return 0;
+}
+
+int kbase_instr_hwcnt_request_dump(struct kbase_context *kctx)
+{
+	unsigned long flags;
+	int err = -EINVAL;
+	struct kbase_device *kbdev = kctx->kbdev;
+
+	spin_lock_irqsave(&kbdev->hwcnt.lock, flags);
+
+	if (kbdev->hwcnt.kctx != kctx) {
+		/* The instrumentation has been setup for another context */
+		goto unlock;
+	}
+
+	if (kbdev->hwcnt.backend.state != KBASE_INSTR_STATE_IDLE) {
+		/* HW counters are disabled or another dump is ongoing, or we're
+		 * resetting, or we are in unrecoverable error state.
+		 */
+		goto unlock;
+	}
+
+	if (kbase_is_gpu_removed(kbdev)) {
+		/* GPU has been removed by Arbiter */
+		goto unlock;
+	}
+
+	kbdev->hwcnt.backend.triggered = 0;
+
+	/* Mark that we're dumping - the PF handler can signal that we faulted
+	 */
+	kbdev->hwcnt.backend.state = KBASE_INSTR_STATE_DUMPING;
+
+	/* Wait until prfcnt is ready to request dump */
+	err = wait_prfcnt_ready(kbdev);
+	if (err)
+		goto unlock;
+
+	/* Reconfigure the dump address */
+	kbase_reg_write(kbdev, GPU_CONTROL_REG(PRFCNT_BASE_LO),
+					kbdev->hwcnt.addr & 0xFFFFFFFF);
+	kbase_reg_write(kbdev, GPU_CONTROL_REG(PRFCNT_BASE_HI),
+					kbdev->hwcnt.addr >> 32);
+
+	/* Start dumping */
+	KBASE_KTRACE_ADD(kbdev, CORE_GPU_PRFCNT_SAMPLE, NULL,
+			kbdev->hwcnt.addr);
+
+	kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_COMMAND),
+					GPU_COMMAND_PRFCNT_SAMPLE);
+
+	dev_dbg(kbdev->dev, "HW counters dumping done for context %pK", kctx);
+
+ unlock:
+	spin_unlock_irqrestore(&kbdev->hwcnt.lock, flags);
+	return err;
+}
+KBASE_EXPORT_SYMBOL(kbase_instr_hwcnt_request_dump);
+
+bool kbase_instr_hwcnt_dump_complete(struct kbase_context *kctx,
+						bool * const success)
+{
+	unsigned long flags;
+	bool complete = false;
+	struct kbase_device *kbdev = kctx->kbdev;
+
+	spin_lock_irqsave(&kbdev->hwcnt.lock, flags);
+
+	if (kbdev->hwcnt.backend.state == KBASE_INSTR_STATE_IDLE) {
+		*success = true;
+		complete = true;
+	} else if (kbdev->hwcnt.backend.state == KBASE_INSTR_STATE_FAULT) {
+		*success = false;
+		complete = true;
+		kbdev->hwcnt.backend.state = KBASE_INSTR_STATE_IDLE;
+	}
+
+	spin_unlock_irqrestore(&kbdev->hwcnt.lock, flags);
+
+	return complete;
+}
+KBASE_EXPORT_SYMBOL(kbase_instr_hwcnt_dump_complete);
+
+void kbase_instr_hwcnt_sample_done(struct kbase_device *kbdev)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&kbdev->hwcnt.lock, flags);
+
+	/* If the state is in unrecoverable error, we already wake_up the waiter
+	 * and don't need to do any action when sample is done.
+	 */
+
+	if (kbdev->hwcnt.backend.state == KBASE_INSTR_STATE_FAULT) {
+		kbdev->hwcnt.backend.triggered = 1;
+		wake_up(&kbdev->hwcnt.backend.wait);
+	} else if (kbdev->hwcnt.backend.state == KBASE_INSTR_STATE_DUMPING) {
+		/* All finished and idle */
+		kbdev->hwcnt.backend.state = KBASE_INSTR_STATE_IDLE;
+		kbdev->hwcnt.backend.triggered = 1;
+		wake_up(&kbdev->hwcnt.backend.wait);
+	}
+
+	spin_unlock_irqrestore(&kbdev->hwcnt.lock, flags);
+}
+
+int kbase_instr_hwcnt_wait_for_dump(struct kbase_context *kctx)
+{
+	struct kbase_device *kbdev = kctx->kbdev;
+	unsigned long flags;
+	int err;
+
+	/* Wait for dump & cache clean to complete */
+	wait_event(kbdev->hwcnt.backend.wait,
+					kbdev->hwcnt.backend.triggered != 0);
+
+	spin_lock_irqsave(&kbdev->hwcnt.lock, flags);
+
+	if (kbdev->hwcnt.backend.state == KBASE_INSTR_STATE_FAULT) {
+		err = -EINVAL;
+		kbdev->hwcnt.backend.state = KBASE_INSTR_STATE_IDLE;
+	} else if (kbdev->hwcnt.backend.state == KBASE_INSTR_STATE_UNRECOVERABLE_ERROR) {
+		err = -EIO;
+	} else {
+		/* Dump done */
+		KBASE_DEBUG_ASSERT(kbdev->hwcnt.backend.state ==
+							KBASE_INSTR_STATE_IDLE);
+		err = 0;
+	}
+
+	spin_unlock_irqrestore(&kbdev->hwcnt.lock, flags);
+
+	return err;
+}
+
+int kbase_instr_hwcnt_clear(struct kbase_context *kctx)
+{
+	unsigned long flags;
+	int err = -EINVAL;
+	struct kbase_device *kbdev = kctx->kbdev;
+
+	spin_lock_irqsave(&kbdev->hwcnt.lock, flags);
+
+	/* Check it's the context previously set up and we're not in IDLE
+	 * state.
+	 */
+	if (kbdev->hwcnt.kctx != kctx || kbdev->hwcnt.backend.state !=
+							KBASE_INSTR_STATE_IDLE)
+		goto unlock;
+
+	if (kbase_is_gpu_removed(kbdev)) {
+		/* GPU has been removed by Arbiter */
+		goto unlock;
+	}
+
+	/* Wait until prfcnt is ready to clear */
+	err = wait_prfcnt_ready(kbdev);
+	if (err)
+		goto unlock;
+
+	/* Clear the counters */
+	KBASE_KTRACE_ADD(kbdev, CORE_GPU_PRFCNT_CLEAR, NULL, 0);
+	kbase_reg_write(kbdev, GPU_CONTROL_REG(GPU_COMMAND),
+						GPU_COMMAND_PRFCNT_CLEAR);
+
+unlock:
+	spin_unlock_irqrestore(&kbdev->hwcnt.lock, flags);
+	return err;
+}
+KBASE_EXPORT_SYMBOL(kbase_instr_hwcnt_clear);
+
+void kbase_instr_hwcnt_on_unrecoverable_error(struct kbase_device *kbdev)
+{
+	unsigned long flags;
+
+	lockdep_assert_held(&kbdev->hwaccess_lock);
+
+	spin_lock_irqsave(&kbdev->hwcnt.lock, flags);
+
+	/* If we already in unrecoverable error state, early return. */
+	if (kbdev->hwcnt.backend.state == KBASE_INSTR_STATE_UNRECOVERABLE_ERROR) {
+		spin_unlock_irqrestore(&kbdev->hwcnt.lock, flags);
+		return;
+	}
+
+	kbdev->hwcnt.backend.state = KBASE_INSTR_STATE_UNRECOVERABLE_ERROR;
+
+	/* Need to disable HW if it's not disabled yet. */
+	if (kbdev->hwcnt.backend.state != KBASE_INSTR_STATE_DISABLED)
+		kbasep_instr_hwc_disable_hw_prfcnt(kbdev);
+
+	/* Wake up any waiters. */
+	kbdev->hwcnt.backend.triggered = 1;
+	wake_up(&kbdev->hwcnt.backend.wait);
+
+	spin_unlock_irqrestore(&kbdev->hwcnt.lock, flags);
+}
+KBASE_EXPORT_SYMBOL(kbase_instr_hwcnt_on_unrecoverable_error);
+
+void kbase_instr_hwcnt_on_before_reset(struct kbase_device *kbdev)
+{
+	unsigned long flags;
+
+	spin_lock_irqsave(&kbdev->hwcnt.lock, flags);
+
+	/* A reset is the only way to exit the unrecoverable error state */
+	if (kbdev->hwcnt.backend.state == KBASE_INSTR_STATE_UNRECOVERABLE_ERROR)
+		kbdev->hwcnt.backend.state = KBASE_INSTR_STATE_DISABLED;
+
+	spin_unlock_irqrestore(&kbdev->hwcnt.lock, flags);
+}
+KBASE_EXPORT_SYMBOL(kbase_instr_hwcnt_on_before_reset);
+
+int kbase_instr_backend_init(struct kbase_device *kbdev)
+{
+	spin_lock_init(&kbdev->hwcnt.lock);
+
+	kbdev->hwcnt.backend.state = KBASE_INSTR_STATE_DISABLED;
+
+	init_waitqueue_head(&kbdev->hwcnt.backend.wait);
+
+	kbdev->hwcnt.backend.triggered = 0;
+
+#ifdef CONFIG_MALI_PRFCNT_SET_SELECT_VIA_DEBUG_FS
+/* Use the build time option for the override default. */
+#if defined(CONFIG_MALI_PRFCNT_SET_SECONDARY)
+	kbdev->hwcnt.backend.override_counter_set = KBASE_HWCNT_PHYSICAL_SET_SECONDARY;
+#elif defined(CONFIG_MALI_PRFCNT_SET_TERTIARY)
+	kbdev->hwcnt.backend.override_counter_set = KBASE_HWCNT_PHYSICAL_SET_TERTIARY;
+#else
+	/* Default to primary */
+	kbdev->hwcnt.backend.override_counter_set = KBASE_HWCNT_PHYSICAL_SET_PRIMARY;
+#endif
+#endif
+	return 0;
+}
+
+void kbase_instr_backend_term(struct kbase_device *kbdev)
+{
+	CSTD_UNUSED(kbdev);
+}
+
+#ifdef CONFIG_MALI_PRFCNT_SET_SELECT_VIA_DEBUG_FS
+void kbase_instr_backend_debugfs_init(struct kbase_device *kbdev)
+{
+	/* No validation is done on the debugfs input. Invalid input could cause
+	 * performance counter errors. This is acceptable since this is a debug
+	 * only feature and users should know what they are doing.
+	 *
+	 * Valid inputs are the values accepted bythe SET_SELECT bits of the
+	 * PRFCNT_CONFIG register as defined in the architecture specification.
+	 */
+	debugfs_create_u8("hwcnt_set_select", 0644,
+			  kbdev->mali_debugfs_directory,
+			  (u8 *)&kbdev->hwcnt.backend.override_counter_set);
+}
+#endif

diff --git a/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_instr_defs.h b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_instr_defs.h
new file mode 100644
index 0000000..7190f42
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_instr_defs.h

@@ -0,0 +1,60 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
+/*
+ *
+ * (C) COPYRIGHT 2014, 2016, 2018-2021 ARM Limited. All rights reserved.
+ *
+ * This program is free software and is provided to you under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation, and any use by you of this program is subject to the terms
+ * of such GNU license.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, you can access it online at
+ * http://www.gnu.org/licenses/gpl-2.0.html.
+ *
+ */
+
+/*
+ * Backend-specific instrumentation definitions
+ */
+
+#ifndef _KBASE_INSTR_DEFS_H_
+#define _KBASE_INSTR_DEFS_H_
+
+#include <mali_kbase_hwcnt_gpu.h>
+
+/*
+ * Instrumentation State Machine States
+ */
+enum kbase_instr_state {
+	/* State where instrumentation is not active */
+	KBASE_INSTR_STATE_DISABLED = 0,
+	/* State machine is active and ready for a command. */
+	KBASE_INSTR_STATE_IDLE,
+	/* Hardware is currently dumping a frame. */
+	KBASE_INSTR_STATE_DUMPING,
+	/* An error has occurred during DUMPING (page fault). */
+	KBASE_INSTR_STATE_FAULT,
+	/* An unrecoverable error has occurred, a reset is the only way to exit
+	 * from unrecoverable error state.
+	 */
+	KBASE_INSTR_STATE_UNRECOVERABLE_ERROR,
+};
+
+/* Structure used for instrumentation and HW counters dumping */
+struct kbase_instr_backend {
+	wait_queue_head_t wait;
+	int triggered;
+#ifdef CONFIG_MALI_PRFCNT_SET_SELECT_VIA_DEBUG_FS
+	enum kbase_hwcnt_physical_set override_counter_set;
+#endif
+
+	enum kbase_instr_state state;
+};
+
+#endif /* _KBASE_INSTR_DEFS_H_ */

diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_instr_internal.h b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_instr_internal.h
similarity index 100%
copy from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_instr_internal.h
copy to bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_instr_internal.h


diff --git a/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_irq_internal.h b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_irq_internal.h
new file mode 100644
index 0000000..66cda8c
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_irq_internal.h

@@ -0,0 +1,47 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
+/*
+ *
+ * (C) COPYRIGHT 2014-2015, 2020-2021 ARM Limited. All rights reserved.
+ *
+ * This program is free software and is provided to you under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation, and any use by you of this program is subject to the terms
+ * of such GNU license.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, you can access it online at
+ * http://www.gnu.org/licenses/gpl-2.0.html.
+ *
+ */
+
+/*
+ * Backend specific IRQ APIs
+ */
+
+#ifndef _KBASE_IRQ_INTERNAL_H_
+#define _KBASE_IRQ_INTERNAL_H_
+
+int kbase_install_interrupts(struct kbase_device *kbdev);
+
+void kbase_release_interrupts(struct kbase_device *kbdev);
+
+/**
+ * kbase_synchronize_irqs - Ensure that all IRQ handlers have completed
+ *                          execution
+ * @kbdev: The kbase device
+ */
+void kbase_synchronize_irqs(struct kbase_device *kbdev);
+
+int kbasep_common_test_interrupt_handlers(
+					struct kbase_device * const kbdev);
+
+irqreturn_t kbase_gpu_irq_test_handler(int irq, void *data, u32 val);
+int kbase_set_custom_irq_handler(struct kbase_device *kbdev,
+				 irq_handler_t custom_handler, int irq_type);
+
+#endif /* _KBASE_IRQ_INTERNAL_H_ */

diff --git a/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_irq_linux.c b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_irq_linux.c
new file mode 100644
index 0000000..dd30e15
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_irq_linux.c

@@ -0,0 +1,504 @@
+// SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
+/*
+ *
+ * (C) COPYRIGHT 2014-2016, 2018-2021 ARM Limited. All rights reserved.
+ *
+ * This program is free software and is provided to you under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation, and any use by you of this program is subject to the terms
+ * of such GNU license.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, you can access it online at
+ * http://www.gnu.org/licenses/gpl-2.0.html.
+ *
+ */
+
+#include <mali_kbase.h>
+#include <device/mali_kbase_device.h>
+#include <backend/gpu/mali_kbase_irq_internal.h>
+
+#include <linux/interrupt.h>
+
+#if !IS_ENABLED(CONFIG_MALI_NO_MALI)
+
+/* GPU IRQ Tags */
+#define	JOB_IRQ_TAG	0
+#define MMU_IRQ_TAG	1
+#define GPU_IRQ_TAG	2
+
+static void *kbase_tag(void *ptr, u32 tag)
+{
+	return (void *)(((uintptr_t) ptr) | tag);
+}
+
+static void *kbase_untag(void *ptr)
+{
+	return (void *)(((uintptr_t) ptr) & ~3);
+}
+
+static irqreturn_t kbase_job_irq_handler(int irq, void *data)
+{
+	unsigned long flags;
+	struct kbase_device *kbdev = kbase_untag(data);
+	u32 val;
+
+	spin_lock_irqsave(&kbdev->hwaccess_lock, flags);
+
+	if (!kbdev->pm.backend.gpu_powered) {
+		/* GPU is turned off - IRQ is not for us */
+		spin_unlock_irqrestore(&kbdev->hwaccess_lock, flags);
+		return IRQ_NONE;
+	}
+
+	val = kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_STATUS));
+
+#ifdef CONFIG_MALI_DEBUG
+	if (!kbdev->pm.backend.driver_ready_for_irqs)
+		dev_warn(kbdev->dev, "%s: irq %d irqstatus 0x%x before driver is ready\n",
+				__func__, irq, val);
+#endif /* CONFIG_MALI_DEBUG */
+
+	if (!val) {
+		spin_unlock_irqrestore(&kbdev->hwaccess_lock, flags);
+		return IRQ_NONE;
+	}
+
+	dev_dbg(kbdev->dev, "%s: irq %d irqstatus 0x%x\n", __func__, irq, val);
+
+#if MALI_USE_CSF
+	/* call the csf interrupt handler */
+	kbase_csf_interrupt(kbdev, val);
+#else
+	kbase_job_done(kbdev, val);
+#endif
+
+	spin_unlock_irqrestore(&kbdev->hwaccess_lock, flags);
+
+	return IRQ_HANDLED;
+}
+
+static irqreturn_t kbase_mmu_irq_handler(int irq, void *data)
+{
+	unsigned long flags;
+	struct kbase_device *kbdev = kbase_untag(data);
+	u32 val;
+
+	spin_lock_irqsave(&kbdev->hwaccess_lock, flags);
+
+	if (!kbdev->pm.backend.gpu_powered) {
+		/* GPU is turned off - IRQ is not for us */
+		spin_unlock_irqrestore(&kbdev->hwaccess_lock, flags);
+		return IRQ_NONE;
+	}
+
+	atomic_inc(&kbdev->faults_pending);
+
+	val = kbase_reg_read(kbdev, MMU_REG(MMU_IRQ_STATUS));
+
+#ifdef CONFIG_MALI_DEBUG
+	if (!kbdev->pm.backend.driver_ready_for_irqs)
+		dev_warn(kbdev->dev, "%s: irq %d irqstatus 0x%x before driver is ready\n",
+				__func__, irq, val);
+#endif /* CONFIG_MALI_DEBUG */
+	spin_unlock_irqrestore(&kbdev->hwaccess_lock, flags);
+
+	if (!val) {
+		atomic_dec(&kbdev->faults_pending);
+		return IRQ_NONE;
+	}
+
+	dev_dbg(kbdev->dev, "%s: irq %d irqstatus 0x%x\n", __func__, irq, val);
+
+	kbase_mmu_interrupt(kbdev, val);
+
+	atomic_dec(&kbdev->faults_pending);
+
+	return IRQ_HANDLED;
+}
+
+static irqreturn_t kbase_gpu_irq_handler(int irq, void *data)
+{
+	unsigned long flags;
+	struct kbase_device *kbdev = kbase_untag(data);
+	u32 val;
+
+	spin_lock_irqsave(&kbdev->hwaccess_lock, flags);
+
+	if (!kbdev->pm.backend.gpu_powered) {
+		/* GPU is turned off - IRQ is not for us */
+		spin_unlock_irqrestore(&kbdev->hwaccess_lock, flags);
+		return IRQ_NONE;
+	}
+
+	val = kbase_reg_read(kbdev, GPU_CONTROL_REG(GPU_IRQ_STATUS));
+
+#ifdef CONFIG_MALI_DEBUG
+	if (!kbdev->pm.backend.driver_ready_for_irqs)
+		dev_dbg(kbdev->dev, "%s: irq %d irqstatus 0x%x before driver is ready\n",
+				__func__, irq, val);
+#endif /* CONFIG_MALI_DEBUG */
+	spin_unlock_irqrestore(&kbdev->hwaccess_lock, flags);
+
+	if (!val)
+		return IRQ_NONE;
+
+	dev_dbg(kbdev->dev, "%s: irq %d irqstatus 0x%x\n", __func__, irq, val);
+
+	kbase_gpu_interrupt(kbdev, val);
+
+	return IRQ_HANDLED;
+}
+
+static irq_handler_t kbase_handler_table[] = {
+	[JOB_IRQ_TAG] = kbase_job_irq_handler,
+	[MMU_IRQ_TAG] = kbase_mmu_irq_handler,
+	[GPU_IRQ_TAG] = kbase_gpu_irq_handler,
+};
+
+#ifdef CONFIG_MALI_DEBUG
+#define  JOB_IRQ_HANDLER JOB_IRQ_TAG
+#define  MMU_IRQ_HANDLER MMU_IRQ_TAG
+#define  GPU_IRQ_HANDLER GPU_IRQ_TAG
+
+/**
+ * kbase_gpu_irq_test_handler - Variant (for test) of kbase_gpu_irq_handler()
+ * @irq:  IRQ number
+ * @data: Data associated with this IRQ (i.e. kbdev)
+ * @val:  Value of the GPU_CONTROL_REG(GPU_IRQ_STATUS)
+ *
+ * Handle the GPU device interrupt source requests reflected in the
+ * given source bit-pattern. The test code caller is responsible for
+ * undertaking the required device power maintenance.
+ *
+ * Return: IRQ_HANDLED if the requests are from the GPU device,
+ *         IRQ_NONE otherwise
+ */
+irqreturn_t kbase_gpu_irq_test_handler(int irq, void *data, u32 val)
+{
+	struct kbase_device *kbdev = kbase_untag(data);
+
+	if (!val)
+		return IRQ_NONE;
+
+	dev_dbg(kbdev->dev, "%s: irq %d irqstatus 0x%x\n", __func__, irq, val);
+
+	kbase_gpu_interrupt(kbdev, val);
+
+	return IRQ_HANDLED;
+}
+
+KBASE_EXPORT_TEST_API(kbase_gpu_irq_test_handler);
+
+/**
+ * kbase_set_custom_irq_handler - Set a custom IRQ handler
+ * @kbdev: Device for which the handler is to be registered
+ * @custom_handler: Handler to be registered
+ * @irq_type: Interrupt type
+ *
+ * Registers given interrupt handler for requested interrupt type
+ * In the case where irq handler is not specified, the default handler shall be
+ * registered
+ *
+ * Return: 0 case success, error code otherwise
+ */
+int kbase_set_custom_irq_handler(struct kbase_device *kbdev,
+					irq_handler_t custom_handler,
+					int irq_type)
+{
+	int result = 0;
+	irq_handler_t requested_irq_handler = NULL;
+
+	KBASE_DEBUG_ASSERT((irq_type >= JOB_IRQ_HANDLER) &&
+			   (irq_type <= GPU_IRQ_HANDLER));
+
+	/* Release previous handler */
+	if (kbdev->irqs[irq_type].irq)
+		free_irq(kbdev->irqs[irq_type].irq, kbase_tag(kbdev, irq_type));
+
+	requested_irq_handler = (custom_handler != NULL) ?
+					custom_handler :
+					kbase_handler_table[irq_type];
+
+	if (request_irq(kbdev->irqs[irq_type].irq, requested_irq_handler,
+			kbdev->irqs[irq_type].flags | IRQF_SHARED,
+			dev_name(kbdev->dev),
+			kbase_tag(kbdev, irq_type)) != 0) {
+		result = -EINVAL;
+		dev_err(kbdev->dev, "Can't request interrupt %d (index %d)\n",
+					kbdev->irqs[irq_type].irq, irq_type);
+#if IS_ENABLED(CONFIG_SPARSE_IRQ)
+		dev_err(kbdev->dev, "You have CONFIG_SPARSE_IRQ support enabled - is the interrupt number correct for this configuration?\n");
+#endif /* CONFIG_SPARSE_IRQ */
+	}
+
+	return result;
+}
+
+KBASE_EXPORT_TEST_API(kbase_set_custom_irq_handler);
+
+/* test correct interrupt assignment and reception by cpu */
+struct kbasep_irq_test {
+	struct hrtimer timer;
+	wait_queue_head_t wait;
+	int triggered;
+	u32 timeout;
+};
+
+static struct kbasep_irq_test kbasep_irq_test_data;
+
+#define IRQ_TEST_TIMEOUT    500
+
+static irqreturn_t kbase_job_irq_test_handler(int irq, void *data)
+{
+	unsigned long flags;
+	struct kbase_device *kbdev = kbase_untag(data);
+	u32 val;
+
+	spin_lock_irqsave(&kbdev->hwaccess_lock, flags);
+
+	if (!kbdev->pm.backend.gpu_powered) {
+		/* GPU is turned off - IRQ is not for us */
+		spin_unlock_irqrestore(&kbdev->hwaccess_lock, flags);
+		return IRQ_NONE;
+	}
+
+	val = kbase_reg_read(kbdev, JOB_CONTROL_REG(JOB_IRQ_STATUS));
+
+	spin_unlock_irqrestore(&kbdev->hwaccess_lock, flags);
+
+	if (!val)
+		return IRQ_NONE;
+
+	dev_dbg(kbdev->dev, "%s: irq %d irqstatus 0x%x\n", __func__, irq, val);
+
+	kbasep_irq_test_data.triggered = 1;
+	wake_up(&kbasep_irq_test_data.wait);
+
+	kbase_reg_write(kbdev, JOB_CONTROL_REG(JOB_IRQ_CLEAR), val);
+
+	return IRQ_HANDLED;
+}
+
+static irqreturn_t kbase_mmu_irq_test_handler(int irq, void *data)
+{
+	unsigned long flags;
+	struct kbase_device *kbdev = kbase_untag(data);
+	u32 val;
+
+	spin_lock_irqsave(&kbdev->hwaccess_lock, flags);
+
+	if (!kbdev->pm.backend.gpu_powered) {
+		/* GPU is turned off - IRQ is not for us */
+		spin_unlock_irqrestore(&kbdev->hwaccess_lock, flags);
+		return IRQ_NONE;
+	}
+
+	val = kbase_reg_read(kbdev, MMU_REG(MMU_IRQ_STATUS));
+
+	spin_unlock_irqrestore(&kbdev->hwaccess_lock, flags);
+
+	if (!val)
+		return IRQ_NONE;
+
+	dev_dbg(kbdev->dev, "%s: irq %d irqstatus 0x%x\n", __func__, irq, val);
+
+	kbasep_irq_test_data.triggered = 1;
+	wake_up(&kbasep_irq_test_data.wait);
+
+	kbase_reg_write(kbdev, MMU_REG(MMU_IRQ_CLEAR), val);
+
+	return IRQ_HANDLED;
+}
+
+static enum hrtimer_restart kbasep_test_interrupt_timeout(struct hrtimer *timer)
+{
+	struct kbasep_irq_test *test_data = container_of(timer,
+						struct kbasep_irq_test, timer);
+
+	test_data->timeout = 1;
+	test_data->triggered = 1;
+	wake_up(&test_data->wait);
+	return HRTIMER_NORESTART;
+}
+
+static int kbasep_common_test_interrupt(
+				struct kbase_device * const kbdev, u32 tag)
+{
+	int err = 0;
+	irq_handler_t test_handler;
+
+	u32 old_mask_val;
+	u16 mask_offset;
+	u16 rawstat_offset;
+
+	switch (tag) {
+	case JOB_IRQ_TAG:
+		test_handler = kbase_job_irq_test_handler;
+		rawstat_offset = JOB_CONTROL_REG(JOB_IRQ_RAWSTAT);
+		mask_offset = JOB_CONTROL_REG(JOB_IRQ_MASK);
+		break;
+	case MMU_IRQ_TAG:
+		test_handler = kbase_mmu_irq_test_handler;
+		rawstat_offset = MMU_REG(MMU_IRQ_RAWSTAT);
+		mask_offset = MMU_REG(MMU_IRQ_MASK);
+		break;
+	case GPU_IRQ_TAG:
+		/* already tested by pm_driver - bail out */
+	default:
+		return 0;
+	}
+
+	/* store old mask */
+	old_mask_val = kbase_reg_read(kbdev, mask_offset);
+	/* mask interrupts */
+	kbase_reg_write(kbdev, mask_offset, 0x0);
+
+	if (kbdev->irqs[tag].irq) {
+		/* release original handler and install test handler */
+		if (kbase_set_custom_irq_handler(kbdev, test_handler, tag) != 0) {
+			err = -EINVAL;
+		} else {
+			kbasep_irq_test_data.timeout = 0;
+			hrtimer_init(&kbasep_irq_test_data.timer,
+					CLOCK_MONOTONIC, HRTIMER_MODE_REL);
+			kbasep_irq_test_data.timer.function =
+						kbasep_test_interrupt_timeout;
+
+			/* trigger interrupt */
+			kbase_reg_write(kbdev, mask_offset, 0x1);
+			kbase_reg_write(kbdev, rawstat_offset, 0x1);
+
+			hrtimer_start(&kbasep_irq_test_data.timer,
+					HR_TIMER_DELAY_MSEC(IRQ_TEST_TIMEOUT),
+					HRTIMER_MODE_REL);
+
+			wait_event(kbasep_irq_test_data.wait,
+					kbasep_irq_test_data.triggered != 0);
+
+			if (kbasep_irq_test_data.timeout != 0) {
+				dev_err(kbdev->dev, "Interrupt %d (index %d) didn't reach CPU.\n",
+						kbdev->irqs[tag].irq, tag);
+				err = -EINVAL;
+			} else {
+				dev_dbg(kbdev->dev, "Interrupt %d (index %d) reached CPU.\n",
+						kbdev->irqs[tag].irq, tag);
+			}
+
+			hrtimer_cancel(&kbasep_irq_test_data.timer);
+			kbasep_irq_test_data.triggered = 0;
+
+			/* mask interrupts */
+			kbase_reg_write(kbdev, mask_offset, 0x0);
+
+			/* release test handler */
+			free_irq(kbdev->irqs[tag].irq, kbase_tag(kbdev, tag));
+		}
+
+		/* restore original interrupt */
+		if (request_irq(kbdev->irqs[tag].irq, kbase_handler_table[tag],
+				kbdev->irqs[tag].flags | IRQF_SHARED,
+				dev_name(kbdev->dev), kbase_tag(kbdev, tag))) {
+			dev_err(kbdev->dev, "Can't restore original interrupt %d (index %d)\n",
+						kbdev->irqs[tag].irq, tag);
+			err = -EINVAL;
+		}
+	}
+	/* restore old mask */
+	kbase_reg_write(kbdev, mask_offset, old_mask_val);
+
+	return err;
+}
+
+int kbasep_common_test_interrupt_handlers(
+					struct kbase_device * const kbdev)
+{
+	int err;
+
+	init_waitqueue_head(&kbasep_irq_test_data.wait);
+	kbasep_irq_test_data.triggered = 0;
+
+	/* A suspend won't happen during startup/insmod */
+	kbase_pm_context_active(kbdev);
+
+	err = kbasep_common_test_interrupt(kbdev, JOB_IRQ_TAG);
+	if (err) {
+		dev_err(kbdev->dev, "Interrupt JOB_IRQ didn't reach CPU. Check interrupt assignments.\n");
+		goto out;
+	}
+
+	err = kbasep_common_test_interrupt(kbdev, MMU_IRQ_TAG);
+	if (err) {
+		dev_err(kbdev->dev, "Interrupt MMU_IRQ didn't reach CPU. Check interrupt assignments.\n");
+		goto out;
+	}
+
+	dev_dbg(kbdev->dev, "Interrupts are correctly assigned.\n");
+
+ out:
+	kbase_pm_context_idle(kbdev);
+
+	return err;
+}
+#endif /* CONFIG_MALI_DEBUG */
+
+int kbase_install_interrupts(struct kbase_device *kbdev)
+{
+	u32 nr = ARRAY_SIZE(kbase_handler_table);
+	int err;
+	u32 i;
+
+	for (i = 0; i < nr; i++) {
+		err = request_irq(kbdev->irqs[i].irq, kbase_handler_table[i],
+				kbdev->irqs[i].flags | IRQF_SHARED,
+				dev_name(kbdev->dev),
+				kbase_tag(kbdev, i));
+		if (err) {
+			dev_err(kbdev->dev, "Can't request interrupt %d (index %d)\n",
+							kbdev->irqs[i].irq, i);
+#if IS_ENABLED(CONFIG_SPARSE_IRQ)
+			dev_err(kbdev->dev, "You have CONFIG_SPARSE_IRQ support enabled - is the interrupt number correct for this configuration?\n");
+#endif /* CONFIG_SPARSE_IRQ */
+			goto release;
+		}
+	}
+
+	return 0;
+
+ release:
+	while (i-- > 0)
+		free_irq(kbdev->irqs[i].irq, kbase_tag(kbdev, i));
+
+	return err;
+}
+
+void kbase_release_interrupts(struct kbase_device *kbdev)
+{
+	u32 nr = ARRAY_SIZE(kbase_handler_table);
+	u32 i;
+
+	for (i = 0; i < nr; i++) {
+		if (kbdev->irqs[i].irq)
+			free_irq(kbdev->irqs[i].irq, kbase_tag(kbdev, i));
+	}
+}
+
+void kbase_synchronize_irqs(struct kbase_device *kbdev)
+{
+	u32 nr = ARRAY_SIZE(kbase_handler_table);
+	u32 i;
+
+	for (i = 0; i < nr; i++) {
+		if (kbdev->irqs[i].irq)
+			synchronize_irq(kbdev->irqs[i].irq);
+	}
+}
+
+KBASE_EXPORT_TEST_API(kbase_synchronize_irqs);
+
+#endif /* !IS_ENABLED(CONFIG_MALI_NO_MALI) */

diff --git a/dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_as.c b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_as.c
similarity index 100%
copy from dvalin/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_as.c
copy to bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_as.c


diff --git a/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_defs.h b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_defs.h
new file mode 100644
index 0000000..6fe86f6
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_defs.h

@@ -0,0 +1,135 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
+/*
+ *
+ * (C) COPYRIGHT 2014-2022 ARM Limited. All rights reserved.
+ *
+ * This program is free software and is provided to you under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation, and any use by you of this program is subject to the terms
+ * of such GNU license.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, you can access it online at
+ * http://www.gnu.org/licenses/gpl-2.0.html.
+ *
+ */
+
+/*
+ * Register-based HW access backend specific definitions
+ */
+
+#ifndef _KBASE_HWACCESS_GPU_DEFS_H_
+#define _KBASE_HWACCESS_GPU_DEFS_H_
+
+/* SLOT_RB_SIZE must be < 256 */
+#define SLOT_RB_SIZE 2
+#define SLOT_RB_MASK (SLOT_RB_SIZE - 1)
+
+/**
+ * struct rb_entry - Ringbuffer entry
+ * @katom:	Atom associated with this entry
+ */
+struct rb_entry {
+	struct kbase_jd_atom *katom;
+};
+
+/* SLOT_RB_TAG_PURGED assumes a value that is different from
+ * NULL (SLOT_RB_NULL_TAG_VAL) and will not be the result of
+ * any valid pointer via macro translation: SLOT_RB_TAG_KCTX(x).
+ */
+#define SLOT_RB_TAG_PURGED ((u64)(1 << 1))
+#define SLOT_RB_NULL_TAG_VAL ((u64)0)
+
+/**
+ * SLOT_RB_TAG_KCTX() - a function-like macro for converting a pointer to a
+ *			u64 for serving as tagged value.
+ * @kctx: Pointer to kbase context.
+ */
+#define SLOT_RB_TAG_KCTX(kctx) (u64)((uintptr_t)(kctx))
+/**
+ * struct slot_rb - Slot ringbuffer
+ * @entries:		Ringbuffer entries
+ * @last_kctx_tagged:	The last context that submitted a job to the slot's
+ *			HEAD_NEXT register. The value is a tagged variant so
+ *			must not be dereferenced. It is used in operation to
+ *			track when shader core L1 caches might contain a
+ *			previous context's data, and so must only be set to
+ *			SLOT_RB_NULL_TAG_VAL after reset/powerdown of the
+ *			cores. In slot job submission, if there is a kctx
+ *			change, and the relevant katom is configured with
+ *			BASE_JD_REQ_SKIP_CACHE_START, a L1 read only cache
+ *			maintenance operation is enforced.
+ * @read_idx:		Current read index of buffer
+ * @write_idx:		Current write index of buffer
+ * @job_chain_flag:	Flag used to implement jobchain disambiguation
+ */
+struct slot_rb {
+	struct rb_entry entries[SLOT_RB_SIZE];
+
+	u64 last_kctx_tagged;
+
+	u8 read_idx;
+	u8 write_idx;
+
+	u8 job_chain_flag;
+};
+
+/**
+ * struct kbase_backend_data - GPU backend specific data for HW access layer
+ * @slot_rb:			Slot ringbuffers
+ * @scheduling_timer:		The timer tick used for rescheduling jobs
+ * @timer_running:		Is the timer running? The runpool_mutex must be
+ *				held whilst modifying this.
+ * @suspend_timer:              Is the timer suspended? Set when a suspend
+ *                              occurs and cleared on resume. The runpool_mutex
+ *                              must be held whilst modifying this.
+ * @reset_gpu:			Set to a KBASE_RESET_xxx value (see comments)
+ * @reset_workq:		Work queue for performing the reset
+ * @reset_work:			Work item for performing the reset
+ * @reset_wait:			Wait event signalled when the reset is complete
+ * @reset_timer:		Timeout for soft-stops before the reset
+ * @timeouts_updated:           Have timeout values just been updated?
+ *
+ * The hwaccess_lock (a spinlock) must be held when accessing this structure
+ */
+struct kbase_backend_data {
+#if !MALI_USE_CSF
+	struct slot_rb slot_rb[BASE_JM_MAX_NR_SLOTS];
+	struct hrtimer scheduling_timer;
+
+	bool timer_running;
+#endif
+	bool suspend_timer;
+
+	atomic_t reset_gpu;
+
+/* The GPU reset isn't pending */
+#define KBASE_RESET_GPU_NOT_PENDING     0
+/* kbase_prepare_to_reset_gpu has been called */
+#define KBASE_RESET_GPU_PREPARED        1
+/* kbase_reset_gpu has been called - the reset will now definitely happen
+ * within the timeout period
+ */
+#define KBASE_RESET_GPU_COMMITTED       2
+/* The GPU reset process is currently occuring (timeout has expired or
+ * kbasep_try_reset_gpu_early was called)
+ */
+#define KBASE_RESET_GPU_HAPPENING       3
+/* Reset the GPU silently, used when resetting the GPU as part of normal
+ * behavior (e.g. when exiting protected mode).
+ */
+#define KBASE_RESET_GPU_SILENT          4
+	struct workqueue_struct *reset_workq;
+	struct work_struct reset_work;
+	wait_queue_head_t reset_wait;
+	struct hrtimer reset_timer;
+
+	bool timeouts_updated;
+};
+
+#endif /* _KBASE_HWACCESS_GPU_DEFS_H_ */

diff --git a/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_hw.c b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_hw.c
new file mode 100644
index 0000000..694ceae
--- /dev/null
+++ b/bifrost/r38p2/kernel/drivers/gpu/arm/midgard/backend/gpu/mali_kbase_jm_hw.c

@@ -0,0 +1,1492 @@
+// SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note
+/*
+ *
+ * (C) COPYRIGHT 2010-2022 ARM Limited. All rights reserved.
+ *
+ * This program is free software and is provided to you under the terms of the
+ * GNU General Public License version 2 as published by the Free Software
+ * Foundation, and any use by you of this program is subject to the terms
+ * of such GNU license.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, you can access it online at
+ * http://www.gnu.org/licenses/gpl-2.0.html.
+ *
+ */
+
+/*
+ * Base kernel job manager APIs
+ */
+
+#include <mali_kbase.h>
+#include <mali_kbase_config.h>
+#include <gpu/mali_kbase_gpu_regmap.h>
+#include <tl/mali_kbase_tracepoints.h>
+#include <mali_linux_trace.h>
+#include <mali_kbase_hw.h>
+#include <mali_kbase_hwaccess_jm.h>
+#include <mali_kbase_reset_gpu.h>
+#include <mali_kbase_ctx_sched.h>
+#include <mali_kbase_kinstr_jm.h>
+#include <mali_kbase_hwaccess_instr.h>
+#include <mali_kbase_hwcnt_context.h>
+#include <device/mali_kbase_device.h>
+#include <backend/gpu/mali_kbase_irq_internal.h>
+#include <backend/gpu/mali_kbase_jm_internal.h>
+#include <mali_kbase_regs_history_debugfs.h>
+
+static void kbasep_try_reset_gpu_early_locked(struct kbase_device *kbdev);
+static u64 kbasep_apply_limited_core_mask(const struct kbase_device *kbdev,
+				const u64 affinity, const u64 limited_core_mask);
+
+static u64 kbase_job_write_affinity(struct kbase_device *kbdev,
+				base_jd_core_req core_req,
+				int js, const u64 limited_core_mask)
+{
+	u64 affinity;
+	bool skip_affinity_check = false;
+
+	if ((core_req & (BASE_JD_REQ_FS | BASE_JD_REQ_CS | BASE_JD_REQ_T)) ==
+			BASE_JD_REQ_T) {
+		/* Tiler-only atom, affinity value can be programed as 0 */
+		affinity = 0;
+		skip_affinity_check = true;
+	} else if ((core_req & (BASE_JD_REQ_COHERENT_GROUP |
+			BASE_JD_REQ_SPECIFIC_COHERENT_GROUP))) {
+		unsigned int num_core_groups = kbdev->gpu_props.num_core_groups;
+		struct mali_base_gpu_coherent_group_info *coherency_info =
+			&kbdev->gpu_props.props.coherency_info;
+
+		affinity = kbdev->pm.backend.shaders_avail &
+				kbdev->pm.debug_core_mask[js];
+
+		/* JS2 on a dual core group system targets core group 1. All
+		 * other cases target core group 0.
+		 */
+		if (js == 2 && num_core_groups > 1)
+			affinity &= coherency_info->group[1].core_mask;
+		else if (num_core_groups > 1)
+			affinity &= coherency_info->group[0].core_mask;
+		else
+			affinity &= kbdev->gpu_props.curr_config.shader_present;
+	} else {
+		/* Use all cores */
+		affinity = kbdev->pm.backend.shaders_avail &
+				kbdev->pm.debug_core_mask[js];
+	}
+
+	if (core_req & BASE_JD_REQ_LIMITED_CORE_MASK) {
+		/* Limiting affinity due to BASE_JD_REQ_LIMITED_CORE_MASK by applying the limited core mask. */
+		affinity = kbasep_apply_limited_core_mask(kbdev, affinity, limited_core_mask);
+	}
+
+	if (unlikely(!affinity && !skip_affinity_check)) {
+#ifdef CONFIG_MALI_DEBUG
+		u64 shaders_ready =
+			kbase_pm_get_ready_cores(kbdev, KBASE_PM_CORE_SHADER);
+
+		WARN_ON(!(shaders_ready & kbdev->pm.backend.shaders_avail));
+#endif
+
+		affinity = kbdev->pm.backend.shaders_avail;
+
+		if (core_req & BASE_JD_REQ_LIMITED_CORE_MASK) {
+			/* Limiting affinity again to make sure it only enables shader cores with backed TLS memory. */
+			affinity = kbasep_apply_limited_core_mask(kbdev, affinity, limited_core_mask);
+
+#ifdef CONFIG_MALI_DEBUG
+			/* affinity should never be 0 */
+			WARN_ON(!affinity);
+#endif
+		}
+	}
+
+	kbase_reg_write(kbdev, JOB_SLOT_REG(js, JS_AFFINITY_NEXT_LO),
+					affinity & 0xFFFFFFFF);
+	kbase_reg_write(kbdev, JOB_SLOT_REG(js, JS_AFFINITY_NEXT_HI),
+					affinity >> 32);
+
+	return affinity;
+}
+
+/**
+ * select_job_chain() - Select which job chain to submit to the GPU
+ * @katom: Pointer to the atom about to be submitted to the GPU
+ *
+ * Selects one of the fragment job chains attached to the special atom at the
+ * end of a renderpass, or returns the address of the single job chain attached
+ * to any other type of atom.
+ *
+ * Which job chain is selected depends upon whether the tiling phase of the
+ * renderpass completed normally or was soft-stopped because it used too
+ * much memory. It also depends upon whether one of the fragment job chains
+ * has already been run as part of the same renderpass.
+ *
+ * Return: GPU virtual address of the selected job chain
+ */
+static u64 select_job_chain(struct kbase_jd_atom *katom)
+{
+	struct kbase_context *const kctx = katom->kctx;
+	u64 jc = katom->jc;
+	struct kbase_jd_renderpass *rp;
+
+	lockdep_assert_held(&kctx->kbdev->hwaccess_lock);
+
+	if (!(katom->core_req & BASE_JD_REQ_END_RENDERPASS))
+		return jc;
+
+	compiletime_assert((1ull << (sizeof(katom->renderpass_id) * 8)) <=
+			ARRAY_SIZE(kctx->jctx.renderpasses),
+			"Should check invalid access to renderpasses");
+
+	rp = &kctx->jctx.renderpasses[katom->renderpass_id];
+	/* We can read a subset of renderpass state without holding
+	 * higher-level locks (but not end_katom, for example).
+	 * If the end-of-renderpass atom is running with as-yet indeterminate
+	 * OOM state then assume that the start atom was not soft-stopped.
+	 */
+	switch (rp->state) {
+	case KBASE_JD_RP_OOM:
+		/* Tiling ran out of memory.
+		 * Start of incremental rendering, used once.
+		 */
+		jc = katom->jc_fragment.norm_read_forced_write;
+		break;
+	case KBASE_JD_RP_START:
+	case KBASE_JD_RP_PEND_OOM:
+		/* Tiling completed successfully first time.
+		 * Single-iteration rendering, used once.
+		 */
+		jc = katom->jc_fragment.norm_read_norm_write;
+		break;
+	case KBASE_JD_RP_RETRY_OOM:
+		/* Tiling ran out of memory again.
+		 * Continuation of incremental rendering, used as
+		 * many times as required.
+		 */
+		jc = katom->jc_fragment.forced_read_forced_write;
+		break;
+	case KBASE_JD_RP_RETRY:
+	case KBASE_JD_RP_RETRY_PEND_OOM:
+		/* Tiling completed successfully this time.
+		 * End of incremental rendering, used once.
+		 */
+		jc = katom->jc_fragment.forced_read_norm_write;
+		break;
+	default:
+		WARN_ON(1);
+		break;
+	}
+
+	dev_dbg(kctx->kbdev->dev,
+		"Selected job chain 0x%llx for end atom %pK in state %d\n",
+		jc, (void *)katom, (int)rp->state);
+
+	katom->jc = jc;
+	return jc;
+}
+
+int kbase_job_hw_submit(struct kbase_device *kbdev, struct kbase_jd_atom *katom, int js)
+{
+	struct kbase_context *kctx;
+	u32 cfg;
+	u64 const jc_head = select_job_chain(katom);
+	u64 affinity;
+	struct slot_rb *ptr_slot_rb = &kbdev->hwaccess.backend.slot_rb[js];
+
+	lockdep_assert_held(&kbdev->hwaccess_lock);
+
+	kctx = katom->kctx;
+
+	/* Command register must be available */
+	if (WARN(!kbasep_jm_is_js_free(kbdev, js, kctx),
+		 "Attempting to assign to occupied slot %d in kctx %pK\n", js, (void *)kctx))
+		return -EPERM;
+
+	dev_dbg(kctx->kbdev->dev, "Write JS_HEAD_NEXT 0x%llx for atom %pK\n",
+		jc_head, (void *)katom);
+
+	kbase_reg_write(kbdev, JOB_SLOT_REG(js, JS_HEAD_NEXT_LO),
+						jc_head & 0xFFFFFFFF);
+	kbase_reg_write(kbdev, JOB_SLOT_REG(js, JS_HEAD_NEXT_HI),
+						jc_head >> 32);
+
+	affinity = kbase_job_write_affinity(kbdev, katom->core_req, js,
+						kctx->limited_core_mask);
+
+	/* start MMU, medium priority, cache clean/flush on end, clean/flush on
+	 * start
+	 */
+	cfg = kctx->as_nr;
+
+	if (kbase_hw_has_feature(kbdev, BASE_HW_FEATURE_FLUSH_REDUCTION) &&
+			!(kbdev->serialize_jobs & KBASE_SERIALIZE_RESET))
+		cfg |= JS_CONFIG_ENABLE_FLUSH_REDUCTION;
+
+	if (0 != (katom->core_req & BASE_JD_REQ_SKIP_CACHE_START)) {
+		/* Force a cache maintenance operation if the newly submitted
+		 * katom to the slot is from a different kctx. For a JM GPU
+		 * that has the feature BASE_HW_FEATURE_FLUSH_INV_SHADER_OTHER,
+		 * applies a FLUSH_INV_SHADER_OTHER. Otherwise, do a
+		 * FLUSH_CLEAN_INVALIDATE.
+		 */
+		u64 tagged_kctx = ptr_slot_rb->last_kctx_tagged;
+
+		if (tagged_kctx != SLOT_RB_NULL_TAG_VAL && tagged_kctx != SLOT_RB_TAG_KCTX(kctx)) {
+			if (kbase_hw_has_feature(kbdev, BASE_HW_FEATURE_FLUSH_INV_SHADER_OTHER))
+				cfg |= JS_CONFIG_START_FLUSH_INV_SHADER_OTHER;
+			else
+				cfg |= JS_CONFIG_START_FLUSH_CLEAN_INVALIDATE;
+		} else
+			cfg |= JS_CONFIG_START_FLUSH_NO_ACTION;
+	} else
+		cfg |= JS_CONFIG_START_FLUSH_CLEAN_INVALIDATE;
+
+	if (0 != (katom->core_req & BASE_JD_REQ_SKIP_CACHE_END) &&
+			!(kbdev->serialize_jobs & KBASE_SERIALIZE_RESET))
+		cfg |= JS_CONFIG_END_FLUSH_NO_ACTION;
+	else if (kbase_hw_has_feature(kbdev, BASE_HW_FEATURE_CLEAN_ONLY_SAFE))
+		cfg |= JS_CONFIG_END_FLUSH_CLEAN;
+	else
+		cfg |= JS_CONFIG_END_FLUSH_CLEAN_INVALIDATE;
+
+	cfg |= JS_CONFIG_THREAD_PRI(8);
+
+	if ((katom->atom_flags & KBASE_KATOM_FLAG_PROTECTED) ||
+	    (katom->core_req & BASE_JD_REQ_END_RENDERPASS))
+		cfg |= JS_CONFIG_DISABLE_DESCRIPTOR_WR_BK;
+
+	if (!ptr_slot_rb->job_chain_flag) {
+		cfg |= JS_CONFIG_JOB_CHAIN_FLAG;
+		katom->atom_flags |= KBASE_KATOM_FLAGS_JOBCHAIN;
+		ptr_slot_rb->job_chain_flag = true;
+	} else {
+		katom->atom_flags &= ~KBASE_KATOM_FLAGS_JOBCHAIN;
+		ptr_slot_rb->job_chain_flag = false;
+	}
+
+	kbase_reg_write(kbdev, JOB_SLOT_REG(js, JS_CONFIG_NEXT), cfg);
+
+	if (kbase_hw_has_feature(kbdev, BASE_HW_FEATURE_FLUSH_REDUCTION))
+		kbase_reg_write(kbdev, JOB_SLOT_REG(js, JS_FLUSH_ID_NEXT),
+				katom->flush_id);
+
+	/* Write an approximate start timestamp.
+	 * It's approximate because there might be a job in the HEAD register.
+	 */
+	katom->start_timestamp = ktime_get_raw();
+
+	/* GO ! */
+	dev_dbg(kbdev->dev, "JS: Submitting atom %pK from ctx %pK to js[%d] with head=0x%llx",
+				katom, kctx, js, jc_head);
+
+	KBASE_KTRACE_ADD_JM_SLOT_INFO(kbdev, JM_SUBMIT, kctx, katom, jc_head, js,
+							(u32)affinity);
+
+	KBASE_TLSTREAM_AUX_EVENT_JOB_SLOT(kbdev, kctx,
+		js, kbase_jd_atom_id(kctx, katom), TL_JS_EVENT_START);
+
+	KBASE_TLSTREAM_TL_ATTRIB_ATOM_CONFIG(kbdev, katom, jc_head,
+			affinity, cfg);
+	KBASE_TLSTREAM_TL_RET_CTX_LPU(
+		kbdev,
+		kctx,
+		&kbdev->gpu_props.props.raw_props.js_features[
+			katom->slot_nr]);
+	KBASE_TLSTREAM_TL_RET_ATOM_AS(kbdev, katom, &kbdev->as[kctx->as_nr]);
+	KBASE_TLSTREAM_TL_RET_ATOM_LPU(
+			kbdev,
+			katom,
+			&kbdev->gpu_props.props.raw_props.js_features[js],
+			"ctx_nr,atom_nr");
+	kbase_kinstr_jm_atom_hw_submit(katom);
+
+	/* Update the slot's last katom submission kctx */
+	ptr_slot_rb->last_kctx_tagged = SLOT_RB_TAG_KCTX(kctx);
+
+#if IS_ENABLED(CONFIG_GPU_TRACEPOINTS)
+	if (!kbase_backend_nr_atoms_submitted(kbdev, js)) {
+		/* If this is the only job on the slot, trace it as starting */
+		char js_string[16];
+
+		trace_gpu_sched_switch(
+				kbasep_make_job_slot_string(js, js_string,
+						sizeof(js_string)),
+				ktime_to_ns(katom->start_timestamp),
+				(u32)katom->kctx->id, 0, katom->work_id);
+	}
+#endif
+
+	trace_sysgraph_gpu(SGR_SUBMIT, kctx->id,
+			kbase_jd_atom_id(kctx, katom), js);
+
+	kbase_reg_write(kbdev, JOB_SLOT_REG(js, JS_COMMAND_NEXT),
+						JS_COMMAND_START);
+
+	return 0;
+}
+
+/**
+ * kbasep_job_slot_update_head_start_timestamp - Update timestamp
+ * @kbdev: kbase device
+ * @js: job slot
+ * @end_timestamp: timestamp
+ *
+ * Update the start_timestamp of the job currently in the HEAD, based on the
+ * fact that we got an IRQ for the previous set of completed jobs.
+ *
+ * The estimate also takes into account the time the job was submitted, to
+ * work out the best estimate (which might still result in an over-estimate to
+ * the calculated time spent)
+ */
+static void kbasep_job_slot_update_head_start_timestamp(
+						struct kbase_device *kbdev,
+						int js,
+						ktime_t end_timestamp)
+{
+	ktime_t timestamp_diff;
+	struct kbase_jd_atom *katom;
+
+	/* Checking the HEAD position for the job slot */
+	katom = kbase_gpu_inspect(kbdev, js, 0);
+	if (katom != NULL) {
+		timestamp_diff = ktime_sub(end_timestamp,
+				katom->start_timestamp);
+		if (ktime_to_ns(timestamp_diff) >= 0) {
+			/* Only update the timestamp if it's a better estimate
+			 * than what's currently stored. This is because our
+			 * estimate that accounts for the throttle time may be
+			 * too much of an overestimate
+			 */
+			katom->start_timestamp = end_timestamp;
+		}
+	}
+}
+
+/**
+ * kbasep_trace_tl_event_lpu_softstop - Call event_lpu_softstop timeline
+ * tracepoint
+ * @kbdev: kbase device
+ * @js: job slot
+ *
+ * Make a tracepoint call to the instrumentation module informing that
+ * softstop happened on given lpu (job slot).
+ */
+static void kbasep_trace_tl_event_lpu_softstop(struct kbase_device *kbdev,
+					int js)
+{
+	KBASE_TLSTREAM_TL_EVENT_LPU_SOFTSTOP(
+		kbdev,
+		&kbdev->gpu_props.props.raw_props.js_features[js]);
+}
+
+void kbase_job_done(struct kbase_device *kbdev, u32 done)
+{
+	int i;
+	u32 count = 0;
+	ktime_t end_timestamp;
+
+	lockdep_assert_held(&kbdev->hwaccess_lock);
+
+	KBASE_KTRACE_ADD_JM(kbdev, JM_IRQ, NULL, NULL, 0, done);
+
+	end_timestamp = ktime_get_raw();
+
+	while (done) {
+		u32 failed = done >> 16;
+
+		/* treat failed slots as finished slots */
+		u32 finished = (done & 0xFFFF) | failed;
+
+		/* Note: This is inherently unfair, as we always check for lower
+		 * numbered interrupts before the higher numbered ones.
+		 */
+		i = ffs(finished) - 1;
+		if (WARN(i < 0, "%s: called without receiving any interrupts\n", __func__))
+			break;
+
+		do {
+			int nr_done;
+			u32 active;
+			u32 completion_code = BASE_JD_EVENT_DONE;/* assume OK */
+			u64 job_tail = 0;
+
+			if (failed & (1u << i)) {
+				/* read out the job slot status code if the job
+				 * slot reported failure
+				 */
+				completion_code = kbase_reg_read(kbdev,
+					JOB_SLOT_REG(i, JS_STATUS));
+
+				if (completion_code == BASE_JD_EVENT_STOPPED) {
+					u64 job_head;
+
+					KBASE_TLSTREAM_AUX_EVENT_JOB_SLOT(
+						kbdev, NULL,
+						i, 0, TL_JS_EVENT_SOFT_STOP);
+
+					kbasep_trace_tl_event_lpu_softstop(
+						kbdev, i);
+
+					/* Soft-stopped job - read the value of
+					 * JS<n>_TAIL so that the job chain can
+					 * be resumed
+					 */
+					job_tail = (u64)kbase_reg_read(kbdev,
+						JOB_SLOT_REG(i, JS_TAIL_LO)) |
+						((u64)kbase_reg_read(kbdev,
+						JOB_SLOT_REG(i, JS_TAIL_HI))
+						 << 32);
+					job_head = (u64)kbase_reg_read(kbdev,
+						JOB_SLOT_REG(i, JS_HEAD_LO)) |
+						((u64)kbase_reg_read(kbdev,
+						JOB_SLOT_REG(i, JS_HEAD_HI))
+						 << 32);
+					/* For a soft-stopped job chain js_tail should
+					 * same as the js_head, but if not then the
+					 * job chain was incorrectly marked as
+					 * soft-stopped. In such case we should not
+					 * be resuming the job chain from js_tail and
+					 * report the completion_code as UNKNOWN.
+					 */
+					if (job_tail != job_head)
+						completion_code = BASE_JD_EVENT_UNKNOWN;
+
+				} else if (completion_code ==
+						BASE_JD_EVENT_NOT_STARTED) {
+					/* PRLAM-10673 can cause a TERMINATED
+					 * job to come back as NOT_STARTED,
+					 * but the error interrupt helps us
+					 * detect it
+					 */
+					completion_code =
+						BASE_JD_EVENT_TERMINATED;
+				}
+
+				kbase_gpu_irq_evict(kbdev, i, completion_code);
+
+				/* Some jobs that encounter a BUS FAULT may
+				 * result in corrupted state causing future
+				 * jobs to hang. Reset GPU before allowing
+				 * any other jobs on the slot to continue.
+				 */
+				if (kbase_hw_has_issue(kbdev, BASE_HW_ISSUE_TTRX_3076)) {
+					if (completion_code == BASE_JD_EVENT_JOB_BUS_FAULT) {
+						if (kbase_prepare_to_reset_gpu_locked(
+							    kbdev,
+							    RESET_FLAGS_NONE))
+							kbase_reset_gpu_locked(kbdev);
+					}
+				}
+			}
+
+			kbase_reg_write(kbdev, JOB_CONTROL_REG(JOB_IRQ_CLEAR),
+					done & ((1 << i) | (1 << (i + 16))));
+			active = kbase_reg_read(kbdev,
+					JOB_CONTROL_REG(JOB_IRQ_JS_STATE));
+
+			if (((active >> i) & 1) == 0 &&
+					(((done >> (i + 16)) & 1) == 0)) {
+				/* There is a potential race we must work
+				 * around:
+				 *
+				 *  1. A job slot has a job in both current and
+				 *     next registers
+				 *  2. The job in current completes
+				 *     successfully, the IRQ handler reads
+				 *     RAWSTAT and calls this function with the
+				 *     relevant bit set in "done"
+				 *  3. The job in the next registers becomes the
+				 *     current job on the GPU
+				 *  4. Sometime before the JOB_IRQ_CLEAR line
+				 *     above the job on the GPU _fails_
+				 *  5. The IRQ_CLEAR clears the done bit but not
+				 *     the failed bit. This atomically sets
+				 *     JOB_IRQ_JS_STATE. However since both jobs
+				 *     have now completed the relevant bits for
+				 *     the slot are set to 0.
+				 *
+				 * If we now did nothing then we'd incorrectly
+				 * assume that _both_ jobs had completed
+				 * successfully (since we haven't yet observed
+				 * the fail bit being set in RAWSTAT).
+				 *
+				 * So at this point if there are no active jobs
+				 * left we check to see if RAWSTAT has a failure
+				 * bit set for the job slot. If it does we know
+				 * that there has been a new failure that we
+				 * didn't previously know about, so we make sure
+				 * that we record this in active (but we wait
+				 * for the next loop to deal with it).
+				 *
+				 * If we were handling a job failure (i.e. done
+				 * has the relevant high bit set) then we know
+				 * that the value read back from
+				 * JOB_IRQ_JS_STATE is the correct number of
+				 * remaining jobs because the failed job will
+				 * have prevented any further jobs from starting
+				 * execution.
+				 */
+				u32 rawstat = kbase_reg_read(kbdev,
+					JOB_CONTROL_REG(JOB_IRQ_RAWSTAT));
+
+				if ((rawstat >> (i + 16)) & 1) {
+					/* There is a failed job that we've
+					 * missed - add it back to active
+					 */
+					active |= (1u << i);
+				}
+			}
+
+			dev_dbg(kbdev->dev, "Job ended with status 0x%08X\n",
+							completion_code);
+
+			nr_done = kbase_backend_nr_atoms_submitted(kbdev, i);
+			nr_done -= (active >> i) & 1;
+			nr_done -= (active >> (i + 16)) & 1;
+
+			if (nr_done <= 0) {
+				dev_warn(kbdev->dev, "Spurious interrupt on slot %d",
+									i);
+
+				goto spurious;
+			}
+
+			count += nr_done;
+
+			while (nr_done) {
+				if (nr_done == 1) {
+					kbase_gpu_complete_hw(kbdev, i,
+								completion_code,
+								job_tail,
+								&end_timestamp);
+					kbase_jm_try_kick_all(kbdev);
+				} else {
+					/* More than one job has completed.
+					 * Since this is not the last job being
+					 * reported this time it must have
+					 * passed. This is because the hardware
+					 * will not allow further jobs in a job
+					 * slot to complete until the failed job
+					 * is cleared from the IRQ status.
+					 */
+					kbase_gpu_complete_hw(kbdev, i,
+							BASE_JD_EVENT_DONE,
+							0,
+							&end_timestamp);
+				}
+				nr_done--;
+			}
+ spurious:
+			done = kbase_reg_read(kbdev,
+					JOB_CONTROL_REG(JOB_IRQ_RAWSTAT));
+
+			failed = done >> 16;
+			finished = (done & 0xFFFF) | failed;
+			if (done)
+				end_timestamp = ktime_get_raw();
+		} while (finished & (1 << i));
+
+		kbasep_job_slot_update_head_start_timestamp(kbdev, i,
+								end_timestamp);
+	}
+
+	if (atomic_read(&kbdev->hwaccess.backend.reset_gpu) ==
+						KBASE_RESET_GPU_COMMITTED) {
+		/* If we're trying to reset the GPU then we might be able to do
+		 * it early (without waiting for a timeout) because some jobs
+		 * have completed
+		 */
+		kbasep_try_reset_gpu_early_locked(kbdev);
+	}
+	KBASE_KTRACE_ADD_JM(kbdev, JM_IRQ_END, NULL, NULL, 0, count);
+}
+
+void kbasep_job_slot_soft_or_hard_stop_do_action(struct kbase_device *kbdev,
+					int js,
+					u32 action,
+					base_jd_core_req core_reqs,
+					struct kbase_jd_atom *target_katom)
+{
+#if KBASE_KTRACE_ENABLE
+	u32 status_reg_before;
+	u64 job_in_head_before;
+	u32 status_reg_after;
+
+	WARN_ON(action & (~JS_COMMAND_MASK));
+
+	/* Check the head pointer */
+	job_in_head_before = ((u64) kbase_reg_read(kbdev,
+					JOB_SLOT_REG(js, JS_HEAD_LO)))
+			| (((u64) kbase_reg_read(kbdev,
+					JOB_SLOT_REG(js, JS_HEAD_HI)))
+									<< 32);
+	status_reg_before = kbase_reg_read(kbdev, JOB_SLOT_REG(js, JS_STATUS));
+#endif
+
+	if (action == JS_COMMAND_SOFT_STOP) {
+		if (kbase_jd_katom_is_protected(target_katom)) {
+#ifdef CONFIG_MALI_DEBUG
+			dev_dbg(kbdev->dev,
+					"Attempt made to soft-stop a job that cannot be soft-stopped. core_reqs = 0x%x",
+					(unsigned int)core_reqs);
+#endif			/* CONFIG_MALI_DEBUG */
+			return;
+		}
+
+		/* We are about to issue a soft stop, so mark the atom as having
+		 * been soft stopped
+		 */
+		target_katom->atom_flags |= KBASE_KATOM_FLAG_BEEN_SOFT_STOPPED;
+
+		/* Mark the point where we issue the soft-stop command */
+		KBASE_TLSTREAM_TL_EVENT_ATOM_SOFTSTOP_ISSUE(kbdev, target_katom);
+
+		action = (target_katom->atom_flags &
+			  KBASE_KATOM_FLAGS_JOBCHAIN) ?
+				 JS_COMMAND_SOFT_STOP_1 :
+				 JS_COMMAND_SOFT_STOP_0;
+	} else if (action == JS_COMMAND_HARD_STOP) {
+		target_katom->atom_flags |= KBASE_KATOM_FLAG_BEEN_HARD_STOPPED;
+
+		action = (target_katom->atom_flags &
+			  KBASE_KATOM_FLAGS_JOBCHAIN) ?
+				 JS_COMMAND_HARD_STOP_1 :
+				 JS_COMMAND_HARD_STOP_0;
+	}
+
+	kbase_reg_write(kbdev, JOB_SLOT_REG(js, JS_COMMAND), action);
+
+#if KBASE_KTRACE_ENABLE
+	status_reg_after = kbase_reg_read(kbdev, JOB_SLOT_REG(js, JS_STATUS));
+	if (status_reg_after == BASE_JD_EVENT_ACTIVE) {
+		struct kbase_jd_atom *head;
+		struct kbase_context *head_kctx;
+
+		head = kbase_gpu_inspect(kbdev, js, 0);
+		head_kctx = head->kctx;
+
+		if (status_reg_before == BASE_JD_EVENT_ACTIVE)
+			KBASE_KTRACE_ADD_JM_SLOT(kbdev, JM_CHECK_HEAD, head_kctx, head, job_in_head_before, js);
+		else
+			KBASE_KTRACE_ADD_JM_SLOT(kbdev, JM_CHECK_HEAD, NULL, NULL, 0, js);
+
+		switch (action) {
+		case JS_COMMAND_SOFT_STOP:
+			KBASE_KTRACE_ADD_JM_SLOT(kbdev, JM_SOFTSTOP, head_kctx, head, head->jc, js);
+			break;
+		case JS_COMMAND_SOFT_STOP_0:
+			KBASE_KTRACE_ADD_JM_SLOT(kbdev, JM_SOFTSTOP_0, head_kctx, head, head->jc, js);
+			break;
+		case JS_COMMAND_SOFT_STOP_1:
+			KBASE_KTRACE_ADD_JM_SLOT(kbdev, JM_SOFTSTOP_1, head_kctx, head, head->jc, js);
+			break;
+		case JS_COMMAND_HARD_STOP:
+			KBASE_KTRACE_ADD_JM_SLOT(kbdev, JM_HARDSTOP, head_kctx, head, head->jc, js);
+			break;
+		case JS_COMMAND_HARD_STOP_0:
+			KBASE_KTRACE_ADD_JM_SLOT(kbdev, JM_HARDSTOP_0, head_kctx, head, head->jc, js);
+			break;
+		case JS_COMMAND_HARD_STOP_1:
+			KBASE_KTRACE_ADD_JM_SLOT(kbdev, JM_HARDSTOP_1, head_kctx, head, head->jc, js);
+			break;
+		default:
+			WARN(1, "Unknown action %d on atom %pK in kctx %pK\n", action,
+			     (void *)target_katom, (void *)target_katom->kctx);
+			break;
+		}
+	} else {
+		if (status_reg_before == BASE_JD_EVENT_ACTIVE)
+			KBASE_KTRACE_ADD_JM_SLOT(kbdev, JM_CHECK_HEAD, NULL, NULL, job_in_head_before, js);
+		else
+			KBASE_KTRACE_ADD_JM_SLOT(kbdev, JM_CHECK_HEAD, NULL, NULL, 0, js);
+
+		switch (action) {
+		case JS_COMMAND_SOFT_STOP:
+			KBASE_KTRACE_ADD_JM_SLOT(kbdev, JM_SOFTSTOP, NULL, NULL, 0, js);
+			break;
+		case JS_COMMAND_SOFT_STOP_0:
+			KBASE_KTRACE_ADD_JM_SLOT(kbdev, JM_SOFTSTOP_0, NULL, NULL, 0, js);
+			break;
+		case JS_COMMAND_SOFT_STOP_1:
+			KBASE_KTRACE_ADD_JM_SLOT(kbdev, JM_SOFTSTOP_1, NULL, NULL, 0, js);
+			break;
+		case JS_COMMAND_HARD_STOP:
+			KBASE_KTRACE_ADD_JM_SLOT(kbdev, JM_HARDSTOP, NULL, NULL, 0, js);
+			break;
+		case JS_COMMAND_HARD_STOP_0:
+			KBASE_KTRACE_ADD_JM_SLOT(kbdev, JM_HARDSTOP_0, NULL, NULL, 0, js);
+			break;
+		case JS_COMMAND_HARD_STOP_1:
+			KBASE_KTRACE_ADD_JM_SLOT(kbdev, JM_HARDSTOP_1, NULL, NULL, 0, js);
+			break;
+		default:
+			WARN(1, "Unknown action %d on atom %pK in kctx %pK\n", action,
+			     (void *)target_katom, (void *)target_katom->kctx);
+			break;
+		}
+	}
+#endif
+}
+
+void kbase_backend_jm_kill_running_jobs_from_kctx(struct kbase_context *kctx)
+{
+	struct kbase_device *kbdev = kctx->kbdev;
+	int i;
+
+	lockdep_assert_held(&kbdev->hwaccess_lock);
+
+	for (i = 0; i < kbdev->gpu_props.num_job_slots; i++)
+		kbase_job_slot_hardstop(kctx, i, NULL);
+}
+
+void kbase_job_slot_ctx_priority_check_locked(struct kbase_context *kctx,
+				struct kbase_jd_atom *target_katom)
+{
+	struct kbase_device *kbdev;
+	int target_js = target_katom->slot_nr;
+	int i;
+	bool stop_sent = false;
+
+	kbdev = kctx->kbdev;
+
+	lockdep_assert_held(&kbdev->hwaccess_lock);
+
+	for (i = 0; i < kbase_backend_nr_atoms_on_slot(kbdev, target_js); i++) {
+		struct kbase_jd_atom *slot_katom;
+
+		slot_katom = kbase_gpu_inspect(kbdev, target_js, i);
+		if (!slot_katom)
+			continue;
+
+		if (kbase_js_atom_runs_before(kbdev, target_katom, slot_katom,
+					      KBASE_ATOM_ORDERING_FLAG_SEQNR)) {
+			if (!stop_sent)
+				KBASE_TLSTREAM_TL_ATTRIB_ATOM_PRIORITIZED(
+						kbdev,
+						target_katom);
+
+			kbase_job_slot_softstop(kbdev, target_js, slot_katom);
+			stop_sent = true;
+		}
+	}
+}
+
+static int softstop_start_rp_nolock(
+	struct kbase_context *kctx, struct kbase_va_region *reg)
+{
+	struct kbase_device *const kbdev = kctx->kbdev;
+	struct kbase_jd_atom *katom;
+	struct kbase_jd_renderpass *rp;
+
+	lockdep_assert_held(&kbdev->hwaccess_lock);
+
+	katom = kbase_gpu_inspect(kbdev, 1, 0);
+
+	if (!katom) {
+		dev_dbg(kctx->kbdev->dev, "No atom on job slot\n");
+		return -ESRCH;
+	}
+
+	if (!(katom->core_req & BASE_JD_REQ_START_RENDERPASS)) {
+		dev_dbg(kctx->kbdev->dev,
+			"Atom %pK on job slot is not start RP\n", (void *)katom);
+		return -EPERM;
+	}
+
+	compiletime_assert((1ull << (sizeof(katom->renderpass_id) * 8)) <=
+			ARRAY_SIZE(kctx->jctx.renderpasses),
+			"Should check invalid access to renderpasses");
+
+	rp = &kctx->jctx.renderpasses[katom->renderpass_id];
+	if (WARN_ON(rp->state != KBASE_JD_RP_START &&
+		rp->state != KBASE_JD_RP_RETRY))
+		return -EINVAL;
+
+	dev_dbg(kctx->kbdev->dev, "OOM in state %d with region %pK\n",
+		(int)rp->state, (void *)reg);
+
+	if (WARN_ON(katom != rp->start_katom))
+		return -EINVAL;
+
+	dev_dbg(kctx->kbdev->dev, "Adding region %pK to list %pK\n",
+		(void *)reg, (void *)&rp->oom_reg_list);
+	list_move_tail(&reg->link, &rp->oom_reg_list);
+	dev_dbg(kctx->kbdev->dev, "Added region to list\n");
+
+	rp->state = (rp->state == KBASE_JD_RP_START ?
+
commit	f195aa6e0fc5ace54e419c4367fe304c26a00f07	[log] [tgz]
author	Googler <noreply@google.com>	Fri Dec 02 10:54:13 2022 +0800
committer	Googler <noreply@google.com>	Wed Apr 19 14:17:56 2023 -0700
tree	50e2fcf61b0ce3378f6d2db6651ba44379e8910e
parent	0bde759bc5682bba7de558e308410bbc6d08d2d8 [diff]